]> Git Repo - linux.git/commitdiff
iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu
authorLu Baolu <[email protected]>
Thu, 23 Jul 2020 01:34:37 +0000 (09:34 +0800)
committerJoerg Roedel <[email protected]>
Fri, 24 Jul 2020 12:33:39 +0000 (14:33 +0200)
The VT-d spec requires (10.4.4 Global Command Register, TE field) that:

Hardware implementations supporting DMA draining must drain any in-flight
DMA read/write requests queued within the Root-Complex before completing
the translation enable command and reflecting the status of the command
through the TES field in the Global Status register.

Unfortunately, some integrated graphic devices fail to do so after some
kind of power state transition. As the result, the system might stuck in
iommu_disable_translation(), waiting for the completion of TE transition.

This provides a quirk list for those devices and skips TE disabling if
the qurik hits.

Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=208363
Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=206571
Signed-off-by: Lu Baolu <[email protected]>
Tested-by: Koba Ko <[email protected]>
Tested-by: Jun Miao <[email protected]>
Cc: Ashok Raj <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joerg Roedel <[email protected]>
drivers/iommu/intel/dmar.c
drivers/iommu/intel/iommu.c
include/linux/dmar.h
include/linux/intel-iommu.h

index f6cbe3f95c8ded678b4d870ca6fa73da647803e2..93e6345f3414f08395b6837797f67101444ac897 100644 (file)
@@ -1102,6 +1102,7 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd)
        }
 
        drhd->iommu = iommu;
+       iommu->drhd = drhd;
 
        return 0;
 
index b3faf99457a60f9c695b1a9b210f2b67b78cbf9c..0c2d582ff8cd37a12dce89fa6cdc5d208614d307 100644 (file)
@@ -356,6 +356,7 @@ static int intel_iommu_strict;
 static int intel_iommu_superpage = 1;
 static int iommu_identity_mapping;
 static int intel_no_bounce;
+static int iommu_skip_te_disable;
 
 #define IDENTMAP_GFX           2
 #define IDENTMAP_AZALIA                4
@@ -1633,6 +1634,10 @@ static void iommu_disable_translation(struct intel_iommu *iommu)
        u32 sts;
        unsigned long flag;
 
+       if (iommu_skip_te_disable && iommu->drhd->gfx_dedicated &&
+           (cap_read_drain(iommu->cap) || cap_write_drain(iommu->cap)))
+               return;
+
        raw_spin_lock_irqsave(&iommu->register_lock, flag);
        iommu->gcmd &= ~DMA_GCMD_TE;
        writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
@@ -4043,6 +4048,7 @@ static void __init init_no_remapping_devices(void)
 
                /* This IOMMU has *only* gfx devices. Either bypass it or
                   set the gfx_mapped flag, as appropriate */
+               drhd->gfx_dedicated = 1;
                if (!dmar_map_gfx) {
                        drhd->ignored = 1;
                        for_each_active_dev_scope(drhd->devices,
@@ -6170,6 +6176,27 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044, quirk_calpella_no_shadow_g
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0062, quirk_calpella_no_shadow_gtt);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x006a, quirk_calpella_no_shadow_gtt);
 
+static void quirk_igfx_skip_te_disable(struct pci_dev *dev)
+{
+       unsigned short ver;
+
+       if (!IS_GFX_DEVICE(dev))
+               return;
+
+       ver = (dev->device >> 8) & 0xff;
+       if (ver != 0x45 && ver != 0x46 && ver != 0x4c &&
+           ver != 0x4e && ver != 0x8a && ver != 0x98 &&
+           ver != 0x9a)
+               return;
+
+       if (risky_device(dev))
+               return;
+
+       pci_info(dev, "Skip IOMMU disabling for graphics\n");
+       iommu_skip_te_disable = 1;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, quirk_igfx_skip_te_disable);
+
 /* On Tylersburg chipsets, some BIOSes have been known to enable the
    ISOCH DMAR unit for the Azalia sound device, but not give it any
    TLB entries, which causes it to deadlock. Check for that.  We do
index d7bf029df737d3b52a93f490b2d3109f3c3247a8..65565820328ab59eb38546f98ca80605099178a5 100644 (file)
@@ -48,6 +48,7 @@ struct dmar_drhd_unit {
        u16     segment;                /* PCI domain           */
        u8      ignored:1;              /* ignore drhd          */
        u8      include_all:1;
+       u8      gfx_dedicated:1;        /* graphic dedicated    */
        struct intel_iommu *iommu;
 };
 
index 9ff5e340948b6fed9cffa1e0449722a20c99c7d8..b1ed2f25f7c0de2a697f659254a1200a70a40b53 100644 (file)
@@ -599,6 +599,8 @@ struct intel_iommu {
        struct iommu_device iommu;  /* IOMMU core code handle */
        int             node;
        u32             flags;      /* Software defined flags */
+
+       struct dmar_drhd_unit *drhd;
 };
 
 /* PCI domain-device relationship */
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