drm/amd/display: add plane degamma TF and LUT support

Set DC plane with user degamma LUT or predefined TF from driver-specific
plane color properties. If plane and CRTC degamma are set in the same
time, plane degamma has priority.  That means, we only set CRTC degamma
if we don't have plane degamma LUT or TF to configure. We return -EINVAL
if we don't have plane degamma settings, so we can continue and check
CRTC degamma.

Reviewed-by: Harry Wentland <[email protected]>
Signed-off-by: Joshua Ashton <[email protected]>
Signed-off-by: Melissa Wen <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 0af5d908e169021b71b25ce23adc78801632758a..911db58d0e1c62c9ee12909d736fae3104dbfb21 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -5169,7 +5169,9 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev,
         * Always set input transfer function, since plane state is refreshed
         * every time.
         */
         * Always set input transfer function, since plane state is refreshed
         * every time.
         */

-       ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state, dc_plane_state);
+       ret = amdgpu_dm_update_plane_color_mgmt(dm_crtc_state,
+                                               plane_state,
+                                               dc_plane_state);

        if (ret)
                return ret;
 
        if (ret)
                return ret;
 

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index d9923c9f39b068f6a9b5a35c98df7646f7472f9a..16af549d0b42541462aab3fa2b153c750cee6f25 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -918,6 +918,7 @@ int amdgpu_dm_create_color_properties(struct amdgpu_device *adev);
 int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_state *crtc_state);
 int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc);
 int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
 int amdgpu_dm_verify_lut_sizes(const struct drm_crtc_state *crtc_state);
 int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc);
 int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,

+                                     struct drm_plane_state *plane_state,

                                      struct dc_plane_state *dc_plane_state);
 
 void amdgpu_dm_update_connector_after_detect(
                                      struct dc_plane_state *dc_plane_state);
 
 void amdgpu_dm_update_connector_after_detect(

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index f13d22851fe4521a7d3e5fca2a256eaa2e8750df..13117516f2a47e630922441fdd7a1efae2cb6f05 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -868,9 +868,58 @@ map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,
        return 0;
 }
 
        return 0;
 }
 

+static int
+__set_dm_plane_degamma(struct drm_plane_state *plane_state,
+                      struct dc_plane_state *dc_plane_state)
+{
+       struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
+       const struct drm_color_lut *degamma_lut;
+       enum amdgpu_transfer_function tf = AMDGPU_TRANSFER_FUNCTION_DEFAULT;
+       uint32_t degamma_size;
+       bool has_degamma_lut;
+       int ret;
+
+       degamma_lut = __extract_blob_lut(dm_plane_state->degamma_lut,
+                                        &degamma_size);
+
+       has_degamma_lut = degamma_lut &&
+                         !__is_lut_linear(degamma_lut, degamma_size);
+
+       tf = dm_plane_state->degamma_tf;
+
+       /* If we don't have plane degamma LUT nor TF to set on DC, we have
+        * nothing to do here, return.
+        */
+       if (!has_degamma_lut && tf == AMDGPU_TRANSFER_FUNCTION_DEFAULT)
+               return -EINVAL;
+
+       dc_plane_state->in_transfer_func->tf = amdgpu_tf_to_dc_tf(tf);
+
+       if (has_degamma_lut) {
+               ASSERT(degamma_size == MAX_COLOR_LUT_ENTRIES);
+
+               dc_plane_state->in_transfer_func->type =
+                       TF_TYPE_DISTRIBUTED_POINTS;
+
+               ret = __set_input_tf(dc_plane_state->in_transfer_func,
+                                    degamma_lut, degamma_size);
+               if (ret)
+                       return ret;
+       } else {
+               dc_plane_state->in_transfer_func->type =
+                       TF_TYPE_PREDEFINED;
+
+               if (!mod_color_calculate_degamma_params(NULL,
+                   dc_plane_state->in_transfer_func, NULL, false))
+                       return -ENOMEM;
+       }
+       return 0;
+}
+

 /**
  * amdgpu_dm_update_plane_color_mgmt: Maps DRM color management to DC plane.
  * @crtc: amdgpu_dm crtc state
 /**
  * amdgpu_dm_update_plane_color_mgmt: Maps DRM color management to DC plane.
  * @crtc: amdgpu_dm crtc state

+ * @plane_state: DRM plane state

  * @dc_plane_state: target DC surface
  *
  * Update the underlying dc_stream_state's input transfer function (ITF) in
  * @dc_plane_state: target DC surface
  *
  * Update the underlying dc_stream_state's input transfer function (ITF) in


@@ -881,13 +930,28 @@ map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,
  * 0 on success. -ENOMEM if mem allocation fails.
  */
 int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
  * 0 on success. -ENOMEM if mem allocation fails.
  */
 int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,

+                                     struct drm_plane_state *plane_state,

                                      struct dc_plane_state *dc_plane_state)
 {
        bool has_crtc_cm_degamma;
        int ret;
 
                                      struct dc_plane_state *dc_plane_state)
 {
        bool has_crtc_cm_degamma;
        int ret;
 

+       /* Initially, we can just bypass the DGM block. */
+       dc_plane_state->in_transfer_func->type = TF_TYPE_BYPASS;
+       dc_plane_state->in_transfer_func->tf = TRANSFER_FUNCTION_LINEAR;
+
+       /* After, we start to update values according to color props */

        has_crtc_cm_degamma = (crtc->cm_has_degamma || crtc->cm_is_degamma_srgb);
        has_crtc_cm_degamma = (crtc->cm_has_degamma || crtc->cm_is_degamma_srgb);

-       if (has_crtc_cm_degamma){
+
+       ret = __set_dm_plane_degamma(plane_state, dc_plane_state);
+       if (ret != -EINVAL)
+               return ret;
+
+       /* If we are here, it means we don't have plane degamma settings, check
+        * if we have CRTC degamma waiting for mapping to pre-blending degamma
+        * block
+        */
+       if (has_crtc_cm_degamma) {

                /*
                 * AMD HW doesn't have post-blending degamma caps. When DRM
                 * CRTC atomic degamma is set, we maps it to DPP degamma block
                /*
                 * AMD HW doesn't have post-blending degamma caps. When DRM
                 * CRTC atomic degamma is set, we maps it to DPP degamma block


@@ -898,10 +962,6 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
                ret = map_crtc_degamma_to_dc_plane(crtc, dc_plane_state);
                if (ret)
                        return ret;
                ret = map_crtc_degamma_to_dc_plane(crtc, dc_plane_state);
                if (ret)
                        return ret;

-       } else {
-               /* ...Otherwise we can just bypass the DGM block. */
-               dc_plane_state->in_transfer_func->type = TF_TYPE_BYPASS;
-               dc_plane_state->in_transfer_func->tf = TRANSFER_FUNCTION_LINEAR;

        }
 
        return 0;
        }
 
        return 0;