platform/x86/amd/pmc: Move platform defines to header

The platform defines will be used by the quirks in the future,
so move them to the common header to allow use by both source
files.

Signed-off-by: Mario Limonciello <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Hans de Goede <[email protected]>
Reviewed-by: Ilpo Järvinen <[email protected]>
Signed-off-by: Ilpo Järvinen <[email protected]>

diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c
index c3104714b48027956e7004899961e770aaa0eccf..666cc6e98267b1496cd65f4a81db2e38ae77c8d8 100644 (file)
--- a/drivers/platform/x86/amd/pmc/pmc.c
+++ b/drivers/platform/x86/amd/pmc/pmc.c
@@ -91,16 +91,6 @@
 #define SMU_MSG_LOG_RESET              0x07
 #define SMU_MSG_LOG_DUMP_DATA          0x08
 #define SMU_MSG_GET_SUP_CONSTRAINTS    0x09
-/* List of supported CPU ids */
-#define AMD_CPU_ID_RV                  0x15D0
-#define AMD_CPU_ID_RN                  0x1630
-#define AMD_CPU_ID_PCO                 AMD_CPU_ID_RV
-#define AMD_CPU_ID_CZN                 AMD_CPU_ID_RN
-#define AMD_CPU_ID_YC                  0x14B5
-#define AMD_CPU_ID_CB                  0x14D8
-#define AMD_CPU_ID_PS                  0x14E8
-#define AMD_CPU_ID_SP                  0x14A4
-#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
 
 #define PMC_MSG_DELAY_MIN_US           50
 #define RESPONSE_REGISTER_LOOP_MAX     20000

diff --git a/drivers/platform/x86/amd/pmc/pmc.h b/drivers/platform/x86/amd/pmc/pmc.h
index c27bd6a5642f48cc819e25d1de6314df57868f29..a85c235247d38fe91f2ac473af8bf129a7709ec0 100644 (file)
--- a/drivers/platform/x86/amd/pmc/pmc.h
+++ b/drivers/platform/x86/amd/pmc/pmc.h
@@ -41,4 +41,15 @@ struct amd_pmc_dev {
 void amd_pmc_process_restore_quirks(struct amd_pmc_dev *dev);
 void amd_pmc_quirks_init(struct amd_pmc_dev *dev);
 
+/* List of supported CPU ids */
+#define AMD_CPU_ID_RV                  0x15D0
+#define AMD_CPU_ID_RN                  0x1630
+#define AMD_CPU_ID_PCO                 AMD_CPU_ID_RV
+#define AMD_CPU_ID_CZN                 AMD_CPU_ID_RN
+#define AMD_CPU_ID_YC                  0x14B5
+#define AMD_CPU_ID_CB                  0x14D8
+#define AMD_CPU_ID_PS                  0x14E8
+#define AMD_CPU_ID_SP                  0x14A4
+#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507
+
 #endif /* PMC_H */