]> Git Repo - linux.git/commitdiff
coresight: tmc-etr: Fix barrier packet insertion for perf buffer
authorSuzuki K Poulose <[email protected]>
Tue, 8 Dec 2020 18:26:49 +0000 (11:26 -0700)
committerGreg Kroah-Hartman <[email protected]>
Tue, 8 Dec 2020 18:57:19 +0000 (19:57 +0100)
When the ETR is used in perf mode with a larger buffer (configured
via sysfs or the default size of 1M) than the perf aux buffer size,
we end up inserting the barrier packet at the wrong offset, while
moving the offset forward. i.e, instead of the "new moved offset",
we insert it at the current hardware buffer offset. These packets
will not be visible as they are never copied and could lead to
corruption in the trace decoding side, as the decoder is not aware
that it needs to reset the decoding.

Fixes: ec13c78d7b45 ("coresight: tmc-etr: Add barrier packets when moving offset forward")
Cc: Mathieu Poirier <[email protected]>
Cc: [email protected]
Reported-by: Al Grant <[email protected]>
Tested-by: Mike Leach <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
Signed-off-by: Mathieu Poirier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
drivers/hwtracing/coresight/coresight-tmc-etr.c

index a31a4d7ae25e7d6d20b47e91a2fee3bba2366de9..bf5230e39c5bede1c28bbb1366abfecc0476b67d 100644 (file)
@@ -1552,7 +1552,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
 
        /* Insert barrier packets at the beginning, if there was an overflow */
        if (lost)
-               tmc_etr_buf_insert_barrier_packet(etr_buf, etr_buf->offset);
+               tmc_etr_buf_insert_barrier_packet(etr_buf, offset);
        tmc_etr_sync_perf_buffer(etr_perf, offset, size);
 
        /*
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