]> Git Repo - linux.git/commitdiff
PCI: j721e: Enable ACSPCIE Refclk if "ti,syscon-acspcie-proxy-ctrl" exists
authorSiddharth Vadapalli <[email protected]>
Thu, 29 Aug 2024 10:53:16 +0000 (16:23 +0530)
committerKrzysztof Wilczyński <[email protected]>
Sat, 31 Aug 2024 14:45:21 +0000 (14:45 +0000)
The ACSPCIE module is capable of driving the reference clock required by
the PCIe Endpoint device. It is an alternative to on-board and external
reference clock generators. Enabling the output from the ACSPCIE module's
PAD IO Buffers requires clearing the "PAD IO disable" bits of the
ACSPCIE_PROXY_CTRL register in the CTRL_MMR register space.

Add support to enable the ACSPCIE reference clock output using the optional
device-tree property "ti,syscon-acspcie-proxy-ctrl".

Link: https://lore.kernel.org/linux-pci/[email protected]
Signed-off-by: Siddharth Vadapalli <[email protected]>
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
drivers/pci/controller/cadence/pci-j721e.c

index 85718246016b733ee4c8e52ab6c6be2c6f13e93f..7f7732e2dcaa9d8434a790ffc48bceb8674202ff 100644 (file)
@@ -44,6 +44,7 @@ enum link_status {
 #define J721E_MODE_RC                  BIT(7)
 #define LANE_COUNT(n)                  ((n) << 8)
 
+#define ACSPCIE_PAD_DISABLE_MASK       GENMASK(1, 0)
 #define GENERATION_SEL_MASK            GENMASK(1, 0)
 
 struct j721e_pcie {
@@ -220,6 +221,36 @@ static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie,
        return ret;
 }
 
+static int j721e_enable_acspcie_refclk(struct j721e_pcie *pcie,
+                                      struct regmap *syscon)
+{
+       struct device *dev = pcie->cdns_pcie->dev;
+       struct device_node *node = dev->of_node;
+       u32 mask = ACSPCIE_PAD_DISABLE_MASK;
+       struct of_phandle_args args;
+       u32 val;
+       int ret;
+
+       ret = of_parse_phandle_with_fixed_args(node,
+                                              "ti,syscon-acspcie-proxy-ctrl",
+                                              1, 0, &args);
+       if (ret) {
+               dev_err(dev,
+                       "ti,syscon-acspcie-proxy-ctrl has invalid arguments\n");
+               return ret;
+       }
+
+       /* Clear PAD IO disable bits to enable refclk output */
+       val = ~(args.args[0]);
+       ret = regmap_update_bits(syscon, 0, mask, val);
+       if (ret) {
+               dev_err(dev, "failed to enable ACSPCIE refclk: %d\n", ret);
+               return ret;
+       }
+
+       return 0;
+}
+
 static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie)
 {
        struct device *dev = pcie->cdns_pcie->dev;
@@ -259,7 +290,13 @@ static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie)
                return ret;
        }
 
-       return 0;
+       /* Enable ACSPCIE refclk output if the optional property exists */
+       syscon = syscon_regmap_lookup_by_phandle_optional(node,
+                                               "ti,syscon-acspcie-proxy-ctrl");
+       if (!syscon)
+               return 0;
+
+       return j721e_enable_acspcie_refclk(pcie, syscon);
 }
 
 static int cdns_ti_pcie_config_read(struct pci_bus *bus, unsigned int devfn,
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