Merge branch 'x86/cpufeature' into x86/cache

Resolve the cpu/scattered conflict.

Signed-off-by: Thomas Gleixner <[email protected]>

diff --combined MAINTAINERS
index 4e6a04428c2b3726426932b019b6d88575067377,851b89b9edcb5e99e84270e67510e10a19418b21..c6a3d8c86f6f1ae2475f5298c90cb17b1a9bbedb
--- 1/MAINTAINERS
--- 2/MAINTAINERS
+++ b/MAINTAINERS
@@@ -1442,6 -1442,7 +1442,7 @@@ F:      drivers/cpufreq/mvebu-cpufreq.
  F:    arch/arm/configs/mvebu_*_defconfig
  
  ARM/Marvell Berlin SoC support
+ M:    Jisheng Zhang <[email protected]>
  M:    Sebastian Hesselbarth <[email protected]>
  L:    [email protected] (moderated for non-subscribers)
  S:    Maintained
@@@ -2551,15 -2552,18 +2552,18 @@@ S:   Supporte
  F:    drivers/net/ethernet/broadcom/genet/
  
  BROADCOM BNX2 GIGABIT ETHERNET DRIVER
- M:    Sony Chacko <[email protected]>
- M:    [email protected]
+ M:    Rasesh Mody <[email protected]>
+ M:    Harish Patil <[email protected]>
+ M:    [email protected]
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/broadcom/bnx2.*
  F:    drivers/net/ethernet/broadcom/bnx2_*
  
  BROADCOM BNX2X 10 GIGABIT ETHERNET DRIVER
- M:    Ariel Elior <[email protected]>
+ M:    Yuval Mintz <[email protected]>
+ M:    Ariel Elior <[email protected]>
+ M:    [email protected]
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/broadcom/bnx2x/
@@@ -2766,7 -2770,9 +2770,9 @@@ S:      Supporte
  F:    drivers/scsi/bfa/
  
  BROCADE BNA 10 GIGABIT ETHERNET DRIVER
- M:    Rasesh Mody <[email protected]>
+ M:    Rasesh Mody <[email protected]>
+ M:    Sudarsana Kalluru <[email protected]>
+ M:    [email protected]
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/brocade/bna/
@@@ -5287,6 -5293,12 +5293,12 @@@ M:    Joe Perches <[email protected]
  S:    Maintained
  F:    scripts/get_maintainer.pl
  
+ GENWQE (IBM Generic Workqueue Card)
+ M:    Frank Haverkamp <[email protected]>
+ M:    Gabriel Krisman Bertazi <[email protected]>
+ S:    Supported
+ F:    drivers/misc/genwqe/
+ 
  GFS2 FILE SYSTEM
  M:    Steven Whitehouse <[email protected]>
  M:    Bob Peterson <[email protected]>
@@@ -7913,6 -7925,10 +7925,10 @@@ F:    mm
  MEMORY TECHNOLOGY DEVICES (MTD)
  M:    David Woodhouse <[email protected]>
  M:    Brian Norris <[email protected]>
+ M:    Boris Brezillon <[email protected]>
+ M:    Marek Vasut <[email protected]>
+ M:    Richard Weinberger <[email protected]>
+ M:    Cyrille Pitchen <[email protected]>
  L:    [email protected]
  W:    http://www.linux-mtd.infradead.org/
  Q:    http://patchwork.ozlabs.org/project/linux-mtd/list/
@@@ -8100,6 -8116,7 +8116,7 @@@ S:      Maintaine
  F:    drivers/media/dvb-frontends/mn88473*
  
  MODULE SUPPORT
+ M:    Jessica Yu <[email protected]>
  M:    Rusty Russell <[email protected]>
  S:    Maintained
  F:    include/linux/module.h
@@@ -8509,11 -8526,10 +8526,10 @@@ F:   Documentation/devicetree/bindings/ne
  F:    drivers/net/wireless/
  
  NETXEN (1/10) GbE SUPPORT
- M:    Manish Chopra <manish.chopra@qlogic.com>
- M:    Sony Chacko <sony.chacko@qlogic.com>
- M:    Rajesh Borundia <[email protected]>
+ M:    Manish Chopra <manish.chopra@cavium.com>
+ M:    Rahul Verma <rahul.verma@cavium.com>
+ M:    [email protected]
  L:    [email protected]
- W:    http://www.qlogic.com
  S:    Supported
  F:    drivers/net/ethernet/qlogic/netxen/
  
@@@ -9319,7 -9335,7 +9335,7 @@@ PCI DRIVER FOR INTEL VOLUME MANAGEMENT 
  M:    Keith Busch <[email protected]>
  L:    [email protected]
  S:    Supported
- F:    arch/x86/pci/vmd.c
+ F:    drivers/pci/host/vmd.c
  
  PCIE DRIVER FOR ST SPEAR13XX
  M:    Pratyush Anand <[email protected]>
@@@ -9889,33 -9905,32 +9905,32 @@@ F:   Documentation/scsi/LICENSE.qla4xx
  F:    drivers/scsi/qla4xxx/
  
  QLOGIC QLA3XXX NETWORK DRIVER
- M:    Jitendra Kalsaria <[email protected]>
- M:    Ron Mercer <[email protected]>
- M:    [email protected]
+ M:    [email protected]
  L:    [email protected]
  S:    Supported
  F:    Documentation/networking/LICENSE.qla3xxx
  F:    drivers/net/ethernet/qlogic/qla3xxx.*
  
  QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER
- M:    [email protected]
+ M:    Harish Patil <[email protected]>
+ M:    Manish Chopra <[email protected]>
+ M:    [email protected]
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/qlogic/qlcnic/
  
  QLOGIC QLGE 10Gb ETHERNET DRIVER
- M:    Harish Patil <[email protected]>
- M:    Sudarsana Kalluru <[email protected]>
- M:    [email protected]
- M:    [email protected]
+ M:    Harish Patil <[email protected]>
+ M:    Manish Chopra <[email protected]>
+ M:    [email protected]
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/qlogic/qlge/
  
  QLOGIC QL4xxx ETHERNET DRIVER
- M:    Yuval Mintz <Yuval.Mintz@qlogic.com>
- M:    Ariel Elior <Ariel.Elior@qlogic.com>
- M:    everest-linux-l2@qlogic.com
+ M:    Yuval Mintz <Yuval.Mintz@cavium.com>
+ M:    Ariel Elior <Ariel.Elior@cavium.com>
+ M:    everest-linux-l2@cavium.com
  L:    [email protected]
  S:    Supported
  F:    drivers/net/ethernet/qlogic/qed/
@@@ -10107,14 -10122,6 +10122,14 @@@ L: [email protected]
  S:    Supported
  F:    drivers/infiniband/sw/rdmavt
  
 +RDT - RESOURCE ALLOCATION
 +M:    Fenghua Yu <[email protected]>
 +L:    [email protected]
 +S:    Supported
 +F:    arch/x86/kernel/cpu/intel_rdt*
 +F:    arch/x86/include/asm/intel_rdt*
 +F:    Documentation/x86/intel_rdt*
 +
  READ-COPY UPDATE (RCU)
  M:    "Paul E. McKenney" <[email protected]>
  M:    Josh Triplett <[email protected]>
@@@ -11401,6 -11408,17 +11416,17 @@@ W: http://www.st.com/spea
  S:    Maintained
  F:    drivers/clk/spear/
  
+ SPI NOR SUBSYSTEM
+ M:    Cyrille Pitchen <[email protected]>
+ M:    Marek Vasut <[email protected]>
+ L:    [email protected]
+ W:    http://www.linux-mtd.infradead.org/
+ Q:    http://patchwork.ozlabs.org/project/linux-mtd/list/
+ T:    git git://github.com/spi-nor/linux.git
+ S:    Maintained
+ F:    drivers/mtd/spi-nor/
+ F:    include/linux/mtd/spi-nor.h
+ 
  SPI SUBSYSTEM
  M:    Mark Brown <[email protected]>
  L:    [email protected]
@@@ -12780,6 -12798,7 +12806,7 @@@ F:   include/uapi/linux/virtio_console.
  
  VIRTIO CORE, NET AND BLOCK DRIVERS
  M:    "Michael S. Tsirkin" <[email protected]>
+ M:    Jason Wang <[email protected]>
  L:    [email protected]
  S:    Maintained
  F:    Documentation/devicetree/bindings/virtio/
@@@ -12810,6 -12829,7 +12837,7 @@@ F:   include/uapi/linux/virtio_gpu.
  
  VIRTIO HOST (VHOST)
  M:    "Michael S. Tsirkin" <[email protected]>
+ M:    Jason Wang <[email protected]>
  L:    [email protected]
  L:    [email protected]
  L:    [email protected]

diff --combined arch/x86/kernel/cpu/scattered.c
index 49fb680bb0e50f7154bc870b9e78d4c2c29285c1,d1316f9c8329846b0d3f7dede754fa0eef256bd3..d9794060fe225f72f34e78cdc74959aa1bf38934
--- 1/arch/x86/kernel/cpu/scattered.c
--- 2/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@@ -17,11 -17,17 +17,20 @@@ struct cpuid_bit 
        u32 sub_leaf;
  };
  
- enum cpuid_regs {
-       CR_EAX = 0,
-       CR_ECX,
-       CR_EDX,
-       CR_EBX
+ /* Please keep the leaf sorted by cpuid_bit.level for faster search. */
+ static const struct cpuid_bit cpuid_bits[] = {
+       { X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
 -      { X86_FEATURE_EPB,              CPUID_ECX,  3, 0x00000006, 0 },
 -      { X86_FEATURE_INTEL_PT,         CPUID_EBX, 25, 0x00000007, 0 },
++      { X86_FEATURE_EPB,              CPUID_ECX,  3, 0x00000006, 0 },
++      { X86_FEATURE_INTEL_PT,         CPUID_EBX, 25, 0x00000007, 0 },
+       { X86_FEATURE_AVX512_4VNNIW,    CPUID_EDX,  2, 0x00000007, 0 },
+       { X86_FEATURE_AVX512_4FMAPS,    CPUID_EDX,  3, 0x00000007, 0 },
 -      { X86_FEATURE_HW_PSTATE,        CPUID_EDX,  7, 0x80000007, 0 },
 -      { X86_FEATURE_CPB,              CPUID_EDX,  9, 0x80000007, 0 },
++      { X86_FEATURE_CAT_L3,           CPUID_EBX,  1, 0x00000010, 0 },
++      { X86_FEATURE_CAT_L2,           CPUID_EBX,  2, 0x00000010, 0 },
++      { X86_FEATURE_CDP_L3,           CPUID_ECX,  2, 0x00000010, 1 },
++      { X86_FEATURE_HW_PSTATE,        CPUID_EDX,  7, 0x80000007, 0 },
++      { X86_FEATURE_CPB,              CPUID_EDX,  9, 0x80000007, 0 },
+       { X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
+       { 0, 0, 0, 0, 0 }
  };
  
  void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
@@@ -30,21 -36,6 +39,6 @@@
        u32 regs[4];
        const struct cpuid_bit *cb;
  
-       static const struct cpuid_bit cpuid_bits[] = {
-               { X86_FEATURE_INTEL_PT,         CR_EBX,25, 0x00000007, 0 },
-               { X86_FEATURE_AVX512_4VNNIW,    CR_EDX, 2, 0x00000007, 0 },
-               { X86_FEATURE_AVX512_4FMAPS,    CR_EDX, 3, 0x00000007, 0 },
-               { X86_FEATURE_APERFMPERF,       CR_ECX, 0, 0x00000006, 0 },
-               { X86_FEATURE_EPB,              CR_ECX, 3, 0x00000006, 0 },
-               { X86_FEATURE_CAT_L3,           CR_EBX, 1, 0x00000010, 0 },
-               { X86_FEATURE_CAT_L2,           CR_EBX, 2, 0x00000010, 0 },
-               { X86_FEATURE_CDP_L3,           CR_ECX, 2, 0x00000010, 1 },
-               { X86_FEATURE_HW_PSTATE,        CR_EDX, 7, 0x80000007, 0 },
-               { X86_FEATURE_CPB,              CR_EDX, 9, 0x80000007, 0 },
-               { X86_FEATURE_PROC_FEEDBACK,    CR_EDX,11, 0x80000007, 0 },
-               { 0, 0, 0, 0, 0 }
-       };
- 
        for (cb = cpuid_bits; cb->feature; cb++) {
  
                /* Verify that the level is valid */
@@@ -53,10 -44,35 +47,35 @@@
                    max_level > (cb->level | 0xffff))
                        continue;
  
-               cpuid_count(cb->level, cb->sub_leaf, &regs[CR_EAX],
-                           &regs[CR_EBX], &regs[CR_ECX], &regs[CR_EDX]);
+               cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
+                           &regs[CPUID_EBX], &regs[CPUID_ECX],
+                           &regs[CPUID_EDX]);
  
                if (regs[cb->reg] & (1 << cb->bit))
                        set_cpu_cap(c, cb->feature);
        }
  }
+ 
+ u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf,
+                            enum cpuid_regs_idx reg)
+ {
+       const struct cpuid_bit *cb;
+       u32 cpuid_val = 0;
+ 
+       for (cb = cpuid_bits; cb->feature; cb++) {
+ 
+               if (level > cb->level)
+                       continue;
+ 
+               if (level < cb->level)
+                       break;
+ 
+               if (reg == cb->reg && sub_leaf == cb->sub_leaf) {
+                       if (cpu_has(&boot_cpu_data, cb->feature))
+                               cpuid_val |= BIT(cb->bit);
+               }
+       }
+ 
+       return cpuid_val;
+ }
+ EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf);