memory: tegra: Ensure timing control debug features are disabled

Timing control debug features should be disabled at a boot time, but you
never now and hence it's better to disable them explicitly because some of
those features are crucial for the driver to do a proper thing.

Acked-by: Peter De Schrijver <[email protected]>
Signed-off-by: Dmitry Osipenko <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>

diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index 41ee420275f1ec5a261c4b0c983144af1062c5b0..a1f9a05060482fac305fd5c991d83a6799800c42 100644 (file)
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -667,6 +667,9 @@ static int tegra_mc_probe(struct platform_device *pdev)
        } else
 #endif
        {
+               /* ensure that debug features are disabled */
+               mc_writel(mc, 0x00000000, MC_TIMING_CONTROL_DBG);
+
                err = tegra_mc_setup_latency_allowance(mc);
                if (err < 0) {
                        dev_err(&pdev->dev,

diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h
index 410efc4d7e7bfe6779b4a5c2921b3f9b8f0b227c..cd52628c2b9633ed6f20223a11f13bfd103b6cf1 100644 (file)
--- a/drivers/memory/tegra/mc.h
+++ b/drivers/memory/tegra/mc.h
@@ -30,6 +30,8 @@
 #define MC_EMEM_ARB_OVERRIDE                           0xe8
 #define MC_EMEM_ARB_OVERRIDE_EACK_MASK                 0x3
 
+#define MC_TIMING_CONTROL_DBG                          0xf8
+
 #define MC_TIMING_CONTROL                              0xfc
 #define MC_TIMING_UPDATE                               BIT(0)