drm/i915/ehl: Update MOCS table for EHL

Add these extra EHL entries back since we have
drm-tip commit 13d29c823738
("drm/i915/ehl: unconditionally flush the pages on acquire")
introduces proper flushing to make it work as expected.

Cc: Chris Wilson <[email protected]>
Cc: Matthew Auld <[email protected]>
Fixes: 046091758b50 ("Revert "drm/i915/ehl: Update MOCS table for EHL"")
Signed-off-by: Matt Roper <[email protected]>
Signed-off-by: Tejas Upadhyay <[email protected]>
Acked-by: Matthew Auld <[email protected]>
Signed-off-by: Matthew Auld <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index c6ebe2781076465260a51e944d0e424c06843e9c..152244d7f62a03cd2810a1995629ebae90ec89be 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -207,6 +207,14 @@ static const struct drm_i915_mocs_entry broxton_mocs_table[] = {
        MOCS_ENTRY(15, \
                   LE_3_WB | LE_TC_1_LLC | LE_LRUM(2) | LE_AOM(1), \
                   L3_3_WB), \
+       /* Bypass LLC - Uncached (EHL+) */ \
+       MOCS_ENTRY(16, \
+                  LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
+                  L3_1_UC), \
+       /* Bypass LLC - L3 (Read-Only) (EHL+) */ \
+       MOCS_ENTRY(17, \
+                  LE_1_UC | LE_TC_1_LLC | LE_SCF(1), \
+                  L3_3_WB), \
        /* Self-Snoop - L3 + LLC */ \
        MOCS_ENTRY(18, \
                   LE_3_WB | LE_TC_1_LLC | LE_LRUM(3) | LE_SSE(3), \