]> Git Repo - linux.git/commitdiff
Merge tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm...
authorArnd Bergmann <[email protected]>
Mon, 22 Jan 2018 11:36:57 +0000 (12:36 +0100)
committerArnd Bergmann <[email protected]>
Mon, 22 Jan 2018 11:36:57 +0000 (12:36 +0100)
Pull "Few omap interconnect dts fixes for v4.16 merge window" from
Tony Lindgren:

Now that we have the dts clocks for the clkctrl clock and the
interconnect binding, we need to update the existing ti-sysc
users according to the binding to make it usable for drivers.

Apologies for not being able to send this earlier but it took
me few revisions to get the smartreflex changes right and
tested with yet to be posted patches to make smartreflex probe
with dts and I wanted to have it sit in next for a while to make
sure we're not introducing regressions for legacy platform data
based booting.

Note that this is based on a merge with commit 20a2742e5784
("dt-bindings: ti-sysc: Update binding for timers and capabilities")
to avoid a merge conflict with the binding changes.

* tag 'omap-for-v4.16/dt-clk-dts-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Update ti-sysc data for existing users
  ARM: dts: Fix smartreflex compatible for omap3 shared mpu-iva instance
  dt-bindings: ti-sysc: Update binding for timers and capabilities

1  2 
arch/arm/boot/dts/am3517.dtsi
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap4.dtsi

index 76994165fb3a1f0192dd2638a5c22e78ab64cbb0,0f0117b72e14ae4b642c9440d3cf5433688a883b..ca294914bbb131b9725c43b8e7c768466bf0c775
@@@ -26,7 -26,7 +26,7 @@@
                        interrupt-names = "mc";
                };
  
 -              davinci_emac: ethernet@0x5c000000 {
 +              davinci_emac: ethernet@5c000000 {
                        compatible = "ti,am3517-emac";
                        ti,hwmods = "davinci_emac";
                        status = "disabled";
@@@ -41,7 -41,7 +41,7 @@@
                        local-mac-address = [ 00 00 00 00 00 00 ];
                };
  
 -              davinci_mdio: ethernet@0x5c030000 {
 +              davinci_mdio: ethernet@5c030000 {
                        compatible = "ti,davinci_mdio";
                        ti,hwmods = "davinci_mdio";
                        status = "disabled";
@@@ -99,9 -99,5 +99,5 @@@
        status = "disabled";
  };
  
- &smartreflex_mpu_iva {
-       status = "disabled";
- };
  /include/ "am35xx-clocks.dtsi"
  /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi"
index aabb86663f11a2b2c5af3c3ef3373da7334b2f60,2b0a541f7f1dcaffcfdeb56305319680a4d72cf8..700080a948a312dd37c862d23c7a0ed89ce4e458
@@@ -7,6 -7,8 +7,8 @@@
   * Based on "omap4.dtsi"
   */
  
+ #include <dt-bindings/bus/ti-sysc.h>
+ #include <dt-bindings/clock/dra7.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/pinctrl/dra.h>
  #include <dt-bindings/clock/dra7.h>
@@@ -93,8 -95,6 +95,8 @@@
                        cooling-min-level = <0>;
                        cooling-max-level = <2>;
                        #cooling-cells = <2>; /* min followed by max */
 +
 +                      vbb-supply = <&abb_mpu>;
                };
        };
  
  
                opp_nom-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
 -                      opp-microvolt = <1060000 850000 1150000>;
 +                      opp-microvolt = <1060000 850000 1150000>,
 +                                      <1060000 850000 1150000>;
                        opp-supported-hw = <0xFF 0x01>;
                        opp-suspend;
                };
  
                opp_od-1176000000 {
                        opp-hz = /bits/ 64 <1176000000>;
 -                      opp-microvolt = <1160000 885000 1160000>;
 +                      opp-microvolt = <1160000 885000 1160000>,
 +                                      <1160000 885000 1160000>;
 +
                        opp-supported-hw = <0xFF 0x02>;
                };
 +
 +              opp_high@1500000000 {
 +                      opp-hz = /bits/ 64 <1500000000>;
 +                      opp-microvolt = <1210000 950000 1250000>,
 +                                      <1210000 950000 1250000>;
 +                      opp-supported-hw = <0xFF 0x04>;
 +              };
        };
  
        /*
                         * node and enable pcie1_ep mode.
                         */
                        pcie1_rc: pcie@51000000 {
 -                              compatible = "ti,dra7-pcie";
                                reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
                                reg-names = "rc_dbics", "ti_conf", "config";
                                interrupts = <0 232 0x4>, <0 233 0x4>;
                        };
  
                        pcie1_ep: pcie_ep@51000000 {
 -                              compatible = "ti,dra7-pcie-ep";
                                reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
                                reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
                                interrupts = <0 232 0x4>;
                        ranges = <0x51800000 0x51800000 0x3000
                                  0x0        0x30000000 0x10000000>;
                        status = "disabled";
 -                      pcie@51800000 {
 -                              compatible = "ti,dra7-pcie";
 +                      pcie2_rc: pcie@51800000 {
                                reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
                                reg-names = "rc_dbics", "ti_conf", "config";
                                interrupts = <0 355 0x4>, <0 356 0x4>;
                        ranges;
                        reg = <0x4a090000 0x20>;
                        ti,hwmods = "ocp2scp3";
 -                      sata_phy: phy@4A096000 {
 +                      sata_phy: phy@4a096000 {
                                compatible = "ti,phy-pipe3-sata";
                                reg = <0x4A096000 0x80>, /* phy_rx */
                                      <0x4A096400 0x64>, /* phy_tx */
                target-module@4a0dd000 {
                        compatible = "ti,sysc-omap4-sr";
                        ti,hwmods = "smartreflex_core";
-                       reg = <0x4a0dd000 0x4>,
-                             <0x4a0dd008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0dd038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_CORE_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0dd000 0x001000>;
                target-module@4a0d9000 {
                        compatible = "ti,sysc-omap4-sr";
                        ti,hwmods = "smartreflex_mpu";
-                       reg = <0x4a0d9000 0x4>,
-                             <0x4a0d9008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0d9038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&coreaon_clkctrl DRA7_SMARTREFLEX_MPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0d9000 0x001000>;
                                dr_mode = "otg";
                                snps,dis_u3_susphy_quirk;
                                snps,dis_u2_susphy_quirk;
 +                              snps,dis_metastability_quirk;
                        };
                };
  
                                clocks = <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 9>,
                                         <&dss_clkctrl DRA7_DSS_CORE_CLKCTRL 10>;
                                clock-names = "fck", "sys_clk";
 +                              dmas = <&sdma_xbar 76>;
 +                              dma-names = "audio_tx";
                        };
                };
  
                        clocks = <&l3_iclk_div>;
                        clock-names = "fck";
                };
 +
 +              opp_supply_mpu: opp-supply@4a003b20 {
 +                      compatible = "ti,omap5-opp-supply";
 +                      reg = <0x4a003b20 0xc>;
 +                      ti,efuse-settings = <
 +                      /* uV   offset */
 +                      1060000 0x0
 +                      1160000 0x4
 +                      1210000 0x8
 +                      >;
 +                      ti,absolute-max-voltage-uv = <1500000>;
 +              };
 +
        };
  
        thermal_zones: thermal-zones {
index bb33935df7b057eef7a9b237fc2d2f951f6ab375,2ce18785594f521d35f3c3ea7e542fd7f5577bfe..a005802cd52bc4478980035769c791fd8d549690
                        dma-names = "rx";
                };
  
-               smartreflex_core: smartreflex@480cb000 {
-                       compatible = "ti,omap3-smartreflex-core";
-                       ti,hwmods = "smartreflex_core";
-                       reg = <0x480cb000 0x400>;
-                       interrupts = <19>;
-               };
-               smartreflex_mpu_iva: smartreflex@480c9000 {
-                       compatible = "ti,omap3-smartreflex-iva";
-                       ti,hwmods = "smartreflex_mpu_iva";
-                       reg = <0x480c9000 0x400>;
-                       interrupts = <18>;
-               };
                timer1: timer@48318000 {
                        compatible = "ti,omap3430-timer";
                        reg = <0x48318000 0x400>;
                                compatible = "ti,ohci-omap3";
                                reg = <0x48064400 0x400>;
                                interrupts = <76>;
 +                              remote-wakeup-connected;
                        };
  
                        usbhsehci: ehci@48064800 {
index 18a11f689a1d58fb5a5abbc62e99e0c299d25e1a,6425902f7ae7b78397bd73d004a9939c9438e3dd..2485496297e3481682bcf3f385ac4b6348e3c989
@@@ -6,6 -6,8 +6,8 @@@
   * published by the Free Software Foundation.
   */
  
+ #include <dt-bindings/bus/ti-sysc.h>
+ #include <dt-bindings/clock/omap4.h>
  #include <dt-bindings/gpio/gpio.h>
  #include <dt-bindings/interrupt-controller/arm-gic.h>
  #include <dt-bindings/pinctrl/omap.h>
                        reg = <0x48076000 0x4>,
                              <0x48076010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_per_clkctrl OMAP4_SLIMBUS2_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x48076000 0x001000>;
                elm: elm@48078000 {
                        compatible = "ti,am3352-elm";
                        reg = <0x48078000 0x2000>;
 -                      interrupts = <4>;
 +                      interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
                        ti,hwmods = "elm";
                        status = "disabled";
                };
                target-module@4a0db000 {
                        compatible = "ti,sysc-sr";
                        ti,hwmods = "smartreflex_iva";
-                       reg = <0x4a0db000 0x4>,
-                             <0x4a0db008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0db038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_IVA_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0db000 0x001000>;
                target-module@4a0dd000 {
                        compatible = "ti,sysc-sr";
                        ti,hwmods = "smartreflex_core";
-                       reg = <0x4a0dd000 0x4>,
-                             <0x4a0dd008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0dd038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_CORE_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0dd000 0x001000>;
                target-module@4a0d9000 {
                        compatible = "ti,sysc-sr";
                        ti,hwmods = "smartreflex_mpu";
-                       reg = <0x4a0d9000 0x4>,
-                             <0x4a0d9008 0x4>;
-                       reg-names = "rev", "sysc";
+                       reg = <0x4a0d9038 0x4>;
+                       reg-names = "sysc";
+                       ti,sysc-mask = <SYSC_OMAP3_SR_ENAWAKEUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l4_ao_clkctrl OMAP4_SMARTREFLEX_MPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a0d9000 0x001000>;
                        reg = <0x52000000 0x4>,
                              <0x52000010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-delay-us = <2>;
+                       clocks = <&iss_clkctrl OMAP4_ISS_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x52000000 0x1000000>;
                target-module@40128000 {
                        compatible = "ti,sysc-mcasp";
                        ti,hwmods = "mcasp";
-                       reg = <0x40128004 0x4>;
-                       reg-names = "sysc";
+                       reg = <0x40128000 0x4>,
+                             <0x40128004 0x4>;
+                       reg-names = "rev", "sysc";
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&abe_clkctrl OMAP4_MCASP_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x40128000 0x1000>, /* MPU */
                        reg = <0x4012c000 0x4>,
                              <0x4012c010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&abe_clkctrl OMAP4_SLIMBUS1_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x4012c000 0x1000>, /* MPU */
                        reg = <0x401f1000 0x4>,
                              <0x401f1010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       clocks = <&abe_clkctrl OMAP4_AESS_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0x00000000 0x401f1000 0x1000>, /* MPU */
                        reg = <0x4a10a000 0x4>,
                              <0x4a10a010 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>;
+                       ti,sysc-delay-us = <2>;
+                       clocks = <&iss_clkctrl OMAP4_FDIF_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x4a10a000 0x1000>;
                        usbhsohci: ohci@4a064800 {
                                compatible = "ti,ohci-omap3";
                                reg = <0x4a064800 0x400>;
 -                              interrupt-parent = <&gic>;
                                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 +                              remote-wakeup-connected;
                        };
  
                        usbhsehci: ehci@4a064c00 {
                                compatible = "ti,ehci-omap";
                                reg = <0x4a064c00 0x400>;
 -                              interrupt-parent = <&gic>;
                                interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };
                        reg = <0x5601fc00 0x4>,
                              <0x5601fc10 0x4>;
                        reg-names = "rev", "sysc";
+                       ti,sysc-midle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+                                       <SYSC_IDLE_NO>,
+                                       <SYSC_IDLE_SMART>,
+                                       <SYSC_IDLE_SMART_WKUP>;
+                       clocks = <&l3_gfx_clkctrl OMAP4_GPU_CLKCTRL 0>;
+                       clock-names = "fck";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges = <0 0x56000000 0x2000000>;
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