]> Git Repo - linux.git/commitdiff
drm/amd/display: Disable replay and psr while VRR is enabled
authorTom Chung <[email protected]>
Thu, 5 Dec 2024 15:20:45 +0000 (23:20 +0800)
committerAlex Deucher <[email protected]>
Mon, 13 Jan 2025 19:21:36 +0000 (14:21 -0500)
[Why]
Replay and PSR will cause some video corruption while VRR is enabled.

[How]
1. Disable the Replay and PSR while VRR is enabled.
2. Change the amdgpu_dm_crtc_vrr_active() parameter to const.
   Because the function will only read data from dm_crtc_state.

Reviewed-by: Sun peng Li <[email protected]>
Signed-off-by: Tom Chung <[email protected]>
Signed-off-by: Roman Li <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
(cherry picked from commit d7879340e987b3056b8ae39db255b6c19c170a0d)
Cc: [email protected]
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.h

index a5fd19ee89dca95b6918d228789077a1793b1a1d..5f216d626cbb57536258383640bbca1515a9f70c 100644 (file)
@@ -8896,6 +8896,7 @@ static void amdgpu_dm_enable_self_refresh(struct amdgpu_crtc *acrtc_attach,
        struct replay_settings *pr = &acrtc_state->stream->link->replay_settings;
        struct amdgpu_dm_connector *aconn =
                (struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context;
+       bool vrr_active = amdgpu_dm_crtc_vrr_active(acrtc_state);
 
        if (acrtc_state->update_type > UPDATE_TYPE_FAST) {
                if (pr->config.replay_supported && !pr->replay_feature_enabled)
@@ -8922,7 +8923,8 @@ static void amdgpu_dm_enable_self_refresh(struct amdgpu_crtc *acrtc_attach,
                 * adequate number of fast atomic commits to notify KMD
                 * of update events. See `vblank_control_worker()`.
                 */
-               if (acrtc_attach->dm_irq_params.allow_sr_entry &&
+               if (!vrr_active &&
+                   acrtc_attach->dm_irq_params.allow_sr_entry &&
 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
                    !amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&
 #endif
@@ -9266,7 +9268,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                        bundle->stream_update.abm_level = &acrtc_state->abm_level;
 
                mutex_lock(&dm->dc_lock);
-               if (acrtc_state->update_type > UPDATE_TYPE_FAST) {
+               if ((acrtc_state->update_type > UPDATE_TYPE_FAST) || vrr_active) {
                        if (acrtc_state->stream->link->replay_settings.replay_allow_active)
                                amdgpu_dm_replay_disable(acrtc_state->stream);
                        if (acrtc_state->stream->link->psr_settings.psr_allow_active)
index 3011ea709b910c0c483825346a68ea172363c70a..36a830a7440f1017470cfa92b84ff2dcd5de860c 100644 (file)
@@ -93,7 +93,7 @@ int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable)
        return rc;
 }
 
-bool amdgpu_dm_crtc_vrr_active(struct dm_crtc_state *dm_state)
+bool amdgpu_dm_crtc_vrr_active(const struct dm_crtc_state *dm_state)
 {
        return dm_state->freesync_config.state == VRR_STATE_ACTIVE_VARIABLE ||
               dm_state->freesync_config.state == VRR_STATE_ACTIVE_FIXED;
index 17e948753f59bd1a0b489f44b6cfcc9a66a464b6..c1212947a77b83b19f02544337cc6ba4567c5ea7 100644 (file)
@@ -37,7 +37,7 @@ int amdgpu_dm_crtc_set_vupdate_irq(struct drm_crtc *crtc, bool enable);
 
 bool amdgpu_dm_crtc_vrr_active_irq(struct amdgpu_crtc *acrtc);
 
-bool amdgpu_dm_crtc_vrr_active(struct dm_crtc_state *dm_state);
+bool amdgpu_dm_crtc_vrr_active(const struct dm_crtc_state *dm_state);
 
 int amdgpu_dm_crtc_enable_vblank(struct drm_crtc *crtc);
 
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