Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Catalin Marinas:

 - Re-instate the CPUMASK_OFFSTACK option for arm64 when NR_CPUS > 256.
   The bug that led to the initial revert was the cpufreq-dt code not
   using zalloc_cpumask_var().

 - Make the STARFIVE_STARLINK_PMU config option depend on 64BIT to
   prevent compile-test failures on 32-bit architectures due to missing
   writeq().

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  perf: starfive: fix 64-bit only COMPILE_TEST condition
  ARM64: Dynamically allocate cpumasks and increase supported CPUs to 512

diff --combined arch/arm64/Kconfig
index 77e05d4959f289313488dc5b03d9254db571e50f,a03de40bd4cd7c2168d51bcd6ff7988a667833a8..7b11c98b3e84bf76bcd6a33b34af257a9b7f48d7
--- 1/arch/arm64/Kconfig
--- 2/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@@ -107,7 -107,7 +107,7 @@@ config ARM6
        select ARCH_WANT_LD_ORPHAN_WARN
        select ARCH_WANTS_NO_INSTR
        select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES
 -      select ARCH_HAS_UBSAN_SANITIZE_ALL
 +      select ARCH_HAS_UBSAN
        select ARM_AMBA
        select ARM_ARCH_TIMER
        select ARM_GIC
@@@ -120,6 -120,7 +120,7 @@@
        select CLONE_BACKWARDS
        select COMMON_CLK
        select CPU_PM if (SUSPEND || CPU_IDLE)
+       select CPUMASK_OFFSTACK if NR_CPUS > 256
        select CRC32
        select DCACHE_WORD_ACCESS
        select DYNAMIC_FTRACE if FUNCTION_TRACER
@@@ -216,6 -217,7 +217,6 @@@
        select HAVE_HW_BREAKPOINT if PERF_EVENTS
        select HAVE_IOREMAP_PROT
        select HAVE_IRQ_TIME_ACCOUNTING
 -      select HAVE_KVM
        select HAVE_MOD_ARCH_SPECIFIC
        select HAVE_NMI
        select HAVE_PERF_EVENTS
@@@ -277,21 -279,27 +278,21 @@@ config 64BI
  config MMU
        def_bool y
  
 -config ARM64_PAGE_SHIFT
 -      int
 -      default 16 if ARM64_64K_PAGES
 -      default 14 if ARM64_16K_PAGES
 -      default 12
 -
  config ARM64_CONT_PTE_SHIFT
        int
 -      default 5 if ARM64_64K_PAGES
 -      default 7 if ARM64_16K_PAGES
 +      default 5 if PAGE_SIZE_64KB
 +      default 7 if PAGE_SIZE_16KB
        default 4
  
  config ARM64_CONT_PMD_SHIFT
        int
 -      default 5 if ARM64_64K_PAGES
 -      default 5 if ARM64_16K_PAGES
 +      default 5 if PAGE_SIZE_64KB
 +      default 5 if PAGE_SIZE_16KB
        default 4
  
  config ARCH_MMAP_RND_BITS_MIN
 -      default 14 if ARM64_64K_PAGES
 -      default 16 if ARM64_16K_PAGES
 +      default 14 if PAGE_SIZE_64KB
 +      default 16 if PAGE_SIZE_16KB
        default 18
  
  # max bits determined by the following formula:
@@@ -378,8 -386,8 +379,8 @@@ config BROKEN_GAS_INS
  config BUILTIN_RETURN_ADDRESS_STRIPS_PAC
        bool
        # Clang's __builtin_return_adddress() strips the PAC since 12.0.0
 -      # https://reviews.llvm.org/D75044
 -      default y if CC_IS_CLANG && (CLANG_VERSION >= 120000)
 +      # https://github.com/llvm/llvm-project/commit/2a96f47c5ffca84cd774ad402cacd137f4bf45e2
 +      default y if CC_IS_CLANG
        # GCC's __builtin_return_address() strips the PAC since 11.1.0,
        # and this was backported to 10.2.0, 9.4.0, 8.5.0, but not earlier
        # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94891
@@@ -1252,13 -1260,11 +1253,13 @@@ choic
  
  config ARM64_4K_PAGES
        bool "4KB"
 +      select HAVE_PAGE_SIZE_4KB
        help
          This feature enables 4KB pages support.
  
  config ARM64_16K_PAGES
        bool "16KB"
 +      select HAVE_PAGE_SIZE_16KB
        help
          The system will use 16KB pages support. AArch32 emulation
          requires applications compiled with 16K (or a multiple of 16K)
@@@ -1266,7 -1272,6 +1267,7 @@@
  
  config ARM64_64K_PAGES
        bool "64KB"
 +      select HAVE_PAGE_SIZE_64KB
        help
          This feature enables 64KB pages support (4KB by default)
          allowing only two levels of page tables and faster TLB
@@@ -1285,19 -1290,19 +1286,19 @@@ choic
  
  config ARM64_VA_BITS_36
        bool "36-bit" if EXPERT
 -      depends on ARM64_16K_PAGES
 +      depends on PAGE_SIZE_16KB
  
  config ARM64_VA_BITS_39
        bool "39-bit"
 -      depends on ARM64_4K_PAGES
 +      depends on PAGE_SIZE_4KB
  
  config ARM64_VA_BITS_42
        bool "42-bit"
 -      depends on ARM64_64K_PAGES
 +      depends on PAGE_SIZE_64KB
  
  config ARM64_VA_BITS_47
        bool "47-bit"
 -      depends on ARM64_16K_PAGES
 +      depends on PAGE_SIZE_16KB
  
  config ARM64_VA_BITS_48
        bool "48-bit"
@@@ -1386,6 -1391,7 +1387,6 @@@ choic
  
  config CPU_BIG_ENDIAN
        bool "Build big-endian kernel"
 -      depends on !LD_IS_LLD || LLD_VERSION >= 130000
        # https://github.com/llvm/llvm-project/commit/1379b150991f70a5782e9a143c2ba5308da1161c
        depends on AS_IS_GNU || AS_VERSION >= 150000
        help
@@@ -1425,7 -1431,7 +1426,7 @@@ config SCHED_SM
  config NR_CPUS
        int "Maximum number of CPUs (2-4096)"
        range 2 4096
-       default "256"
+       default "512"
  
  config HOTPLUG_CPU
        bool "Support for hot-pluggable CPUs"
@@@ -1517,7 -1523,7 +1518,7 @@@ config ARCH_SUPPORTS_CRASH_DUM
        def_bool y
  
  config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATION
 -      def_bool CRASH_CORE
 +      def_bool CRASH_RESERVE
  
  config TRANS_TABLE
        def_bool y
@@@ -2016,6 -2022,8 +2017,6 @@@ config ARM64_BTI_KERNE
        depends on !CC_IS_GCC || GCC_VERSION >= 100100
        # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106671
        depends on !CC_IS_GCC
 -      # https://github.com/llvm/llvm-project/commit/a88c722e687e6780dcd6a58718350dc76fcc4cc9
 -      depends on !CC_IS_CLANG || CLANG_VERSION >= 120000
        depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_ARGS)
        help
          Build the kernel with Branch Target Identification annotations
@@@ -2218,22 -2226,13 +2219,22 @@@ config STACKPROTECTOR_PER_TAS
  
  config UNWIND_PATCH_PAC_INTO_SCS
        bool "Enable shadow call stack dynamically using code patching"
 -      # needs Clang with https://reviews.llvm.org/D111780 incorporated
 +      # needs Clang with https://github.com/llvm/llvm-project/commit/de07cde67b5d205d58690be012106022aea6d2b3 incorporated
        depends on CC_IS_CLANG && CLANG_VERSION >= 150000
        depends on ARM64_PTR_AUTH_KERNEL && CC_HAS_BRANCH_PROT_PAC_RET
        depends on SHADOW_CALL_STACK
        select UNWIND_TABLES
        select DYNAMIC_SCS
  
 +config ARM64_CONTPTE
 +      bool "Contiguous PTE mappings for user memory" if EXPERT
 +      depends on TRANSPARENT_HUGEPAGE
 +      default y
 +      help
 +        When enabled, user mappings are configured using the PTE contiguous
 +        bit, for any mappings that meet the size and alignment requirements.
 +        This reduces TLB pressure and improves performance.
 +
  endmenu # "Kernel Features"
  
  menu "Boot options"