Merge tag 'x86_apic_for_6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 APIC update from Dave Hansen:
 "Coccinelle complained about some 64-bit divisions, but the divisor was
  really just a 32-bit value being stored as 'unsigned long'.

  Fixing the types fixes the warning"

* tag 'x86_apic_for_6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/apic: Improve data types to fix Coccinelle warnings

diff --combined arch/x86/kernel/apic/apic.c
index 0d22aefbde7f327f4a6fab3efe436593de6922d7,e5c9cadc63e1a0b17ddd051b74bb8444f7ceb1e3..66fd4b2a37a3a59197730c2f030cb47957ec8224
--- 1/arch/x86/kernel/apic/apic.c
--- 2/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@@ -497,32 -497,32 +497,32 @@@ static struct clock_event_device lapic_
  static DEFINE_PER_CPU(struct clock_event_device, lapic_events);
  
  static const struct x86_cpu_id deadline_match[] __initconst = {
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */
 +      X86_MATCH_VFM_STEPPINGS(INTEL_HASWELL_X, X86_STEPPINGS(0x2, 0x2), 0x3a), /* EP */
 +      X86_MATCH_VFM_STEPPINGS(INTEL_HASWELL_X, X86_STEPPINGS(0x4, 0x4), 0x0f), /* EX */
  
 -      X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_X,        0x0b000020),
 +      X86_MATCH_VFM(INTEL_BROADWELL_X,        0x0b000020),
  
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),
 +      X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x2, 0x2), 0x00000011),
 +      X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x3, 0x3), 0x0700000e),
 +      X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x4, 0x4), 0x0f00000c),
 +      X86_MATCH_VFM_STEPPINGS(INTEL_BROADWELL_D, X86_STEPPINGS(0x5, 0x5), 0x0e000003),
  
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),
 -      X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),
 +      X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x3, 0x3), 0x01000136),
 +      X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x4, 0x4), 0x02000014),
 +      X86_MATCH_VFM_STEPPINGS(INTEL_SKYLAKE_X, X86_STEPPINGS(0x5, 0xf), 0),
  
 -      X86_MATCH_INTEL_FAM6_MODEL( HASWELL,            0x22),
 -      X86_MATCH_INTEL_FAM6_MODEL( HASWELL_L,          0x20),
 -      X86_MATCH_INTEL_FAM6_MODEL( HASWELL_G,          0x17),
 +      X86_MATCH_VFM(INTEL_HASWELL,            0x22),
 +      X86_MATCH_VFM(INTEL_HASWELL_L,          0x20),
 +      X86_MATCH_VFM(INTEL_HASWELL_G,          0x17),
  
 -      X86_MATCH_INTEL_FAM6_MODEL( BROADWELL,          0x25),
 -      X86_MATCH_INTEL_FAM6_MODEL( BROADWELL_G,        0x17),
 +      X86_MATCH_VFM(INTEL_BROADWELL,          0x25),
 +      X86_MATCH_VFM(INTEL_BROADWELL_G,        0x17),
  
 -      X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE_L,          0xb2),
 -      X86_MATCH_INTEL_FAM6_MODEL( SKYLAKE,            0xb2),
 +      X86_MATCH_VFM(INTEL_SKYLAKE_L,          0xb2),
 +      X86_MATCH_VFM(INTEL_SKYLAKE,            0xb2),
  
 -      X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE_L,         0x52),
 -      X86_MATCH_INTEL_FAM6_MODEL( KABYLAKE,           0x52),
 +      X86_MATCH_VFM(INTEL_KABYLAKE_L,         0x52),
 +      X86_MATCH_VFM(INTEL_KABYLAKE,           0x52),
  
        {},
  };
@@@ -631,7 -631,7 +631,7 @@@ void lapic_update_tsc_freq(void
  static __initdata int lapic_cal_loops = -1;
  static __initdata long lapic_cal_t1, lapic_cal_t2;
  static __initdata unsigned long long lapic_cal_tsc1, lapic_cal_tsc2;
- static __initdata unsigned long lapic_cal_pm1, lapic_cal_pm2;
+ static __initdata u32 lapic_cal_pm1, lapic_cal_pm2;
  static __initdata unsigned long lapic_cal_j1, lapic_cal_j2;
  
  /*
@@@ -641,7 -641,7 +641,7 @@@ static void __init lapic_cal_handler(st
  {
        unsigned long long tsc = 0;
        long tapic = apic_read(APIC_TMCCT);
-       unsigned long pm = acpi_pm_read_early();
+       u32 pm = acpi_pm_read_early();
  
        if (boot_cpu_has(X86_FEATURE_TSC))
                tsc = rdtsc();
@@@ -666,7 -666,7 +666,7 @@@
  }
  
  static int __init
- calibrate_by_pmtimer(long deltapm, long *delta, long *deltatsc)
+ calibrate_by_pmtimer(u32 deltapm, long *delta, long *deltatsc)
  {
        const long pm_100ms = PMTMR_TICKS_PER_SEC / 10;
        const long pm_thresh = pm_100ms / 100;
@@@ -677,7 -677,7 +677,7 @@@
        return -1;
  #endif
  
-       apic_printk(APIC_VERBOSE, "... PM-Timer delta = %ld\n", deltapm);
+       apic_printk(APIC_VERBOSE, "... PM-Timer delta = %u\n", deltapm);
  
        /* Check, if the PM timer is available */
        if (!deltapm)
@@@ -1687,11 -1687,11 +1687,11 @@@ static int x2apic_state
  
  static bool x2apic_hw_locked(void)
  {
 -      u64 ia32_cap;
 +      u64 x86_arch_cap_msr;
        u64 msr;
  
 -      ia32_cap = x86_read_arch_cap_msr();
 -      if (ia32_cap & ARCH_CAP_XAPIC_DISABLE) {
 +      x86_arch_cap_msr = x86_read_arch_cap_msr();
 +      if (x86_arch_cap_msr & ARCH_CAP_XAPIC_DISABLE) {
                rdmsrl(MSR_IA32_XAPIC_DISABLE_STATUS, msr);
                return (msr & LEGACY_XAPIC_DISABLED);
        }
@@@ -1771,7 -1771,7 +1771,7 @@@ void x2apic_setup(void
        __x2apic_enable();
  }
  
 -static __init void apic_set_fixmap(void);
 +static __init void apic_set_fixmap(bool read_apic);
  
  static __init void x2apic_disable(void)
  {
@@@ -1793,12 -1793,7 +1793,12 @@@
        }
  
        __x2apic_disable();
 -      apic_set_fixmap();
 +      /*
 +       * Don't reread the APIC ID as it was already done from
 +       * check_x2apic() and the APIC driver still is a x2APIC variant,
 +       * which fails to do the read after x2APIC was disabled.
 +       */
 +      apic_set_fixmap(false);
  }
  
  static __init void x2apic_enable(void)
@@@ -2062,14 -2057,13 +2062,14 @@@ void __init init_apic_mappings(void
        }
  }
  
 -static __init void apic_set_fixmap(void)
 +static __init void apic_set_fixmap(bool read_apic)
  {
        set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
        apic_mmio_base = APIC_BASE;
        apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",
                    apic_mmio_base, mp_lapic_addr);
 -      apic_read_boot_cpu_id(false);
 +      if (read_apic)
 +              apic_read_boot_cpu_id(false);
  }
  
  void __init register_lapic_address(unsigned long address)
@@@ -2079,7 -2073,7 +2079,7 @@@
        mp_lapic_addr = address;
  
        if (!x2apic_mode)
 -              apic_set_fixmap();
 +              apic_set_fixmap(true);
  }
  
  /*