};
/* intel_idle.max_cstate=0 disables driver */
static int max_cstate = MWAIT_MAX_NUM_CSTATES - 1;
- static int power_policy = 7; /* 0 = max perf; 15 = max powersave */
- static unsigned int substates;
- static int (*choose_substate)(int);
+ static unsigned int mwait_substates;
/* Reliable LAPIC Timer States, bit 1 for C1 etc. */
static unsigned int lapic_timer_reliable_states;
.enter = NULL }, /* disabled */
};
- /*
- * choose_tunable_substate()
- *
- * Run-time decision on which C-state substate to invoke
- * If power_policy = 0, choose shallowest substate (0)
- * If power_policy = 15, choose deepest substate
- * If power_policy = middle, choose middle substate etc.
- */
- static int choose_tunable_substate(int cstate)
- {
- unsigned int num_substates;
- unsigned int substate_choice;
-
- power_policy &= 0xF; /* valid range: 0-15 */
- cstate &= 7; /* valid range: 0-7 */
-
- num_substates = (substates >> ((cstate) * 4)) & MWAIT_SUBSTATE_MASK;
-
- if (num_substates <= 1)
- return 0;
-
- substate_choice = ((power_policy + (power_policy + 1) *
- (num_substates - 1)) / 16);
-
- return substate_choice;
- }
-
- /*
- * choose_zero_substate()
- */
- static int choose_zero_substate(int cstate)
- {
- return 0;
- }
-
/**
* intel_idle
* @dev: cpuidle_device
cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
- eax = eax + (choose_substate)(cstate);
-
local_irq_disable();
if (!(lapic_timer_reliable_states & (1 << (cstate))))
stop_critical_timings();
#ifndef MODULE
- trace_power_start(POWER_CSTATE, (eax >> 4) + 1);
+ trace_power_start(POWER_CSTATE, (eax >> 4) + 1, cpu);
#endif
if (!need_resched()) {
*/
static int intel_idle_probe(void)
{
- unsigned int eax, ebx, ecx, edx;
+ unsigned int eax, ebx, ecx;
if (max_cstate == 0) {
pr_debug(PREFIX "disabled\n");
if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
return -ENODEV;
- cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &edx);
+ cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
!(ecx & CPUID5_ECX_INTERRUPT_BREAK))
return -ENODEV;
- #ifdef DEBUG
- if (substates == 0) /* can over-ride via modparam */
- #endif
- substates = edx;
- pr_debug(PREFIX "MWAIT substates: 0x%x\n", substates);
+ pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
lapic_timer_reliable_states = 0xFFFFFFFF;
case 0x1E: /* Core i7 and i5 Processor - Lynnfield Jasper Forest */
case 0x1F: /* Core i7 and i5 Processor - Nehalem */
case 0x2E: /* Nehalem-EX Xeon */
+ case 0x2F: /* Westmere-EX Xeon */
lapic_timer_reliable_states = (1 << 1); /* C1 */
case 0x25: /* Westmere */
case 0x2C: /* Westmere */
cpuidle_state_table = nehalem_cstates;
- choose_substate = choose_tunable_substate;
break;
case 0x1C: /* 28 - Atom Processor */
+ case 0x26: /* 38 - Lincroft Atom Processor */
lapic_timer_reliable_states = (1 << 2) | (1 << 1); /* C2, C1 */
cpuidle_state_table = atom_cstates;
- choose_substate = choose_zero_substate;
break;
#ifdef FUTURE_USE
case 0x17: /* 23 - Core 2 Duo */
}
/* does the state exist in CPUID.MWAIT? */
- num_substates = (substates >> ((cstate) * 4))
+ num_substates = (mwait_substates >> ((cstate) * 4))
& MWAIT_SUBSTATE_MASK;
if (num_substates == 0)
continue;
module_init(intel_idle_init);
module_exit(intel_idle_exit);
- module_param(power_policy, int, 0644);
module_param(max_cstate, int, 0444);
- #ifdef DEBUG
- module_param(substates, int, 0444);
- #endif
MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION);