x86, mce: Fix mce_start_timer semantics

So mce_start_timer() has a 'cpu' argument which is supposed to mean to
start a timer on that cpu. However, the code currently starts a timer on
the *current* cpu the function runs on and causes the sanity-check in
mce_timer_fn to fire:

	WARNING: CPU: 0 PID: 0 at arch/x86/kernel/cpu/mcheck/mce.c:1286 mce_timer_fn

because it is running on the wrong cpu.

This was triggered by Prarit Bhargava <[email protected]> by offlining
all the cpus in succession.

Then, we were fiddling with the CMCI storm settings when starting the
timer whereas there's no need for that - if there's storm happening
on this newly restarted cpu, we're going to be in normal CMCI mode
initially and then when the CMCI interrupt starts firing, we're going to
go to the polling mode with the timer real soon.

Signed-off-by: Borislav Petkov <[email protected]>
Tested-by: Prarit Bhargava <[email protected]>
Cc: Tony Luck <[email protected]>
Reviewed-by: Chen, Gong <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]

diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index a389c1d859ec968608367ef06f9583a79f47f951..4d5419b249da5353afb24edd23c8410d60f8079d 100644 (file)
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1638,15 +1638,15 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
 
 static void mce_start_timer(unsigned int cpu, struct timer_list *t)
 {
-       unsigned long iv = mce_adjust_timer(check_interval * HZ);
-
-       __this_cpu_write(mce_next_interval, iv);
+       unsigned long iv = check_interval * HZ;
 
        if (mca_cfg.ignore_ce || !iv)
                return;
 
+       per_cpu(mce_next_interval, cpu) = iv;
+
        t->expires = round_jiffies(jiffies + iv);
-       add_timer_on(t, smp_processor_id());
+       add_timer_on(t, cpu);
 }
 
 static void __mcheck_cpu_init_timer(void)