MAINTAINERS: Add Chuanhua Lei as Intel LGM GW PCIe maintainer

Rahul Tanwar is no longer at Maxlinear, so update the MAINTAINERS entry
for the PCIe driver for Intel LGM GW SoC.

Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Zhu YiXin <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Rahul Tanwar <[email protected]>
Acked-by: Lei Chuanhua <[email protected]>

diff --git a/MAINTAINERS b/MAINTAINERS
index 7e0b87d5aa2e571d8a54ea4df45fc27897afeff5..31c4e5e9c411361ce13658a165a52019faa7db9e 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16349,7 +16349,7 @@ F:      Documentation/devicetree/bindings/pci/intel,keembay-pcie*
 F:     drivers/pci/controller/dwc/pcie-keembay.c
 
 PCIE DRIVER FOR INTEL LGM GW SOC
-M:     Rahul Tanwar <rtanwar@maxlinear.com>
+M:     Chuanhua Lei <lchuanhua@maxlinear.com>
 L:     [email protected]
 S:     Maintained
 F:     Documentation/devicetree/bindings/pci/intel-gw-pcie.yaml