The LLVM Target parser currently does not allow to specify the security
extension as part of -march (see also LLVM Bug 40186 [0]). When trying
to use Clang with LLVM's integrated assembler, this leads to build
errors such as this:
clang-8: error: the clang compiler does not support '-Wa,-march=armv7-a+sec'
Use ".arch_extension sec" to enable the security extension in a more
portable fasion. Also make sure to use ".arch armv7-a" in case a v6/v7
multi-platform kernel is being built.
Note that this is technically not exactly the same as the old code
checked for availabilty of the security extension by calling as-instr.
However, there are already other sites which use ".arch_extension sec"
unconditionally, hence de-facto we need an assembler capable of
".arch_extension sec" already today (arch/arm/mm/proc-v7.S). The
arch extension "sec" is available since binutils 2.21 according to
its documentation [1].
[0] https://bugs.llvm.org/show_bug.cgi?id=40186
[1] https://sourceware.org/binutils/docs-2.21/as/ARM-Options.html
Signed-off-by: Stefan Agner <[email protected]>
Acked-by: Mans Rullgard <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Olof Johansson <[email protected]>
# Support for secure monitor traps
obj-$(CONFIG_ARCH_BCM_MOBILE_SMC) += bcm_kona_smc.o
-ifeq ($(call as-instr,.arch_extension sec,as_has_sec),as_has_sec)
-CFLAGS_bcm_kona_smc.o += -Wa,-march=armv7-a+sec -DREQUIRES_SEC
-endif
# BCM2835
obj-$(CONFIG_ARCH_BCM2835) += board_bcm2835.o
__asmeq("%2", "r4")
__asmeq("%3", "r5")
__asmeq("%4", "r6")
-#ifdef REQUIRES_SEC
".arch_extension sec\n"
-#endif
" smc #0\n"
: "=r" (ip), "=r" (r0)
: "r" (r4), "r" (r5), "r" (r6)
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
-plus_sec := $(call as-instr,.arch_extension sec,+sec)
-AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
-AFLAGS_sleep.o :=-Wa,-march=armv7-a$(plus_sec)
-
obj-$(CONFIG_MCPM) += mcpm-exynos.o
CFLAGS_mcpm-exynos.o += -march=armv7-a
/*
* Function signature: void exynos_smc(u32 cmd, u32 arg1, u32 arg2, u32 arg3)
*/
-
+ .arch armv7-a
+ .arch_extension sec
ENTRY(exynos_smc)
stmfd sp!, {r4-r11, lr}
dsb
ENDPROC(exynos_cpu_resume)
.align
-
+ .arch armv7-a
+ .arch_extension sec
ENTRY(exynos_cpu_resume_ns)
mrc p15, 0, r0, c0, c0, 0
ldr r1, =CPU_MASK
# SPDX-License-Identifier: GPL-2.0-only
obj-y := highbank.o system.o smc.o
-plus_sec := $(call as-instr,.arch_extension sec,+sec)
-AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec)
-
obj-$(CONFIG_PM_SLEEP) += pm.o
* the monitor API number.
* Function signature : void highbank_smc1(u32 fn, u32 arg)
*/
-
+ .arch armv7-a
+ .arch_extension sec
ENTRY(highbank_smc1)
stmfd sp!, {r4-r11, lr}
mov r12, r0
# SPDX-License-Identifier: GPL-2.0
obj-y := keystone.o smc.o
-plus_sec := $(call as-instr,.arch_extension sec,+sec)
-AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec)
-
obj-$(CONFIG_SMP) += platsmp.o
# PM domain driver for Keystone SOCs
*
* Return: Non zero value on failure
*/
+ .arch_extension sec
ENTRY(keystone_cpu_smc)
stmfd sp!, {r4-r11, lr}
smc #0
obj-$(CONFIG_SOC_AM43XX) += $(omap-4-5-common)
obj-$(CONFIG_SOC_DRA7XX) += $(omap-4-5-common) $(smp-y) sleep44xx.o
-plus_sec := $(call as-instr,.arch_extension sec,+sec)
-AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
-AFLAGS_omap-smc.o :=-Wa,-march=armv7-a$(plus_sec)
-AFLAGS_sleep44xx.o :=-Wa,-march=armv7-a$(plus_sec)
-
# Functions loaded to SRAM
obj-$(CONFIG_SOC_OMAP2420) += sram242x.o
obj-$(CONFIG_SOC_OMAP2430) += sram243x.o
obj-$(CONFIG_POWER_AVS_OMAP_CLASS3) += smartreflex-class3.o
AFLAGS_sleep24xx.o :=-Wa,-march=armv6
-AFLAGS_sleep34xx.o :=-Wa,-march=armv7-a$(plus_sec)
-AFLAGS_sleep33xx.o :=-Wa,-march=armv7-a$(plus_sec)
-AFLAGS_sleep43xx.o :=-Wa,-march=armv7-a$(plus_sec)
endif
* omap5_secondary_startup if the primary CPU was put into HYP mode by
* the boot loader.
*/
+ .arch armv7-a
+ .arch_extension sec
ENTRY(omap5_secondary_hyp_startup)
wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
ldr r0, [r2]
* link register "lr".
* Function signature : void omap_smc1(u32 fn, u32 arg)
*/
-
+ .arch armv7-a
+ .arch_extension sec
ENTRY(omap_smc1)
stmfd sp!, {r2-r12, lr}
mov r12, r0
#define BIT(nr) (1 << (nr))
.arm
+ .arch armv7-a
.align 3
ENTRY(am33xx_do_wfi)
*
* r0 = physical address of the parameters
*/
+ .arch armv7-a
+ .arch_extension sec
ENTRY(save_secure_ram_context)
stmfd sp!, {r4 - r11, lr} @ save registers on stack
mov r3, r0 @ physical address of parameters
#define RTC_PMIC_EXT_WAKEUP_EN BIT(0)
.arm
+ .arch armv7-a
+ .arch_extension sec
.align 3
ENTRY(am43xx_do_wfi)
#include "omap44xx.h"
#include "omap4-sar-layout.h"
+ .arch armv7-a
+
#if defined(CONFIG_SMP) && defined(CONFIG_PM)
+ .arch_extension sec
.macro DO_SMC
dsb
smc #0
# SPDX-License-Identifier: GPL-2.0
-plus_sec := $(call as-instr,.arch_extension sec,+sec)
-AFLAGS_smc.o := -Wa,-march=armv7-a$(plus_sec)
-
obj-y += setup.o smc.o
obj-$(CONFIG_SMP) += platsmp.o
obj-$(CONFIG_SUSPEND) += pm.o
/* SPDX-License-Identifier: GPL-2.0 */
#include <linux/linkage.h>
+ .arch armv7-a
+ .arch_extension sec
ENTRY(tango_smc)
push {lr}
mov ip, r1
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