mfd: exynos-lpass: Enable UART module support

This patch enables proper interrupts routing between UART module
in Exynos Audio SubSystem and the rest of the SoC. This routing is
completely transparent for UART device and CPU/GIC. UART driver requests
interrupts from the respective controller and enables/masks/handles it
by itself via standard methods.

There are boards (for example TM2), which use UART module in Exynos Audio
SubStem for communication with BlueTooth chip.

Signed-off-by: Beomho Seo <[email protected]>
[mszyprow: rephrased commit message, added UART reset]
Signed-off-by: Marek Szyprowski <[email protected]>
Reviewed-by: Sylwester Nawrocki <[email protected]>
Signed-off-by: Lee Jones <[email protected]>

diff --git a/drivers/mfd/exynos-lpass.c b/drivers/mfd/exynos-lpass.c
index ca829f85672f8f0663b6bc8b3d7dffe79cac8a05..2713de989f0534523d96b121cfc22ac75f872d72 100644 (file)
--- a/drivers/mfd/exynos-lpass.c
+++ b/drivers/mfd/exynos-lpass.c
@@ -82,11 +82,13 @@ static void exynos_lpass_enable(struct exynos_lpass *lpass)
                     LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
 
        regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK,
-                    LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S);
+                    LPASS_INTR_SFR | LPASS_INTR_DMA | LPASS_INTR_I2S |
+                    LPASS_INTR_UART);
 
        exynos_lpass_core_sw_reset(lpass, LPASS_I2S_SW_RESET);
        exynos_lpass_core_sw_reset(lpass, LPASS_DMA_SW_RESET);
        exynos_lpass_core_sw_reset(lpass, LPASS_MEM_SW_RESET);
+       exynos_lpass_core_sw_reset(lpass, LPASS_UART_SW_RESET);
 }
 
 static void exynos_lpass_disable(struct exynos_lpass *lpass)