drm/i915: Fix cmd parser desc matching with masks

Our variety of defined gpu commands have the actual
command id field and possibly length and flags applied.

We did start to apply the mask during initialization of
the cmd descriptors but forgot to also apply it on comparisons.

Fix comparisons in order to properly deny access with
associated commands.

v2: fix lri with correct mask (Chris)

References: 926abff21a8f ("drm/i915/cmdparser: Ignore Length operands during command matching")
Reported-by: Nicolai Stange <[email protected]>
Cc: [email protected] # v5.4+
Cc: Miroslav Benes <[email protected]>
Cc: Takashi Iwai <[email protected]>
Cc: Tyler Hicks <[email protected]>
Cc: Jon Bloomfield <[email protected]>
Cc: Chris Wilson <[email protected]>
Signed-off-by: Mika Kuoppala <[email protected]>
Reviewed-by: Chris Wilson <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 372354d33f55210d322422f0e193e319d2ec9522..5ac4a999f05a6ebb58ff9a8092d2a474416f97c7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -1204,6 +1204,12 @@ static u32 *copy_batch(struct drm_i915_gem_object *dst_obj,
        return dst;
 }
 
+static inline bool cmd_desc_is(const struct drm_i915_cmd_descriptor * const desc,
+                              const u32 cmd)
+{
+       return desc->cmd.value == (cmd & desc->cmd.mask);
+}
+
 static bool check_cmd(const struct intel_engine_cs *engine,
                      const struct drm_i915_cmd_descriptor *desc,
                      const u32 *cmd, u32 length)
@@ -1242,19 +1248,19 @@ static bool check_cmd(const struct intel_engine_cs *engine,
                         * allowed mask/value pair given in the whitelist entry.
                         */
                        if (reg->mask) {
-                               if (desc->cmd.value == MI_LOAD_REGISTER_MEM) {
+                               if (cmd_desc_is(desc, MI_LOAD_REGISTER_MEM)) {
                                        DRM_DEBUG("CMD: Rejected LRM to masked register 0x%08X\n",
                                                  reg_addr);
                                        return false;
                                }
 
-                               if (desc->cmd.value == MI_LOAD_REGISTER_REG) {
+                               if (cmd_desc_is(desc, MI_LOAD_REGISTER_REG)) {
                                        DRM_DEBUG("CMD: Rejected LRR to masked register 0x%08X\n",
                                                  reg_addr);
                                        return false;
                                }
 
-                               if (desc->cmd.value == MI_LOAD_REGISTER_IMM(1) &&
+                               if (cmd_desc_is(desc, MI_LOAD_REGISTER_IMM(1)) &&
                                    (offset + 2 > length ||
                                     (cmd[offset + 1] & reg->mask) != reg->value)) {
                                        DRM_DEBUG("CMD: Rejected LRI to masked register 0x%08X\n",
@@ -1478,7 +1484,7 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine,
                        break;
                }
 
-               if (desc->cmd.value == MI_BATCH_BUFFER_START) {
+               if (cmd_desc_is(desc, MI_BATCH_BUFFER_START)) {
                        ret = check_bbstart(cmd, offset, length, batch_length,
                                            batch_addr, shadow_addr,
                                            jump_whitelist);