Merge tag 'drm-intel-fixes-2019-06-03' of git://anongit.freedesktop.org/drm/drm-intel...

- Add missing Icelake W/A to disable GPU hang on cache ECC error
- GVT a fix for recently seen arbitrary DMA map fault and more enforcement fixes.

Signed-off-by: Dave Airlie <[email protected]>
From: Joonas Lahtinen <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

diff --combined drivers/gpu/drm/i915/i915_reg.h
index 249d35c12a7553811fe0ba8ecd66574dad25329a,c0ab955877c799e6b2740bf66f29d53c2fd640b9..2aa69d347ec4070de9fd27aaf1e138d8a305dcd5
--- 1/drivers/gpu/drm/i915/i915_reg.h
--- 2/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@@ -35,7 -35,7 +35,7 @@@
   * macros. Do **not** mass change existing definitions just to update the style.
   *
   * Layout
 - * ''''''
 + * ~~~~~~
   *
   * Keep helper macros near the top. For example, _PIPE() and friends.
   *
@@@ -79,7 -79,7 +79,7 @@@
   * style. Use lower case in hexadecimal values.
   *
   * Naming
 - * ''''''
 + * ~~~~~~
   *
   * Try to name registers according to the specs. If the register name changes in
   * the specs from platform to another, stick to the original name.
@@@ -97,7 -97,7 +97,7 @@@
   * suffix to the name. For example, ``_SKL`` or ``_GEN8``.
   *
   * Examples
 - * ''''''''
 + * ~~~~~~~~
   *
   * (Note that the values in the example are indented using spaces instead of
   * TABs to avoid misalignment in generated documentation. Use TABs in the
@@@ -7620,6 -7620,9 +7620,9 @@@ enum 
    #define GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION            (1 << 8)
    #define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE                        (1 << 0)
  
+ #define GEN8_L3CNTLREG        _MMIO(0x7034)
+   #define GEN8_ERRDETBCTRL (1 << 9)
+ 
  #define GEN11_COMMON_SLICE_CHICKEN3           _MMIO(0x7304)
    #define GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC  (1 << 11)
  

diff --combined drivers/gpu/drm/i915/intel_workarounds.c
index 6decd432f4d3b12a1455a00a87491e8391258522,03c305151dcf33ed1aea9eae4eb3187bdf469581..841b8e515f4d6fdc95cc317bd57df34aefebc161
--- 1/drivers/gpu/drm/i915/intel_workarounds.c
--- 2/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@@ -37,7 -37,7 +37,7 @@@
   *    costly and simplifies things. We can revisit this in the future.
   *
   * Layout
 - * ''''''
 + * ~~~~~~
   *
   * Keep things in this file ordered by WA type, as per the above (context, GT,
   * display, register whitelist, batchbuffer). Then, inside each type, keep the
@@@ -518,6 -518,12 +518,12 @@@ static void icl_ctx_workarounds_init(st
        struct drm_i915_private *i915 = engine->i915;
        struct i915_wa_list *wal = &engine->ctx_wa_list;
  
+       /* WaDisableBankHangMode:icl */
+       wa_write(wal,
+                GEN8_L3CNTLREG,
+                intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
+                GEN8_ERRDETBCTRL);
+ 
        /* Wa_1604370585:icl (pre-prod)
         * Formerly known as WaPushConstantDereferenceHoldDisable
         */