platform/x86/amd: pmc: Utilize SMN index 0 for driver probe

The current SMN index used for the driver probe seems to be meant
for the BIOS pair and there are potential concurrency problems that can
occur with an inopportune SMI.

It is been advised to use SMN_INDEX_0 instead of SMN_INDEX_2, which is
what amd_nb.c provides and this function has protections to ensure that
only one caller can use it at a time.

Fixes: 156ec4731cb2 ("platform/x86: amd-pmc: Add AMD platform support for S2Idle")
Co-developed-by: Sanket Goswami <[email protected]>
Signed-off-by: Sanket Goswami <[email protected]>
Signed-off-by: Shyam Sundar S K <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Hans de Goede <[email protected]>
Signed-off-by: Hans de Goede <[email protected]>

diff --git a/drivers/platform/x86/amd/Kconfig b/drivers/platform/x86/amd/Kconfig
index 2ce8cb2170dfc0f9258bd47c4a1d2398f5364c4f..d9685aef0887d681e739a1f4dd43a2e1a32955b6 100644 (file)
--- a/drivers/platform/x86/amd/Kconfig
+++ b/drivers/platform/x86/amd/Kconfig
@@ -7,7 +7,7 @@ source "drivers/platform/x86/amd/pmf/Kconfig"
 
 config AMD_PMC
        tristate "AMD SoC PMC driver"
-       depends on ACPI && PCI && RTC_CLASS
+       depends on ACPI && PCI && RTC_CLASS && AMD_NB
        select SERIO
        help
          The driver provides support for AMD Power Management Controller

diff --git a/drivers/platform/x86/amd/pmc.c b/drivers/platform/x86/amd/pmc.c
index 8d03edd4d67c761a1b7357a7da605d2260ece91b..256bd10f277e66f90de61cf08f8bea453736e671 100644 (file)
--- a/drivers/platform/x86/amd/pmc.c
+++ b/drivers/platform/x86/amd/pmc.c
@@ -10,6 +10,7 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
+#include <asm/amd_nb.h>
 #include <linux/acpi.h>
 #include <linux/bitfield.h>
 #include <linux/bits.h>
@@ -56,8 +57,6 @@
 #define S2D_TELEMETRY_DRAMBYTES_MAX    0x1000000
 
 /* Base address of SMU for mapping physical address to virtual address */
-#define AMD_PMC_SMU_INDEX_ADDRESS      0xB8
-#define AMD_PMC_SMU_INDEX_DATA         0xBC
 #define AMD_PMC_MAPPING_SIZE           0x01000
 #define AMD_PMC_BASE_ADDR_OFFSET       0x10000
 #define AMD_PMC_BASE_ADDR_LO           0x13B102E8
@@ -983,30 +982,18 @@ static int amd_pmc_probe(struct platform_device *pdev)
 
        dev->cpu_id = rdev->device;
        dev->rdev = rdev;
-       err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_LO);
-       if (err) {
-               dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
-               err = pcibios_err_to_errno(err);
-               goto err_pci_dev_put;
-       }
-
-       err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
+       err = amd_smn_read(0, AMD_PMC_BASE_ADDR_LO, &val);
        if (err) {
+               dev_err(dev->dev, "error reading 0x%x\n", AMD_PMC_BASE_ADDR_LO);
                err = pcibios_err_to_errno(err);
                goto err_pci_dev_put;
        }
 
        base_addr_lo = val & AMD_PMC_BASE_ADDR_HI_MASK;
 
-       err = pci_write_config_dword(rdev, AMD_PMC_SMU_INDEX_ADDRESS, AMD_PMC_BASE_ADDR_HI);
-       if (err) {
-               dev_err(dev->dev, "error writing to 0x%x\n", AMD_PMC_SMU_INDEX_ADDRESS);
-               err = pcibios_err_to_errno(err);
-               goto err_pci_dev_put;
-       }
-
-       err = pci_read_config_dword(rdev, AMD_PMC_SMU_INDEX_DATA, &val);
+       err = amd_smn_read(0, AMD_PMC_BASE_ADDR_HI, &val);
        if (err) {
+               dev_err(dev->dev, "error reading 0x%x\n", AMD_PMC_BASE_ADDR_HI);
                err = pcibios_err_to_errno(err);
                goto err_pci_dev_put;
        }