]> Git Repo - linux.git/commitdiff
x86/cpu: Add CLZERO detection
authorWan Zongshun <[email protected]>
Fri, 30 Oct 2015 12:11:39 +0000 (13:11 +0100)
committerIngo Molnar <[email protected]>
Sun, 1 Nov 2015 10:26:23 +0000 (11:26 +0100)
AMD Fam17h processors introduce support for the CLZERO
instruction. It zeroes out the 64 byte cache line specified in
RAX.

Add the bit here to allow /proc/cpuinfo to list the feature.

Boris: we're adding this as a separate ->x86_capability leaf
because CPUID_80000008_EBX is going to contain more feature bits
and it will fill out with time.

Signed-off-by: Wan Zongshun <[email protected]>
Signed-off-by: Aravind Gopalakrishnan <[email protected]>
[ Wrap code in patch form, fix comments. ]
Signed-off-by: Borislav Petkov <[email protected]>
Cc: Andy Lutomirski <[email protected]>
Cc: Borislav Petkov <[email protected]>
Cc: Denys Vlasenko <[email protected]>
Cc: H. Peter Anvin <[email protected]>
Cc: Huang Rui <[email protected]>
Cc: Linus Torvalds <[email protected]>
Cc: Peter Zijlstra <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Tony Luck <[email protected]>
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Ingo Molnar <[email protected]>
arch/x86/include/asm/cpufeature.h
arch/x86/kernel/cpu/common.c

index 9727b3b48bd174c8ae8297bd94e897484375618a..e4f8010f22e04d2f261bb73bc7745f68f36a392f 100644 (file)
@@ -12,7 +12,7 @@
 #include <asm/disabled-features.h>
 #endif
 
-#define NCAPINTS       13      /* N 32-bit words worth of info */
+#define NCAPINTS       14      /* N 32-bit words worth of info */
 #define NBUGINTS       1       /* N 32-bit bug flags */
 
 /*
 /* Intel-defined CPU QoS Sub-leaf, CPUID level 0x0000000F:1 (edx), word 12 */
 #define X86_FEATURE_CQM_OCCUP_LLC (12*32+ 0) /* LLC occupancy monitoring if 1 */
 
+/* AMD-defined CPU features, CPUID level 0x80000008 (ebx), word 13 */
+#define X86_FEATURE_CLZERO     (13*32+0) /* CLZERO instruction */
+
 /*
  * BUG word(s)
  */
index de22ea7ff82f93ea1a8d4a204f10a7c6e8fdef76..4ddd780aeac90ab353134453316dc18108c8b308 100644 (file)
@@ -670,6 +670,7 @@ void get_cpu_cap(struct cpuinfo_x86 *c)
 
                c->x86_virt_bits = (eax >> 8) & 0xff;
                c->x86_phys_bits = eax & 0xff;
+               c->x86_capability[13] = cpuid_ebx(0x80000008);
        }
 #ifdef CONFIG_X86_32
        else if (cpu_has(c, X86_FEATURE_PAE) || cpu_has(c, X86_FEATURE_PSE36))
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