]> Git Repo - linux.git/commitdiff
drm/amdgpu: introduce new doorbell assignment table for GC 9.4.3
authorLe Ma <[email protected]>
Mon, 25 Apr 2022 14:19:58 +0000 (22:19 +0800)
committerAlex Deucher <[email protected]>
Fri, 9 Jun 2023 13:44:03 +0000 (09:44 -0400)
Four basic reasons as below to do the change:
  1. number of ring expand a lot on GC 9.4.3, and adjustment on old
     assignment cannot make each ring in a continuous doorbell space.
  2. the SDMA doorbell index should not exceed 0x1FF on SDMA 4.2.2 due to
     regDOORBELLx_CTRL_ENTRY.BIF_DOORBELLx_RANGE_OFFSET_ENTRY field width.
  3. re-design the doorbell assignment and unify the calculation as
     "start + ring/inst id" will make the code much concise.
  4. only defining the START/END makes the table look simple

v2: (Lijo)
  1. replace name
  2. use num_inst_per_aid/sdma_doorbell_range instead of hardcoding

Signed-off-by: Le Ma <[email protected]>
Reviewed-by: Lijo Lazar <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

index b036d2f019300965261751af1c75e6aabd95b446..a29a018ec84eaac9895e64bfff1071339e136755 100644 (file)
@@ -59,7 +59,7 @@ struct amdgpu_doorbell_index {
        uint32_t gfx_ring1;
        uint32_t gfx_userqueue_start;
        uint32_t gfx_userqueue_end;
-       uint32_t sdma_engine[8];
+       uint32_t sdma_engine[16];
        uint32_t mes_ring0;
        uint32_t mes_ring1;
        uint32_t ih;
@@ -83,9 +83,6 @@ struct amdgpu_doorbell_index {
        };
        uint32_t first_non_cp;
        uint32_t last_non_cp;
-       uint32_t xcc1_kiq_start;
-       uint32_t xcc1_mec_ring0_start;
-       uint32_t aid1_sdma_start;
        uint32_t max_assignment;
        /* Per engine SDMA doorbell size in dword */
        uint32_t sdma_doorbell_range;
@@ -312,6 +309,33 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT
        AMDGPU_DOORBELL64_INVALID                 = 0xFFFF
 } AMDGPU_DOORBELL64_ASSIGNMENT;
 
+typedef enum _AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1
+{
+       /* KIQ: 0~7 for maximum 8 XCD */
+       AMDGPU_DOORBELL_LAYOUT1_KIQ_START               = 0x000,
+       AMDGPU_DOORBELL_LAYOUT1_HIQ                     = 0x008,
+       AMDGPU_DOORBELL_LAYOUT1_DIQ                     = 0x009,
+       /* Compute: 0x0A ~ 0x49 */
+       AMDGPU_DOORBELL_LAYOUT1_MEC_RING_START          = 0x00A,
+       AMDGPU_DOORBELL_LAYOUT1_MEC_RING_END            = 0x049,
+       AMDGPU_DOORBELL_LAYOUT1_USERQUEUE_START         = 0x04A,
+       AMDGPU_DOORBELL_LAYOUT1_USERQUEUE_END           = 0x0C9,
+       /* SDMA: 0x100 ~ 0x19F */
+       AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_START       = 0x100,
+       AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_END         = 0x19F,
+       /* IH: 0x1A0 ~ 0x1AF */
+       AMDGPU_DOORBELL_LAYOUT1_IH                      = 0x1A0,
+       /* VCN: 0x1B0 ~ 0x1C2 */
+       AMDGPU_DOORBELL_LAYOUT1_VCN_START               = 0x1B0,
+       AMDGPU_DOORBELL_LAYOUT1_VCN_END                 = 0x1C2,
+
+       AMDGPU_DOORBELL_LAYOUT1_FIRST_NON_CP            = AMDGPU_DOORBELL_LAYOUT1_sDMA_ENGINE_START,
+       AMDGPU_DOORBELL_LAYOUT1_LAST_NON_CP             = AMDGPU_DOORBELL_LAYOUT1_VCN_END,
+
+       AMDGPU_DOORBELL_LAYOUT1_MAX_ASSIGNMENT          = 0x1C2,
+       AMDGPU_DOORBELL_LAYOUT1_INVALID                 = 0xFFFF
+} AMDGPU_DOORBELL_ASSIGNMENT_LAYOUT1;
+
 u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index);
 void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v);
 u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index);
index 49b18cf987aa38154e1b65ffe1f7000e1235ad38..76438f197de1b128e70a40ae1d63e4a4f7a309b4 100644 (file)
@@ -315,11 +315,7 @@ int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev,
        ring->use_doorbell = true;
        ring->xcc_id = xcc_id;
        ring->vm_hub = AMDGPU_GFXHUB(xcc_id);
-       if (xcc_id >= 1)
-               ring->doorbell_index = (adev->doorbell_index.xcc1_kiq_start +
-                                       xcc_id - 1) << 1;
-       else
-               ring->doorbell_index = adev->doorbell_index.kiq << 1;
+       ring->doorbell_index = (adev->doorbell_index.kiq + xcc_id) << 1;
 
        r = amdgpu_gfx_kiq_acquire(adev, ring, xcc_id);
        if (r)
index a9fab8de29e89d683ad6fe6bc42571d1db1bb412..52185b1d5d3101c439669909a925e2c4dc132aa6 100644 (file)
@@ -817,13 +817,7 @@ static int gfx_v9_4_3_compute_ring_init(struct amdgpu_device *adev, int ring_id,
 
        ring->ring_obj = NULL;
        ring->use_doorbell = true;
-       if (xcc_id >= 1)
-               ring->doorbell_index =
-                               (adev->doorbell_index.xcc1_mec_ring0_start +
-                               ring_id - adev->gfx.num_compute_rings) << 1;
-       else
-               ring->doorbell_index =
-                               (adev->doorbell_index.mec_ring0 + ring_id) << 1;
+       ring->doorbell_index = (adev->doorbell_index.mec_ring0 + ring_id) << 1;
        ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr
                                + (ring_id * GFX9_MEC_HPD_SIZE);
        ring->vm_hub = AMDGPU_GFXHUB(xcc_id);
index d3c7f9a43ef13f53a8f525d8917b62b47a587ee1..9b53174925f8c3f795738e80d0c23afcfd5aaedb 100644 (file)
@@ -1310,14 +1310,7 @@ static int sdma_v4_4_2_sw_init(void *handle)
                                ring->use_doorbell?"true":"false");
 
                /* doorbell size is 2 dwords, get DWORD offset */
-               if (aid_id > 0)
-                       ring->doorbell_index =
-                               (adev->doorbell_index.aid1_sdma_start << 1)
-                               + adev->doorbell_index.sdma_doorbell_range
-                               * (i - adev->sdma.num_inst_per_aid);
-               else
-                       ring->doorbell_index =
-                               adev->doorbell_index.sdma_engine[i] << 1;
+               ring->doorbell_index = adev->doorbell_index.sdma_engine[i] << 1;
                ring->vm_hub = AMDGPU_MMHUB0(aid_id);
 
                sprintf(ring->name, "sdma%d.%d", aid_id,
@@ -1336,14 +1329,8 @@ static int sdma_v4_4_2_sw_init(void *handle)
                        /* doorbell index of page queue is assigned right after
                         * gfx queue on the same instance
                         */
-                       if (aid_id > 0)
-                               ring->doorbell_index =
-                                       ((adev->doorbell_index.aid1_sdma_start + 1) << 1)
-                                       + adev->doorbell_index.sdma_doorbell_range
-                                       * (i - adev->sdma.num_inst_per_aid);
-                       else
-                               ring->doorbell_index =
-                                       (adev->doorbell_index.sdma_engine[i] + 1) << 1;
+                       ring->doorbell_index =
+                               (adev->doorbell_index.sdma_engine[i] + 1) << 1;
                        ring->vm_hub = AMDGPU_MMHUB0(aid_id);
 
                        sprintf(ring->name, "page%d.%d", aid_id,
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