]> Git Repo - linux.git/commitdiff
Pull virt-cpu-accounting into release branch
authorTony Luck <[email protected]>
Thu, 17 Apr 2008 17:12:27 +0000 (10:12 -0700)
committerTony Luck <[email protected]>
Thu, 17 Apr 2008 17:12:27 +0000 (10:12 -0700)
1  2 
arch/ia64/Kconfig
arch/ia64/kernel/fsys.S

diff --combined arch/ia64/Kconfig
index 8fa3faf5ef1bb0e91c32b54c6c5b7d197c920b79,c3567727c13cb27dacaff532989a7b30581ff119..eef457fda08fad53d45283fe80379a1920ed14ba
@@@ -18,7 -18,6 +18,7 @@@ config IA6
        select HAVE_IDE
        select HAVE_OPROFILE
        select HAVE_KPROBES
 +      select HAVE_KRETPROBES
        default y
        help
          The Itanium Processor Family is Intel's 64-bit successor to
@@@ -156,8 -155,6 +156,8 @@@ config IA64_HP_ZX1_SWIOTL
  
  config IA64_SGI_SN2
        bool "SGI-SN2"
 +      select NUMA
 +      select ACPI_NUMA
        help
          Selecting this option will optimize the kernel for use on sn2 based
          systems, but the resulting kernel binary will not run on other
@@@ -283,6 -280,17 +283,17 @@@ config FORCE_MAX_ZONEORDE
        default "17" if HUGETLB_PAGE
        default "11"
  
+ config VIRT_CPU_ACCOUNTING
+       bool "Deterministic task and CPU time accounting"
+       default n
+       help
+         Select this option to enable more accurate task and CPU time
+         accounting.  This is done by reading a CPU counter on each
+         kernel entry and exit and on transitions within the kernel
+         between system, softirq and hardirq state, so there is a
+         small performance impact.
+         If in doubt, say N here.
  config SMP
        bool "Symmetric multi-processing support"
        help
diff --combined arch/ia64/kernel/fsys.S
index 6a72db7ddecc010e0ddccb246e7d701c00164f50,c932d86e2d81fb13f4415fd21700a8bbc7bb1632..357b7e2adc63b52901f3cfe34dbe40d1c79057c4
@@@ -210,25 -210,27 +210,25 @@@ ENTRY(fsys_gettimeofday
        // Note that instructions are optimized for McKinley. McKinley can
        // process two bundles simultaneously and therefore we continuously
        // try to feed the CPU two bundles and then a stop.
 -      //
 -      // Additional note that code has changed a lot. Optimization is TBD.
 -      // Comments begin with "?" are maybe outdated.
 -      tnat.nz p6,p0 = r31     // ? branch deferred to fit later bundle
 -      mov pr = r30,0xc000     // Set predicates according to function
 +
        add r2 = TI_FLAGS+IA64_TASK_SIZE,r16
 +      tnat.nz p6,p0 = r31             // guard against Nat argument
 +(p6)  br.cond.spnt.few .fail_einval
        movl r20 = fsyscall_gtod_data // load fsyscall gettimeofday data address
        ;;
 +      ld4 r2 = [r2]                   // process work pending flags
        movl r29 = itc_jitter_data      // itc_jitter
        add r22 = IA64_GTOD_WALL_TIME_OFFSET,r20        // wall_time
 -      ld4 r2 = [r2]           // process work pending flags
 -      ;;
 -(p15) add r22 = IA64_GTOD_MONO_TIME_OFFSET,r20        // monotonic_time
        add r21 = IA64_CLKSRC_MMIO_OFFSET,r20
 -      add r19 = IA64_ITC_LASTCYCLE_OFFSET,r29
 +      mov pr = r30,0xc000     // Set predicates according to function
 +      ;;
        and r2 = TIF_ALLWORK_MASK,r2
 -(p6)    br.cond.spnt.few .fail_einval // ? deferred branch
 +      add r19 = IA64_ITC_LASTCYCLE_OFFSET,r29
 +(p15) add r22 = IA64_GTOD_MONO_TIME_OFFSET,r20        // monotonic_time
        ;;
 -      add r26 = IA64_CLKSRC_CYCLE_LAST_OFFSET,r20 // clksrc_cycle_last
 +      add r26 = IA64_CLKSRC_CYCLE_LAST_OFFSET,r20     // clksrc_cycle_last
        cmp.ne p6, p0 = 0, r2   // Fallback if work is scheduled
 -(p6)    br.cond.spnt.many fsys_fallback_syscall
 +(p6)  br.cond.spnt.many fsys_fallback_syscall
        ;;
        // Begin critical section
  .time_redo:
  (p8)  mov r2 = ar.itc         // CPU_TIMER. 36 clocks latency!!!
  (p9)  ld8 r2 = [r30]          // MMIO_TIMER. Could also have latency issues..
  (p13) ld8 r25 = [r19]         // get itc_lastcycle value
 -      ;;              // ? could be removed by moving the last add upward
        ld8 r9 = [r22],IA64_TIMESPEC_TV_NSEC_OFFSET     // tv_sec
        ;;
        ld8 r8 = [r22],-IA64_TIMESPEC_TV_NSEC_OFFSET    // tv_nsec
  EX(.fail_efault, probe.w.fault r31, 3)
        xmpy.l f8 = f8,f7       // nsec_per_cyc*(counter-last_counter)
        ;;
 -      // ? simulate tbit.nz.or p7,p0 = r28,0
        getf.sig r2 = f8
        mf
        ;;
        ld4 r10 = [r20]         // gtod_lock.sequence
        shr.u r2 = r2,r23       // shift by factor
 -      ;;              // ? overloaded 3 bundles!
 +      ;;
        add r8 = r8,r2          // Add xtime.nsecs
        cmp4.ne p7,p0 = r28,r10
  (p7)  br.cond.dpnt.few .time_redo     // sequence number changed, redo
  EX(.fail_efault, probe.w.fault r23, 3)        // This also costs 5 cycles
  (p14) xmpy.hu f8 = f8, f7             // xmpy has 5 cycles latency so use it
        ;;
 -      mov r8 = r0
  (p14) getf.sig r2 = f8
        ;;
 +      mov r8 = r0
  (p14) shr.u r21 = r2, 4
        ;;
  EX(.fail_efault, st8 [r31] = r9)
@@@ -656,7 -660,11 +656,11 @@@ GLOBAL_ENTRY(fsys_bubble_down
        nop.i 0
        ;;
        mov ar.rsc=0                            // M2   set enforced lazy mode, pl 0, LE, loadrs=0
+ #ifdef CONFIG_VIRT_CPU_ACCOUNTING
+       mov.m r30=ar.itc                        // M    get cycle for accounting
+ #else
        nop.m 0
+ #endif
        nop.i 0
        ;;
        mov r23=ar.bspstore                     // M2 (12 cyc) save ar.bspstore
        cmp.ne pKStk,pUStk=r0,r0                // A    set pKStk <- 0, pUStk <- 1
        br.call.sptk.many b7=ia64_syscall_setup // B
        ;;
+ #ifdef CONFIG_VIRT_CPU_ACCOUNTING
+       // mov.m r30=ar.itc is called in advance
+       add r16=TI_AC_STAMP+IA64_TASK_SIZE,r2
+       add r17=TI_AC_LEAVE+IA64_TASK_SIZE,r2
+       ;;
+       ld8 r18=[r16],TI_AC_STIME-TI_AC_STAMP   // time at last check in kernel
+       ld8 r19=[r17],TI_AC_UTIME-TI_AC_LEAVE   // time at leave kernel
+       ;;
+       ld8 r20=[r16],TI_AC_STAMP-TI_AC_STIME   // cumulated stime
+       ld8 r21=[r17]                           // cumulated utime
+       sub r22=r19,r18                         // stime before leave kernel
+       ;;
+       st8 [r16]=r30,TI_AC_STIME-TI_AC_STAMP   // update stamp
+       sub r18=r30,r19                         // elapsed time in user mode
+       ;;
+       add r20=r20,r22                         // sum stime
+       add r21=r21,r18                         // sum utime
+       ;;
+       st8 [r16]=r20                           // update stime
+       st8 [r17]=r21                           // update utime
+       ;;
+ #endif
        mov ar.rsc=0x3                          // M2   set eager mode, pl 0, LE, loadrs=0
        mov rp=r14                              // I0   set the real return addr
        and r3=_TIF_SYSCALL_TRACEAUDIT,r3       // A
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