clk: rockchip: fix error for unknown clocks

There is a clk == NULL check after the switch to check for
unsupported clk types. Since clk is re-assigned in a loop,
this check is useless right now for anything but the first
round. Let's fix this up by assigning clk = NULL in the
loop before the switch statement.

Fixes: a245fecbb806 ("clk: rockchip: add basic infrastructure for clock branches")
Cc: [email protected]
Signed-off-by: Sebastian Reichel <[email protected]>
[added fixes + stable-cc]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>

diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c
index 73d2cbdc716b45d4e9b9825ba2778e39e8e280cf..2fa7253c73b2cdfc5b8c9f73539eb7250be8897b 100644 (file)
--- a/drivers/clk/rockchip/clk.c
+++ b/drivers/clk/rockchip/clk.c
@@ -450,12 +450,13 @@ void rockchip_clk_register_branches(struct rockchip_clk_provider *ctx,
                                    struct rockchip_clk_branch *list,
                                    unsigned int nr_clk)
 {
-       struct clk *clk = NULL;
+       struct clk *clk;
        unsigned int idx;
        unsigned long flags;
 
        for (idx = 0; idx < nr_clk; idx++, list++) {
                flags = list->flags;
+               clk = NULL;
 
                /* catch simple muxes */
                switch (list->branch_type) {