tools/power turbostat: fix SPR PC6 limits

Sapphire Rapids Xeon (SPR) supports 2 flavors of PC6 - PC6N (non-retention) and
PC6R (retention). Before this patch we used ICX package C-state limits, which
was wrong, because ICX has only one PC6 flavor. With this patch, we use SKX PC6
limits for SPR, because they are the same.

Signed-off-by: Artem Bityutskiy <[email protected]>
Signed-off-by: Len Brown <[email protected]>

diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 3ec10d141abb143d8a70651d027addf7e5b439fd..05e993674015bc9906c5fe976fac57a7e8723fde 100644 (file)
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -3734,11 +3734,11 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
                has_misc_feature_control = 1;
                break;
        case INTEL_FAM6_SKYLAKE_X:      /* SKX */
+       case INTEL_FAM6_SAPPHIRERAPIDS_X:       /* SPR */
                pkg_cstate_limits = skx_pkg_cstate_limits;
                has_misc_feature_control = 1;
                break;
        case INTEL_FAM6_ICELAKE_X:      /* ICX */
-       case INTEL_FAM6_SAPPHIRERAPIDS_X:       /* SPR */
                pkg_cstate_limits = icx_pkg_cstate_limits;
                has_misc_feature_control = 1;
                break;