Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "Just a bunch of fixes to squeeze in before -rc1:

   - three nouveau regression fixes

   - one qxl regression fix

   - a bunch of i915 fixes

  ... and some core displayport/atomic fixes"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/nouveau/device: enable c800 quirk for tecra w50
  drm/nouveau/clk/gt215: Unbreak engine pausing for GT21x/MCP7x
  drm/nouveau/gr/nv04: fix big endian setting on gr context
  drm/qxl: validate monitors config modes
  drm/i915: Allow DSI dual link to be configured on any pipe
  drm/i915: Don't try to use DDR DVFS on CHV when disabled in the BIOS
  drm/i915: Fix CSR MMIO address check
  drm/i915: Limit the number of loops for reading a split 64bit register
  drm/i915: Fix broken mst get_hw_state.
  drm/i915: Pass hpd_status_i915[] to intel_get_hpd_pins() in pre-g4x
  uapi/drm/i915_drm.h: fix userspace compilation.
  drm/i915: Always mark the object as dirty when used by the GPU
  drm/dp: Add dp_aux_i2c_speed_khz module param to set the assume i2c bus speed
  drm/dp: Adjust i2c-over-aux retry count based on message size and i2c bus speed
  drm/dp: Define AUX_RETRY_INTERVAL as 500 us
  drm/atomic: Fix bookkeeping with TEST_ONLY, v3.

diff --combined drivers/gpu/drm/i915/i915_drv.h
index 81adf89b92f1536a5f135eeb349ee75eadc178bf,b06e0308077193eaf2a2fff0931c228823099bbf..e1db8de52851b979c31607abf7b6995bd1febe0b
--- 1/drivers/gpu/drm/i915/i915_drv.h
--- 2/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -1883,7 -1883,6 +1883,7 @@@ struct drm_i915_private 
        struct drm_property *force_audio_property;
  
        /* hda/i915 audio component */
 +      struct i915_audio_component *audio_component;
        bool audio_component_registered;
  
        uint32_t hw_context_size;
@@@ -1929,6 -1928,8 +1929,8 @@@
                        struct skl_wm_values skl_hw;
                        struct vlv_wm_values vlv;
                };
+ 
+               uint8_t max_level;
        } wm;
  
        struct i915_runtime_pm pm;
@@@ -3384,13 -3385,13 +3386,13 @@@ int intel_freq_opcode(struct drm_i915_p
  #define I915_READ64(reg)      dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)
  
  #define I915_READ64_2x32(lower_reg, upper_reg) ({                     \
-       u32 upper, lower, tmp;                                          \
-       tmp = I915_READ(upper_reg);                                     \
+       u32 upper, lower, old_upper, loop = 0;                          \
+       upper = I915_READ(upper_reg);                                   \
        do {                                                            \
-               upper = tmp;                                            \
+               old_upper = upper;                                      \
                lower = I915_READ(lower_reg);                           \
-               tmp = I915_READ(upper_reg);                             \
-       } while (upper != tmp);                                         \
+               upper = I915_READ(upper_reg);                           \
+       } while (upper != old_upper && loop++ < 2);                     \
        (u64)upper << 32 | lower; })
  
  #define POSTING_READ(reg)     (void)I915_READ_NOTRACE(reg)

diff --combined drivers/gpu/drm/i915/i915_irq.c
index b5fb1430c1d7d4b3ee6bda5fa4d115d58d502566,a2bceb70a3fdf7a63436ac5e6efa6c765b429e38..5a244ab9395ba2c9f61278a1293850d5e75bc9c4
--- 1/drivers/gpu/drm/i915/i915_irq.c
--- 2/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@@ -1558,7 -1558,7 +1558,7 @@@ static void i9xx_hpd_irq_handler(struc
                u32 hotplug_trigger = hotplug_status & HOTPLUG_INT_STATUS_I915;
  
                intel_get_hpd_pins(&pin_mask, &long_mask, hotplug_trigger,
-                                  hotplug_trigger, hpd_status_g4x,
+                                  hotplug_trigger, hpd_status_i915,
                                   i9xx_port_hotplug_long_detect);
                intel_hpd_irq_handler(dev, pin_mask, long_mask);
        }
@@@ -2253,7 -2253,7 +2253,7 @@@ static void i915_reset_and_wakeup(struc
                        kobject_uevent_env(&dev->primary->kdev->kobj,
                                           KOBJ_CHANGE, reset_done_event);
                } else {
 -                      atomic_set_mask(I915_WEDGED, &error->reset_counter);
 +                      atomic_or(I915_WEDGED, &error->reset_counter);
                }
  
                /*
@@@ -2381,7 -2381,7 +2381,7 @@@ void i915_handle_error(struct drm_devic
        i915_report_and_clear_eir(dev);
  
        if (wedged) {
 -              atomic_set_mask(I915_RESET_IN_PROGRESS_FLAG,
 +              atomic_or(I915_RESET_IN_PROGRESS_FLAG,
                                &dev_priv->gpu_error.reset_counter);
  
                /*