clk: zynqmp: Handle divider specific read only flag

Add support for divider specific read only CCF flag
(CLK_DIVIDER_READ_ONLY).

Signed-off-by: Rajan Vaja <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>

diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c
index c07423e03bc884b467862c6dc7e1e9caf7384539..cb49281f9cf9808da649ea33fcc391d215276655 100644 (file)
--- a/drivers/clk/zynqmp/divider.c
+++ b/drivers/clk/zynqmp/divider.c
@@ -256,6 +256,11 @@ static const struct clk_ops zynqmp_clk_divider_ops = {
        .set_rate = zynqmp_clk_divider_set_rate,
 };
 
+static const struct clk_ops zynqmp_clk_divider_ro_ops = {
+       .recalc_rate = zynqmp_clk_divider_recalc_rate,
+       .round_rate = zynqmp_clk_divider_round_rate,
+};
+
 /**
  * zynqmp_clk_get_max_divisor() - Get maximum supported divisor from firmware.
  * @clk_id:            Id of clock
@@ -334,7 +339,10 @@ struct clk_hw *zynqmp_clk_register_divider(const char *name,
                return ERR_PTR(-ENOMEM);
 
        init.name = name;
-       init.ops = &zynqmp_clk_divider_ops;
+       if (nodes->type_flag & CLK_DIVIDER_READ_ONLY)
+               init.ops = &zynqmp_clk_divider_ro_ops;
+       else
+               init.ops = &zynqmp_clk_divider_ops;
 
        init.flags = zynqmp_clk_map_common_ccf_flags(nodes->flag);