drm/amd/display: resolve correct MALL size for dcn401

[linux.git] / drivers / gpu / drm / amd / display / dc / resource / dcn32 / dcn32_resource.c

diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
index a1890df29f5cc4773f4e5eb07776828df3527994..aaaa888d112dac4069d9b14a768539519b12cdce 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
@@ -1990,6 +1990,10 @@ unsigned int dcn32_calculate_mall_ways_from_bytes(const struct dc *dc, unsigned
                return 0;
        }
 
+       if (dc->caps.max_cab_allocation_bytes == 0) {
+               return 0xffffffff;
+       }
+
        /* add 2 lines for worst case alignment */
        cache_lines_used = total_size_in_mall_bytes / dc->caps.cache_line_size + 2;