arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <[email protected]>
  14  *   Yaniv Kamay  <[email protected]>
  15  *   Amit Shah    <[email protected]>
  16  *   Ben-Ami Yassour <[email protected]>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "ioapic.h"
  22 #include "mmu.h"
  23 #include "i8254.h"
  24 #include "tss.h"
  25 #include "kvm_cache_regs.h"
  26 #include "kvm_emulate.h"
  27 #include "x86.h"
  28 #include "cpuid.h"
  29 #include "pmu.h"
  30 #include "hyperv.h"
  31 #include "lapic.h"
  32 #include "xen.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/export.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/mman.h>
  42 #include <linux/highmem.h>
  43 #include <linux/iommu.h>
  44 #include <linux/intel-iommu.h>
  45 #include <linux/cpufreq.h>
  46 #include <linux/user-return-notifier.h>
  47 #include <linux/srcu.h>
  48 #include <linux/slab.h>
  49 #include <linux/perf_event.h>
  50 #include <linux/uaccess.h>
  51 #include <linux/hash.h>
  52 #include <linux/pci.h>
  53 #include <linux/timekeeper_internal.h>
  54 #include <linux/pvclock_gtod.h>
  55 #include <linux/kvm_irqfd.h>
  56 #include <linux/irqbypass.h>
  57 #include <linux/sched/stat.h>
  58 #include <linux/sched/isolation.h>
  59 #include <linux/mem_encrypt.h>
  60 #include <linux/entry-kvm.h>
  61 #include <linux/suspend.h>
  62
  63 #include <trace/events/kvm.h>
  64
  65 #include <asm/debugreg.h>
  66 #include <asm/msr.h>
  67 #include <asm/desc.h>
  68 #include <asm/mce.h>
  69 #include <asm/pkru.h>
  70 #include <linux/kernel_stat.h>
  71 #include <asm/fpu/api.h>
  72 #include <asm/fpu/xcr.h>
  73 #include <asm/fpu/xstate.h>
  74 #include <asm/pvclock.h>
  75 #include <asm/div64.h>
  76 #include <asm/irq_remapping.h>
  77 #include <asm/mshyperv.h>
  78 #include <asm/hypervisor.h>
  79 #include <asm/tlbflush.h>
  80 #include <asm/intel_pt.h>
  81 #include <asm/emulate_prefix.h>
  82 #include <asm/sgx.h>
  83 #include <clocksource/hyperv_timer.h>
  84
  85 #define CREATE_TRACE_POINTS
  86 #include "trace.h"
  87
  88 #define MAX_IO_MSRS 256
  89 #define KVM_MAX_MCE_BANKS 32
  90 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  91 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  92
  93 #define  ERR_PTR_USR(e)  ((void __user *)ERR_PTR(e))
  94
  95 #define emul_to_vcpu(ctxt) \
  96         ((struct kvm_vcpu *)(ctxt)->vcpu)
  97
  98 /* EFER defaults:
  99  * - enable syscall per default because its emulated by KVM
 100  * - enable LME and LMA per default on 64 bit KVM
 101  */
 102 #ifdef CONFIG_X86_64
 103 static
 104 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
 105 #else
 106 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
 107 #endif
 108
 109 static u64 __read_mostly cr4_reserved_bits = CR4_RESERVED_BITS;
 110
 111 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
 112
 113 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
 114
 115 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
 116                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 117
 118 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 119 static void process_nmi(struct kvm_vcpu *vcpu);
 120 static void process_smi(struct kvm_vcpu *vcpu);
 121 static void enter_smm(struct kvm_vcpu *vcpu);
 122 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 123 static void store_regs(struct kvm_vcpu *vcpu);
 124 static int sync_regs(struct kvm_vcpu *vcpu);
 125 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu);
 126
 127 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 128 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2);
 129
 130 struct kvm_x86_ops kvm_x86_ops __read_mostly;
 131
 132 #define KVM_X86_OP(func)                                             \
 133         DEFINE_STATIC_CALL_NULL(kvm_x86_##func,                      \
 134                                 *(((struct kvm_x86_ops *)0)->func));
 135 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
 136 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
 137 #include <asm/kvm-x86-ops.h>
 138 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits);
 139 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg);
 140
 141 static bool __read_mostly ignore_msrs = 0;
 142 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 143
 144 bool __read_mostly report_ignored_msrs = true;
 145 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 146 EXPORT_SYMBOL_GPL(report_ignored_msrs);
 147
 148 unsigned int min_timer_period_us = 200;
 149 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 150
 151 static bool __read_mostly kvmclock_periodic_sync = true;
 152 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 153
 154 bool __read_mostly kvm_has_tsc_control;
 155 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 156 u32  __read_mostly kvm_max_guest_tsc_khz;
 157 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 158 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 159 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 160 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 161 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 162 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 163 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 164 bool __read_mostly kvm_has_bus_lock_exit;
 165 EXPORT_SYMBOL_GPL(kvm_has_bus_lock_exit);
 166
 167 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 168 static u32 __read_mostly tsc_tolerance_ppm = 250;
 169 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 170
 171 /*
 172  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 173  * adaptive tuning starting from default advancement of 1000ns.  '0' disables
 174  * advancement entirely.  Any other value is used as-is and disables adaptive
 175  * tuning, i.e. allows privileged userspace to set an exact advancement time.
 176  */
 177 static int __read_mostly lapic_timer_advance_ns = -1;
 178 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 179
 180 static bool __read_mostly vector_hashing = true;
 181 module_param(vector_hashing, bool, S_IRUGO);
 182
 183 bool __read_mostly enable_vmware_backdoor = false;
 184 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 185 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 186
 187 static bool __read_mostly force_emulation_prefix = false;
 188 module_param(force_emulation_prefix, bool, S_IRUGO);
 189
 190 int __read_mostly pi_inject_timer = -1;
 191 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 192
 193 /* Enable/disable PMU virtualization */
 194 bool __read_mostly enable_pmu = true;
 195 EXPORT_SYMBOL_GPL(enable_pmu);
 196 module_param(enable_pmu, bool, 0444);
 197
 198 bool __read_mostly eager_page_split = true;
 199 module_param(eager_page_split, bool, 0644);
 200
 201 /*
 202  * Restoring the host value for MSRs that are only consumed when running in
 203  * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
 204  * returns to userspace, i.e. the kernel can run with the guest's value.
 205  */
 206 #define KVM_MAX_NR_USER_RETURN_MSRS 16
 207
 208 struct kvm_user_return_msrs {
 209         struct user_return_notifier urn;
 210         bool registered;
 211         struct kvm_user_return_msr_values {
 212                 u64 host;
 213                 u64 curr;
 214         } values[KVM_MAX_NR_USER_RETURN_MSRS];
 215 };
 216
 217 u32 __read_mostly kvm_nr_uret_msrs;
 218 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs);
 219 static u32 __read_mostly kvm_uret_msrs_list[KVM_MAX_NR_USER_RETURN_MSRS];
 220 static struct kvm_user_return_msrs __percpu *user_return_msrs;
 221
 222 #define KVM_SUPPORTED_XCR0     (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
 223                                 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
 224                                 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
 225                                 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
 226
 227 u64 __read_mostly host_efer;
 228 EXPORT_SYMBOL_GPL(host_efer);
 229
 230 bool __read_mostly allow_smaller_maxphyaddr = 0;
 231 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr);
 232
 233 bool __read_mostly enable_apicv = true;
 234 EXPORT_SYMBOL_GPL(enable_apicv);
 235
 236 u64 __read_mostly host_xss;
 237 EXPORT_SYMBOL_GPL(host_xss);
 238 u64 __read_mostly supported_xss;
 239 EXPORT_SYMBOL_GPL(supported_xss);
 240
 241 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
 242         KVM_GENERIC_VM_STATS(),
 243         STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 244         STATS_DESC_COUNTER(VM, mmu_pte_write),
 245         STATS_DESC_COUNTER(VM, mmu_pde_zapped),
 246         STATS_DESC_COUNTER(VM, mmu_flooded),
 247         STATS_DESC_COUNTER(VM, mmu_recycled),
 248         STATS_DESC_COUNTER(VM, mmu_cache_miss),
 249         STATS_DESC_ICOUNTER(VM, mmu_unsync),
 250         STATS_DESC_ICOUNTER(VM, pages_4k),
 251         STATS_DESC_ICOUNTER(VM, pages_2m),
 252         STATS_DESC_ICOUNTER(VM, pages_1g),
 253         STATS_DESC_ICOUNTER(VM, nx_lpage_splits),
 254         STATS_DESC_PCOUNTER(VM, max_mmu_rmap_size),
 255         STATS_DESC_PCOUNTER(VM, max_mmu_page_hash_collisions)
 256 };
 257
 258 const struct kvm_stats_header kvm_vm_stats_header = {
 259         .name_size = KVM_STATS_NAME_SIZE,
 260         .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
 261         .id_offset = sizeof(struct kvm_stats_header),
 262         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 263         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 264                        sizeof(kvm_vm_stats_desc),
 265 };
 266
 267 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
 268         KVM_GENERIC_VCPU_STATS(),
 269         STATS_DESC_COUNTER(VCPU, pf_fixed),
 270         STATS_DESC_COUNTER(VCPU, pf_guest),
 271         STATS_DESC_COUNTER(VCPU, tlb_flush),
 272         STATS_DESC_COUNTER(VCPU, invlpg),
 273         STATS_DESC_COUNTER(VCPU, exits),
 274         STATS_DESC_COUNTER(VCPU, io_exits),
 275         STATS_DESC_COUNTER(VCPU, mmio_exits),
 276         STATS_DESC_COUNTER(VCPU, signal_exits),
 277         STATS_DESC_COUNTER(VCPU, irq_window_exits),
 278         STATS_DESC_COUNTER(VCPU, nmi_window_exits),
 279         STATS_DESC_COUNTER(VCPU, l1d_flush),
 280         STATS_DESC_COUNTER(VCPU, halt_exits),
 281         STATS_DESC_COUNTER(VCPU, request_irq_exits),
 282         STATS_DESC_COUNTER(VCPU, irq_exits),
 283         STATS_DESC_COUNTER(VCPU, host_state_reload),
 284         STATS_DESC_COUNTER(VCPU, fpu_reload),
 285         STATS_DESC_COUNTER(VCPU, insn_emulation),
 286         STATS_DESC_COUNTER(VCPU, insn_emulation_fail),
 287         STATS_DESC_COUNTER(VCPU, hypercalls),
 288         STATS_DESC_COUNTER(VCPU, irq_injections),
 289         STATS_DESC_COUNTER(VCPU, nmi_injections),
 290         STATS_DESC_COUNTER(VCPU, req_event),
 291         STATS_DESC_COUNTER(VCPU, nested_run),
 292         STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
 293         STATS_DESC_COUNTER(VCPU, directed_yield_successful),
 294         STATS_DESC_ICOUNTER(VCPU, guest_mode)
 295 };
 296
 297 const struct kvm_stats_header kvm_vcpu_stats_header = {
 298         .name_size = KVM_STATS_NAME_SIZE,
 299         .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
 300         .id_offset = sizeof(struct kvm_stats_header),
 301         .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
 302         .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
 303                        sizeof(kvm_vcpu_stats_desc),
 304 };
 305
 306 u64 __read_mostly host_xcr0;
 307 u64 __read_mostly supported_xcr0;
 308 EXPORT_SYMBOL_GPL(supported_xcr0);
 309
 310 static struct kmem_cache *x86_emulator_cache;
 311
 312 /*
 313  * When called, it means the previous get/set msr reached an invalid msr.
 314  * Return true if we want to ignore/silent this failed msr access.
 315  */
 316 static bool kvm_msr_ignored_check(u32 msr, u64 data, bool write)
 317 {
 318         const char *op = write ? "wrmsr" : "rdmsr";
 319
 320         if (ignore_msrs) {
 321                 if (report_ignored_msrs)
 322                         kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
 323                                       op, msr, data);
 324                 /* Mask the error */
 325                 return true;
 326         } else {
 327                 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
 328                                       op, msr, data);
 329                 return false;
 330         }
 331 }
 332
 333 static struct kmem_cache *kvm_alloc_emulator_cache(void)
 334 {
 335         unsigned int useroffset = offsetof(struct x86_emulate_ctxt, src);
 336         unsigned int size = sizeof(struct x86_emulate_ctxt);
 337
 338         return kmem_cache_create_usercopy("x86_emulator", size,
 339                                           __alignof__(struct x86_emulate_ctxt),
 340                                           SLAB_ACCOUNT, useroffset,
 341                                           size - useroffset, NULL);
 342 }
 343
 344 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 345
 346 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 347 {
 348         int i;
 349         for (i = 0; i < ASYNC_PF_PER_VCPU; i++)
 350                 vcpu->arch.apf.gfns[i] = ~0;
 351 }
 352
 353 static void kvm_on_user_return(struct user_return_notifier *urn)
 354 {
 355         unsigned slot;
 356         struct kvm_user_return_msrs *msrs
 357                 = container_of(urn, struct kvm_user_return_msrs, urn);
 358         struct kvm_user_return_msr_values *values;
 359         unsigned long flags;
 360
 361         /*
 362          * Disabling irqs at this point since the following code could be
 363          * interrupted and executed through kvm_arch_hardware_disable()
 364          */
 365         local_irq_save(flags);
 366         if (msrs->registered) {
 367                 msrs->registered = false;
 368                 user_return_notifier_unregister(urn);
 369         }
 370         local_irq_restore(flags);
 371         for (slot = 0; slot < kvm_nr_uret_msrs; ++slot) {
 372                 values = &msrs->values[slot];
 373                 if (values->host != values->curr) {
 374                         wrmsrl(kvm_uret_msrs_list[slot], values->host);
 375                         values->curr = values->host;
 376                 }
 377         }
 378 }
 379
 380 static int kvm_probe_user_return_msr(u32 msr)
 381 {
 382         u64 val;
 383         int ret;
 384
 385         preempt_disable();
 386         ret = rdmsrl_safe(msr, &val);
 387         if (ret)
 388                 goto out;
 389         ret = wrmsrl_safe(msr, val);
 390 out:
 391         preempt_enable();
 392         return ret;
 393 }
 394
 395 int kvm_add_user_return_msr(u32 msr)
 396 {
 397         BUG_ON(kvm_nr_uret_msrs >= KVM_MAX_NR_USER_RETURN_MSRS);
 398
 399         if (kvm_probe_user_return_msr(msr))
 400                 return -1;
 401
 402         kvm_uret_msrs_list[kvm_nr_uret_msrs] = msr;
 403         return kvm_nr_uret_msrs++;
 404 }
 405 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr);
 406
 407 int kvm_find_user_return_msr(u32 msr)
 408 {
 409         int i;
 410
 411         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 412                 if (kvm_uret_msrs_list[i] == msr)
 413                         return i;
 414         }
 415         return -1;
 416 }
 417 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr);
 418
 419 static void kvm_user_return_msr_cpu_online(void)
 420 {
 421         unsigned int cpu = smp_processor_id();
 422         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 423         u64 value;
 424         int i;
 425
 426         for (i = 0; i < kvm_nr_uret_msrs; ++i) {
 427                 rdmsrl_safe(kvm_uret_msrs_list[i], &value);
 428                 msrs->values[i].host = value;
 429                 msrs->values[i].curr = value;
 430         }
 431 }
 432
 433 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
 434 {
 435         unsigned int cpu = smp_processor_id();
 436         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 437         int err;
 438
 439         value = (value & mask) | (msrs->values[slot].host & ~mask);
 440         if (value == msrs->values[slot].curr)
 441                 return 0;
 442         err = wrmsrl_safe(kvm_uret_msrs_list[slot], value);
 443         if (err)
 444                 return 1;
 445
 446         msrs->values[slot].curr = value;
 447         if (!msrs->registered) {
 448                 msrs->urn.on_user_return = kvm_on_user_return;
 449                 user_return_notifier_register(&msrs->urn);
 450                 msrs->registered = true;
 451         }
 452         return 0;
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr);
 455
 456 static void drop_user_return_notifiers(void)
 457 {
 458         unsigned int cpu = smp_processor_id();
 459         struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
 460
 461         if (msrs->registered)
 462                 kvm_on_user_return(&msrs->urn);
 463 }
 464
 465 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 466 {
 467         return vcpu->arch.apic_base;
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 470
 471 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 472 {
 473         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 476
 477 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 478 {
 479         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 480         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 481         u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
 482                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 483
 484         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 485                 return 1;
 486         if (!msr_info->host_initiated) {
 487                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 488                         return 1;
 489                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 490                         return 1;
 491         }
 492
 493         kvm_lapic_set_base(vcpu, msr_info->data);
 494         kvm_recalculate_apic_map(vcpu->kvm);
 495         return 0;
 496 }
 497 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 498
 499 /*
 500  * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
 501  *
 502  * Hardware virtualization extension instructions may fault if a reboot turns
 503  * off virtualization while processes are running.  Usually after catching the
 504  * fault we just panic; during reboot instead the instruction is ignored.
 505  */
 506 noinstr void kvm_spurious_fault(void)
 507 {
 508         /* Fault while not rebooting.  We want the trace. */
 509         BUG_ON(!kvm_rebooting);
 510 }
 511 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 512
 513 #define EXCPT_BENIGN            0
 514 #define EXCPT_CONTRIBUTORY      1
 515 #define EXCPT_PF                2
 516
 517 static int exception_class(int vector)
 518 {
 519         switch (vector) {
 520         case PF_VECTOR:
 521                 return EXCPT_PF;
 522         case DE_VECTOR:
 523         case TS_VECTOR:
 524         case NP_VECTOR:
 525         case SS_VECTOR:
 526         case GP_VECTOR:
 527                 return EXCPT_CONTRIBUTORY;
 528         default:
 529                 break;
 530         }
 531         return EXCPT_BENIGN;
 532 }
 533
 534 #define EXCPT_FAULT             0
 535 #define EXCPT_TRAP              1
 536 #define EXCPT_ABORT             2
 537 #define EXCPT_INTERRUPT         3
 538
 539 static int exception_type(int vector)
 540 {
 541         unsigned int mask;
 542
 543         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 544                 return EXCPT_INTERRUPT;
 545
 546         mask = 1 << vector;
 547
 548         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 549         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 550                 return EXCPT_TRAP;
 551
 552         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 553                 return EXCPT_ABORT;
 554
 555         /* Reserved exceptions will result in fault */
 556         return EXCPT_FAULT;
 557 }
 558
 559 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 560 {
 561         unsigned nr = vcpu->arch.exception.nr;
 562         bool has_payload = vcpu->arch.exception.has_payload;
 563         unsigned long payload = vcpu->arch.exception.payload;
 564
 565         if (!has_payload)
 566                 return;
 567
 568         switch (nr) {
 569         case DB_VECTOR:
 570                 /*
 571                  * "Certain debug exceptions may clear bit 0-3.  The
 572                  * remaining contents of the DR6 register are never
 573                  * cleared by the processor".
 574                  */
 575                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 576                 /*
 577                  * In order to reflect the #DB exception payload in guest
 578                  * dr6, three components need to be considered: active low
 579                  * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
 580                  * DR6_BS and DR6_BT)
 581                  * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
 582                  * In the target guest dr6:
 583                  * FIXED_1 bits should always be set.
 584                  * Active low bits should be cleared if 1-setting in payload.
 585                  * Active high bits should be set if 1-setting in payload.
 586                  *
 587                  * Note, the payload is compatible with the pending debug
 588                  * exceptions/exit qualification under VMX, that active_low bits
 589                  * are active high in payload.
 590                  * So they need to be flipped for DR6.
 591                  */
 592                 vcpu->arch.dr6 |= DR6_ACTIVE_LOW;
 593                 vcpu->arch.dr6 |= payload;
 594                 vcpu->arch.dr6 ^= payload & DR6_ACTIVE_LOW;
 595
 596                 /*
 597                  * The #DB payload is defined as compatible with the 'pending
 598                  * debug exceptions' field under VMX, not DR6. While bit 12 is
 599                  * defined in the 'pending debug exceptions' field (enabled
 600                  * breakpoint), it is reserved and must be zero in DR6.
 601                  */
 602                 vcpu->arch.dr6 &= ~BIT(12);
 603                 break;
 604         case PF_VECTOR:
 605                 vcpu->arch.cr2 = payload;
 606                 break;
 607         }
 608
 609         vcpu->arch.exception.has_payload = false;
 610         vcpu->arch.exception.payload = 0;
 611 }
 612 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 613
 614 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 615                 unsigned nr, bool has_error, u32 error_code,
 616                 bool has_payload, unsigned long payload, bool reinject)
 617 {
 618         u32 prev_nr;
 619         int class1, class2;
 620
 621         kvm_make_request(KVM_REQ_EVENT, vcpu);
 622
 623         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 624         queue:
 625                 if (reinject) {
 626                         /*
 627                          * On vmentry, vcpu->arch.exception.pending is only
 628                          * true if an event injection was blocked by
 629                          * nested_run_pending.  In that case, however,
 630                          * vcpu_enter_guest requests an immediate exit,
 631                          * and the guest shouldn't proceed far enough to
 632                          * need reinjection.
 633                          */
 634                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 635                         vcpu->arch.exception.injected = true;
 636                         if (WARN_ON_ONCE(has_payload)) {
 637                                 /*
 638                                  * A reinjected event has already
 639                                  * delivered its payload.
 640                                  */
 641                                 has_payload = false;
 642                                 payload = 0;
 643                         }
 644                 } else {
 645                         vcpu->arch.exception.pending = true;
 646                         vcpu->arch.exception.injected = false;
 647                 }
 648                 vcpu->arch.exception.has_error_code = has_error;
 649                 vcpu->arch.exception.nr = nr;
 650                 vcpu->arch.exception.error_code = error_code;
 651                 vcpu->arch.exception.has_payload = has_payload;
 652                 vcpu->arch.exception.payload = payload;
 653                 if (!is_guest_mode(vcpu))
 654                         kvm_deliver_exception_payload(vcpu);
 655                 return;
 656         }
 657
 658         /* to check exception */
 659         prev_nr = vcpu->arch.exception.nr;
 660         if (prev_nr == DF_VECTOR) {
 661                 /* triple fault -> shutdown */
 662                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 663                 return;
 664         }
 665         class1 = exception_class(prev_nr);
 666         class2 = exception_class(nr);
 667         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 668                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 669                 /*
 670                  * Generate double fault per SDM Table 5-5.  Set
 671                  * exception.pending = true so that the double fault
 672                  * can trigger a nested vmexit.
 673                  */
 674                 vcpu->arch.exception.pending = true;
 675                 vcpu->arch.exception.injected = false;
 676                 vcpu->arch.exception.has_error_code = true;
 677                 vcpu->arch.exception.nr = DF_VECTOR;
 678                 vcpu->arch.exception.error_code = 0;
 679                 vcpu->arch.exception.has_payload = false;
 680                 vcpu->arch.exception.payload = 0;
 681         } else
 682                 /* replace previous exception with a new one in a hope
 683                    that instruction re-execution will regenerate lost
 684                    exception */
 685                 goto queue;
 686 }
 687
 688 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 689 {
 690         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 691 }
 692 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 693
 694 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 695 {
 696         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 699
 700 void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 701                            unsigned long payload)
 702 {
 703         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 704 }
 705 EXPORT_SYMBOL_GPL(kvm_queue_exception_p);
 706
 707 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 708                                     u32 error_code, unsigned long payload)
 709 {
 710         kvm_multiple_exception(vcpu, nr, true, error_code,
 711                                true, payload, false);
 712 }
 713
 714 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 715 {
 716         if (err)
 717                 kvm_inject_gp(vcpu, 0);
 718         else
 719                 return kvm_skip_emulated_instruction(vcpu);
 720
 721         return 1;
 722 }
 723 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 724
 725 static int complete_emulated_insn_gp(struct kvm_vcpu *vcpu, int err)
 726 {
 727         if (err) {
 728                 kvm_inject_gp(vcpu, 0);
 729                 return 1;
 730         }
 731
 732         return kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE | EMULTYPE_SKIP |
 733                                        EMULTYPE_COMPLETE_USER_EXIT);
 734 }
 735
 736 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 737 {
 738         ++vcpu->stat.pf_guest;
 739         vcpu->arch.exception.nested_apf =
 740                 is_guest_mode(vcpu) && fault->async_page_fault;
 741         if (vcpu->arch.exception.nested_apf) {
 742                 vcpu->arch.apf.nested_apf_token = fault->address;
 743                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 744         } else {
 745                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 746                                         fault->address);
 747         }
 748 }
 749 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 750
 751 bool kvm_inject_emulated_page_fault(struct kvm_vcpu *vcpu,
 752                                     struct x86_exception *fault)
 753 {
 754         struct kvm_mmu *fault_mmu;
 755         WARN_ON_ONCE(fault->vector != PF_VECTOR);
 756
 757         fault_mmu = fault->nested_page_fault ? vcpu->arch.mmu :
 758                                                vcpu->arch.walk_mmu;
 759
 760         /*
 761          * Invalidate the TLB entry for the faulting address, if it exists,
 762          * else the access will fault indefinitely (and to emulate hardware).
 763          */
 764         if ((fault->error_code & PFERR_PRESENT_MASK) &&
 765             !(fault->error_code & PFERR_RSVD_MASK))
 766                 kvm_mmu_invalidate_gva(vcpu, fault_mmu, fault->address,
 767                                        fault_mmu->root.hpa);
 768
 769         fault_mmu->inject_page_fault(vcpu, fault);
 770         return fault->nested_page_fault;
 771 }
 772 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault);
 773
 774 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 775 {
 776         atomic_inc(&vcpu->arch.nmi_queued);
 777         kvm_make_request(KVM_REQ_NMI, vcpu);
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 780
 781 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 782 {
 783         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 786
 787 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 788 {
 789         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 790 }
 791 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 792
 793 /*
 794  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 795  * a #GP and return false.
 796  */
 797 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 798 {
 799         if (static_call(kvm_x86_get_cpl)(vcpu) <= required_cpl)
 800                 return true;
 801         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 802         return false;
 803 }
 804 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 805
 806 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 807 {
 808         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 809                 return true;
 810
 811         kvm_queue_exception(vcpu, UD_VECTOR);
 812         return false;
 813 }
 814 EXPORT_SYMBOL_GPL(kvm_require_dr);
 815
 816 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 817 {
 818         return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2);
 819 }
 820
 821 /*
 822  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 823  */
 824 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
 825 {
 826         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
 827         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 828         gpa_t real_gpa;
 829         int i;
 830         int ret;
 831         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 832
 833         /*
 834          * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
 835          * to an L1 GPA.
 836          */
 837         real_gpa = kvm_translate_gpa(vcpu, mmu, gfn_to_gpa(pdpt_gfn),
 838                                      PFERR_USER_MASK | PFERR_WRITE_MASK, NULL);
 839         if (real_gpa == UNMAPPED_GVA)
 840                 return 0;
 841
 842         /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
 843         ret = kvm_vcpu_read_guest_page(vcpu, gpa_to_gfn(real_gpa), pdpte,
 844                                        cr3 & GENMASK(11, 5), sizeof(pdpte));
 845         if (ret < 0)
 846                 return 0;
 847
 848         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 849                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 850                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 851                         return 0;
 852                 }
 853         }
 854
 855         /*
 856          * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
 857          * Shadow page roots need to be reconstructed instead.
 858          */
 859         if (!tdp_enabled && memcmp(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs)))
 860                 kvm_mmu_free_roots(vcpu->kvm, mmu, KVM_MMU_ROOT_CURRENT);
 861
 862         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 863         kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
 864         kvm_make_request(KVM_REQ_LOAD_MMU_PGD, vcpu);
 865         vcpu->arch.pdptrs_from_userspace = false;
 866
 867         return 1;
 868 }
 869 EXPORT_SYMBOL_GPL(load_pdptrs);
 870
 871 void kvm_post_set_cr0(struct kvm_vcpu *vcpu, unsigned long old_cr0, unsigned long cr0)
 872 {
 873         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 874                 kvm_clear_async_pf_completion_queue(vcpu);
 875                 kvm_async_pf_hash_reset(vcpu);
 876
 877                 /*
 878                  * Clearing CR0.PG is defined to flush the TLB from the guest's
 879                  * perspective.
 880                  */
 881                 if (!(cr0 & X86_CR0_PG))
 882                         kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
 883         }
 884
 885         if ((cr0 ^ old_cr0) & KVM_MMU_CR0_ROLE_BITS)
 886                 kvm_mmu_reset_context(vcpu);
 887
 888         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 889             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 890             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 891                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 892 }
 893 EXPORT_SYMBOL_GPL(kvm_post_set_cr0);
 894
 895 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 896 {
 897         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 898
 899         cr0 |= X86_CR0_ET;
 900
 901 #ifdef CONFIG_X86_64
 902         if (cr0 & 0xffffffff00000000UL)
 903                 return 1;
 904 #endif
 905
 906         cr0 &= ~CR0_RESERVED_BITS;
 907
 908         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 909                 return 1;
 910
 911         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 912                 return 1;
 913
 914 #ifdef CONFIG_X86_64
 915         if ((vcpu->arch.efer & EFER_LME) && !is_paging(vcpu) &&
 916             (cr0 & X86_CR0_PG)) {
 917                 int cs_db, cs_l;
 918
 919                 if (!is_pae(vcpu))
 920                         return 1;
 921                 static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
 922                 if (cs_l)
 923                         return 1;
 924         }
 925 #endif
 926         if (!(vcpu->arch.efer & EFER_LME) && (cr0 & X86_CR0_PG) &&
 927             is_pae(vcpu) && ((cr0 ^ old_cr0) & X86_CR0_PDPTR_BITS) &&
 928             !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
 929                 return 1;
 930
 931         if (!(cr0 & X86_CR0_PG) &&
 932             (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)))
 933                 return 1;
 934
 935         static_call(kvm_x86_set_cr0)(vcpu, cr0);
 936
 937         kvm_post_set_cr0(vcpu, old_cr0, cr0);
 938
 939         return 0;
 940 }
 941 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 942
 943 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 944 {
 945         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 946 }
 947 EXPORT_SYMBOL_GPL(kvm_lmsw);
 948
 949 void kvm_load_guest_xsave_state(struct kvm_vcpu *vcpu)
 950 {
 951         if (vcpu->arch.guest_state_protected)
 952                 return;
 953
 954         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 955
 956                 if (vcpu->arch.xcr0 != host_xcr0)
 957                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 958
 959                 if (vcpu->arch.xsaves_enabled &&
 960                     vcpu->arch.ia32_xss != host_xss)
 961                         wrmsrl(MSR_IA32_XSS, vcpu->arch.ia32_xss);
 962         }
 963
 964         if (static_cpu_has(X86_FEATURE_PKU) &&
 965             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 966              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU)) &&
 967             vcpu->arch.pkru != vcpu->arch.host_pkru)
 968                 write_pkru(vcpu->arch.pkru);
 969 }
 970 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state);
 971
 972 void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
 973 {
 974         if (vcpu->arch.guest_state_protected)
 975                 return;
 976
 977         if (static_cpu_has(X86_FEATURE_PKU) &&
 978             (kvm_read_cr4_bits(vcpu, X86_CR4_PKE) ||
 979              (vcpu->arch.xcr0 & XFEATURE_MASK_PKRU))) {
 980                 vcpu->arch.pkru = rdpkru();
 981                 if (vcpu->arch.pkru != vcpu->arch.host_pkru)
 982                         write_pkru(vcpu->arch.host_pkru);
 983         }
 984
 985         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE)) {
 986
 987                 if (vcpu->arch.xcr0 != host_xcr0)
 988                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 989
 990                 if (vcpu->arch.xsaves_enabled &&
 991                     vcpu->arch.ia32_xss != host_xss)
 992                         wrmsrl(MSR_IA32_XSS, host_xss);
 993         }
 994
 995 }
 996 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
 997
 998 static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
 999 {
1000         return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
1001 }
1002
1003 #ifdef CONFIG_X86_64
1004 static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
1005 {
1006         return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
1007 }
1008 #endif
1009
1010 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
1011 {
1012         u64 xcr0 = xcr;
1013         u64 old_xcr0 = vcpu->arch.xcr0;
1014         u64 valid_bits;
1015
1016         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
1017         if (index != XCR_XFEATURE_ENABLED_MASK)
1018                 return 1;
1019         if (!(xcr0 & XFEATURE_MASK_FP))
1020                 return 1;
1021         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
1022                 return 1;
1023
1024         /*
1025          * Do not allow the guest to set bits that we do not support
1026          * saving.  However, xcr0 bit 0 is always set, even if the
1027          * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1028          */
1029         valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
1030         if (xcr0 & ~valid_bits)
1031                 return 1;
1032
1033         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
1034             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
1035                 return 1;
1036
1037         if (xcr0 & XFEATURE_MASK_AVX512) {
1038                 if (!(xcr0 & XFEATURE_MASK_YMM))
1039                         return 1;
1040                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
1041                         return 1;
1042         }
1043
1044         if ((xcr0 & XFEATURE_MASK_XTILE) &&
1045             ((xcr0 & XFEATURE_MASK_XTILE) != XFEATURE_MASK_XTILE))
1046                 return 1;
1047
1048         vcpu->arch.xcr0 = xcr0;
1049
1050         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
1051                 kvm_update_cpuid_runtime(vcpu);
1052         return 0;
1053 }
1054
1055 int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
1056 {
1057         if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
1058             __kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
1059                 kvm_inject_gp(vcpu, 0);
1060                 return 1;
1061         }
1062
1063         return kvm_skip_emulated_instruction(vcpu);
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv);
1066
1067 bool kvm_is_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1068 {
1069         if (cr4 & cr4_reserved_bits)
1070                 return false;
1071
1072         if (cr4 & vcpu->arch.cr4_guest_rsvd_bits)
1073                 return false;
1074
1075         return static_call(kvm_x86_is_valid_cr4)(vcpu, cr4);
1076 }
1077 EXPORT_SYMBOL_GPL(kvm_is_valid_cr4);
1078
1079 void kvm_post_set_cr4(struct kvm_vcpu *vcpu, unsigned long old_cr4, unsigned long cr4)
1080 {
1081         if ((cr4 ^ old_cr4) & KVM_MMU_CR4_ROLE_BITS)
1082                 kvm_mmu_reset_context(vcpu);
1083
1084         /*
1085          * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1086          * according to the SDM; however, stale prev_roots could be reused
1087          * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1088          * free them all.  This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1089          * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1090          * so fall through.
1091          */
1092         if (!tdp_enabled &&
1093             (cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE))
1094                 kvm_mmu_unload(vcpu);
1095
1096         /*
1097          * The TLB has to be flushed for all PCIDs if any of the following
1098          * (architecturally required) changes happen:
1099          * - CR4.PCIDE is changed from 1 to 0
1100          * - CR4.PGE is toggled
1101          *
1102          * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1103          */
1104         if (((cr4 ^ old_cr4) & X86_CR4_PGE) ||
1105             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
1106                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1107
1108         /*
1109          * The TLB has to be flushed for the current PCID if any of the
1110          * following (architecturally required) changes happen:
1111          * - CR4.SMEP is changed from 0 to 1
1112          * - CR4.PAE is toggled
1113          */
1114         else if (((cr4 ^ old_cr4) & X86_CR4_PAE) ||
1115                  ((cr4 & X86_CR4_SMEP) && !(old_cr4 & X86_CR4_SMEP)))
1116                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1117
1118 }
1119 EXPORT_SYMBOL_GPL(kvm_post_set_cr4);
1120
1121 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
1122 {
1123         unsigned long old_cr4 = kvm_read_cr4(vcpu);
1124
1125         if (!kvm_is_valid_cr4(vcpu, cr4))
1126                 return 1;
1127
1128         if (is_long_mode(vcpu)) {
1129                 if (!(cr4 & X86_CR4_PAE))
1130                         return 1;
1131                 if ((cr4 ^ old_cr4) & X86_CR4_LA57)
1132                         return 1;
1133         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
1134                    && ((cr4 ^ old_cr4) & X86_CR4_PDPTR_BITS)
1135                    && !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
1136                 return 1;
1137
1138         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
1139                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
1140                         return 1;
1141
1142                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1143                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
1144                         return 1;
1145         }
1146
1147         static_call(kvm_x86_set_cr4)(vcpu, cr4);
1148
1149         kvm_post_set_cr4(vcpu, old_cr4, cr4);
1150
1151         return 0;
1152 }
1153 EXPORT_SYMBOL_GPL(kvm_set_cr4);
1154
1155 static void kvm_invalidate_pcid(struct kvm_vcpu *vcpu, unsigned long pcid)
1156 {
1157         struct kvm_mmu *mmu = vcpu->arch.mmu;
1158         unsigned long roots_to_free = 0;
1159         int i;
1160
1161         /*
1162          * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1163          * this is reachable when running EPT=1 and unrestricted_guest=0,  and
1164          * also via the emulator.  KVM's TDP page tables are not in the scope of
1165          * the invalidation, but the guest's TLB entries need to be flushed as
1166          * the CPU may have cached entries in its TLB for the target PCID.
1167          */
1168         if (unlikely(tdp_enabled)) {
1169                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
1170                 return;
1171         }
1172
1173         /*
1174          * If neither the current CR3 nor any of the prev_roots use the given
1175          * PCID, then nothing needs to be done here because a resync will
1176          * happen anyway before switching to any other CR3.
1177          */
1178         if (kvm_get_active_pcid(vcpu) == pcid) {
1179                 kvm_make_request(KVM_REQ_MMU_SYNC, vcpu);
1180                 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
1181         }
1182
1183         /*
1184          * If PCID is disabled, there is no need to free prev_roots even if the
1185          * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1186          * with PCIDE=0.
1187          */
1188         if (!kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
1189                 return;
1190
1191         for (i = 0; i < KVM_MMU_NUM_PREV_ROOTS; i++)
1192                 if (kvm_get_pcid(vcpu, mmu->prev_roots[i].pgd) == pcid)
1193                         roots_to_free |= KVM_MMU_ROOT_PREVIOUS(i);
1194
1195         kvm_mmu_free_roots(vcpu->kvm, mmu, roots_to_free);
1196 }
1197
1198 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
1199 {
1200         bool skip_tlb_flush = false;
1201         unsigned long pcid = 0;
1202 #ifdef CONFIG_X86_64
1203         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
1204
1205         if (pcid_enabled) {
1206                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
1207                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
1208                 pcid = cr3 & X86_CR3_PCID_MASK;
1209         }
1210 #endif
1211
1212         /* PDPTRs are always reloaded for PAE paging. */
1213         if (cr3 == kvm_read_cr3(vcpu) && !is_pae_paging(vcpu))
1214                 goto handle_tlb_flush;
1215
1216         /*
1217          * Do not condition the GPA check on long mode, this helper is used to
1218          * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1219          * the current vCPU mode is accurate.
1220          */
1221         if (kvm_vcpu_is_illegal_gpa(vcpu, cr3))
1222                 return 1;
1223
1224         if (is_pae_paging(vcpu) && !load_pdptrs(vcpu, cr3))
1225                 return 1;
1226
1227         if (cr3 != kvm_read_cr3(vcpu))
1228                 kvm_mmu_new_pgd(vcpu, cr3);
1229
1230         vcpu->arch.cr3 = cr3;
1231         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
1232         /* Do not call post_set_cr3, we do not get here for confidential guests.  */
1233
1234 handle_tlb_flush:
1235         /*
1236          * A load of CR3 that flushes the TLB flushes only the current PCID,
1237          * even if PCID is disabled, in which case PCID=0 is flushed.  It's a
1238          * moot point in the end because _disabling_ PCID will flush all PCIDs,
1239          * and it's impossible to use a non-zero PCID when PCID is disabled,
1240          * i.e. only PCID=0 can be relevant.
1241          */
1242         if (!skip_tlb_flush)
1243                 kvm_invalidate_pcid(vcpu, pcid);
1244
1245         return 0;
1246 }
1247 EXPORT_SYMBOL_GPL(kvm_set_cr3);
1248
1249 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
1250 {
1251         if (cr8 & CR8_RESERVED_BITS)
1252                 return 1;
1253         if (lapic_in_kernel(vcpu))
1254                 kvm_lapic_set_tpr(vcpu, cr8);
1255         else
1256                 vcpu->arch.cr8 = cr8;
1257         return 0;
1258 }
1259 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1260
1261 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1262 {
1263         if (lapic_in_kernel(vcpu))
1264                 return kvm_lapic_get_cr8(vcpu);
1265         else
1266                 return vcpu->arch.cr8;
1267 }
1268 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1269
1270 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1271 {
1272         int i;
1273
1274         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1275                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1276                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1277         }
1278 }
1279
1280 void kvm_update_dr7(struct kvm_vcpu *vcpu)
1281 {
1282         unsigned long dr7;
1283
1284         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1285                 dr7 = vcpu->arch.guest_debug_dr7;
1286         else
1287                 dr7 = vcpu->arch.dr7;
1288         static_call(kvm_x86_set_dr7)(vcpu, dr7);
1289         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1290         if (dr7 & DR7_BP_EN_MASK)
1291                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1292 }
1293 EXPORT_SYMBOL_GPL(kvm_update_dr7);
1294
1295 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1296 {
1297         u64 fixed = DR6_FIXED_1;
1298
1299         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1300                 fixed |= DR6_RTM;
1301
1302         if (!guest_cpuid_has(vcpu, X86_FEATURE_BUS_LOCK_DETECT))
1303                 fixed |= DR6_BUS_LOCK;
1304         return fixed;
1305 }
1306
1307 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1308 {
1309         size_t size = ARRAY_SIZE(vcpu->arch.db);
1310
1311         switch (dr) {
1312         case 0 ... 3:
1313                 vcpu->arch.db[array_index_nospec(dr, size)] = val;
1314                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1315                         vcpu->arch.eff_db[dr] = val;
1316                 break;
1317         case 4:
1318         case 6:
1319                 if (!kvm_dr6_valid(val))
1320                         return 1; /* #GP */
1321                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1322                 break;
1323         case 5:
1324         default: /* 7 */
1325                 if (!kvm_dr7_valid(val))
1326                         return 1; /* #GP */
1327                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1328                 kvm_update_dr7(vcpu);
1329                 break;
1330         }
1331
1332         return 0;
1333 }
1334 EXPORT_SYMBOL_GPL(kvm_set_dr);
1335
1336 void kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1337 {
1338         size_t size = ARRAY_SIZE(vcpu->arch.db);
1339
1340         switch (dr) {
1341         case 0 ... 3:
1342                 *val = vcpu->arch.db[array_index_nospec(dr, size)];
1343                 break;
1344         case 4:
1345         case 6:
1346                 *val = vcpu->arch.dr6;
1347                 break;
1348         case 5:
1349         default: /* 7 */
1350                 *val = vcpu->arch.dr7;
1351                 break;
1352         }
1353 }
1354 EXPORT_SYMBOL_GPL(kvm_get_dr);
1355
1356 int kvm_emulate_rdpmc(struct kvm_vcpu *vcpu)
1357 {
1358         u32 ecx = kvm_rcx_read(vcpu);
1359         u64 data;
1360
1361         if (kvm_pmu_rdpmc(vcpu, ecx, &data)) {
1362                 kvm_inject_gp(vcpu, 0);
1363                 return 1;
1364         }
1365
1366         kvm_rax_write(vcpu, (u32)data);
1367         kvm_rdx_write(vcpu, data >> 32);
1368         return kvm_skip_emulated_instruction(vcpu);
1369 }
1370 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc);
1371
1372 /*
1373  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1374  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1375  *
1376  * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features)
1377  * extract the supported MSRs from the related const lists.
1378  * msrs_to_save is selected from the msrs_to_save_all to reflect the
1379  * capabilities of the host cpu. This capabilities test skips MSRs that are
1380  * kvm-specific. Those are put in emulated_msrs_all; filtering of emulated_msrs
1381  * may depend on host virtualization features rather than host cpu features.
1382  */
1383
1384 static const u32 msrs_to_save_all[] = {
1385         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1386         MSR_STAR,
1387 #ifdef CONFIG_X86_64
1388         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1389 #endif
1390         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1391         MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1392         MSR_IA32_SPEC_CTRL,
1393         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1394         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1395         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1396         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1397         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1398         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1399         MSR_IA32_UMWAIT_CONTROL,
1400
1401         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1402         MSR_ARCH_PERFMON_FIXED_CTR0 + 2,
1403         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1404         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1405         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1406         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1407         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1408         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1409         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1410         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1411         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1412         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1413         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1414         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1415         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1416         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1417         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1418         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1419         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1420         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1421         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1422         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1423
1424         MSR_K7_EVNTSEL0, MSR_K7_EVNTSEL1, MSR_K7_EVNTSEL2, MSR_K7_EVNTSEL3,
1425         MSR_K7_PERFCTR0, MSR_K7_PERFCTR1, MSR_K7_PERFCTR2, MSR_K7_PERFCTR3,
1426         MSR_F15H_PERF_CTL0, MSR_F15H_PERF_CTL1, MSR_F15H_PERF_CTL2,
1427         MSR_F15H_PERF_CTL3, MSR_F15H_PERF_CTL4, MSR_F15H_PERF_CTL5,
1428         MSR_F15H_PERF_CTR0, MSR_F15H_PERF_CTR1, MSR_F15H_PERF_CTR2,
1429         MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
1430         MSR_IA32_XFD, MSR_IA32_XFD_ERR,
1431 };
1432
1433 static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
1434 static unsigned num_msrs_to_save;
1435
1436 static const u32 emulated_msrs_all[] = {
1437         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1438         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1439         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1440         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1441         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1442         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1443         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1444         HV_X64_MSR_RESET,
1445         HV_X64_MSR_VP_INDEX,
1446         HV_X64_MSR_VP_RUNTIME,
1447         HV_X64_MSR_SCONTROL,
1448         HV_X64_MSR_STIMER0_CONFIG,
1449         HV_X64_MSR_VP_ASSIST_PAGE,
1450         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1451         HV_X64_MSR_TSC_EMULATION_STATUS,
1452         HV_X64_MSR_SYNDBG_OPTIONS,
1453         HV_X64_MSR_SYNDBG_CONTROL, HV_X64_MSR_SYNDBG_STATUS,
1454         HV_X64_MSR_SYNDBG_SEND_BUFFER, HV_X64_MSR_SYNDBG_RECV_BUFFER,
1455         HV_X64_MSR_SYNDBG_PENDING_BUFFER,
1456
1457         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1458         MSR_KVM_PV_EOI_EN, MSR_KVM_ASYNC_PF_INT, MSR_KVM_ASYNC_PF_ACK,
1459
1460         MSR_IA32_TSC_ADJUST,
1461         MSR_IA32_TSC_DEADLINE,
1462         MSR_IA32_ARCH_CAPABILITIES,
1463         MSR_IA32_PERF_CAPABILITIES,
1464         MSR_IA32_MISC_ENABLE,
1465         MSR_IA32_MCG_STATUS,
1466         MSR_IA32_MCG_CTL,
1467         MSR_IA32_MCG_EXT_CTL,
1468         MSR_IA32_SMBASE,
1469         MSR_SMI_COUNT,
1470         MSR_PLATFORM_INFO,
1471         MSR_MISC_FEATURES_ENABLES,
1472         MSR_AMD64_VIRT_SPEC_CTRL,
1473         MSR_AMD64_TSC_RATIO,
1474         MSR_IA32_POWER_CTL,
1475         MSR_IA32_UCODE_REV,
1476
1477         /*
1478          * The following list leaves out MSRs whose values are determined
1479          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1480          * We always support the "true" VMX control MSRs, even if the host
1481          * processor does not, so I am putting these registers here rather
1482          * than in msrs_to_save_all.
1483          */
1484         MSR_IA32_VMX_BASIC,
1485         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1486         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1487         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1488         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1489         MSR_IA32_VMX_MISC,
1490         MSR_IA32_VMX_CR0_FIXED0,
1491         MSR_IA32_VMX_CR4_FIXED0,
1492         MSR_IA32_VMX_VMCS_ENUM,
1493         MSR_IA32_VMX_PROCBASED_CTLS2,
1494         MSR_IA32_VMX_EPT_VPID_CAP,
1495         MSR_IA32_VMX_VMFUNC,
1496
1497         MSR_K7_HWCR,
1498         MSR_KVM_POLL_CONTROL,
1499 };
1500
1501 static u32 emulated_msrs[ARRAY_SIZE(emulated_msrs_all)];
1502 static unsigned num_emulated_msrs;
1503
1504 /*
1505  * List of msr numbers which are used to expose MSR-based features that
1506  * can be used by a hypervisor to validate requested CPU features.
1507  */
1508 static const u32 msr_based_features_all[] = {
1509         MSR_IA32_VMX_BASIC,
1510         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1511         MSR_IA32_VMX_PINBASED_CTLS,
1512         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1513         MSR_IA32_VMX_PROCBASED_CTLS,
1514         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1515         MSR_IA32_VMX_EXIT_CTLS,
1516         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1517         MSR_IA32_VMX_ENTRY_CTLS,
1518         MSR_IA32_VMX_MISC,
1519         MSR_IA32_VMX_CR0_FIXED0,
1520         MSR_IA32_VMX_CR0_FIXED1,
1521         MSR_IA32_VMX_CR4_FIXED0,
1522         MSR_IA32_VMX_CR4_FIXED1,
1523         MSR_IA32_VMX_VMCS_ENUM,
1524         MSR_IA32_VMX_PROCBASED_CTLS2,
1525         MSR_IA32_VMX_EPT_VPID_CAP,
1526         MSR_IA32_VMX_VMFUNC,
1527
1528         MSR_F10H_DECFG,
1529         MSR_IA32_UCODE_REV,
1530         MSR_IA32_ARCH_CAPABILITIES,
1531         MSR_IA32_PERF_CAPABILITIES,
1532 };
1533
1534 static u32 msr_based_features[ARRAY_SIZE(msr_based_features_all)];
1535 static unsigned int num_msr_based_features;
1536
1537 static u64 kvm_get_arch_capabilities(void)
1538 {
1539         u64 data = 0;
1540
1541         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1542                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1543
1544         /*
1545          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1546          * the nested hypervisor runs with NX huge pages.  If it is not,
1547          * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1548          * L1 guests, so it need not worry about its own (L2) guests.
1549          */
1550         data |= ARCH_CAP_PSCHANGE_MC_NO;
1551
1552         /*
1553          * If we're doing cache flushes (either "always" or "cond")
1554          * we will do one whenever the guest does a vmlaunch/vmresume.
1555          * If an outer hypervisor is doing the cache flush for us
1556          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1557          * capability to the guest too, and if EPT is disabled we're not
1558          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1559          * require a nested hypervisor to do a flush of its own.
1560          */
1561         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1562                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1563
1564         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1565                 data |= ARCH_CAP_RDCL_NO;
1566         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1567                 data |= ARCH_CAP_SSB_NO;
1568         if (!boot_cpu_has_bug(X86_BUG_MDS))
1569                 data |= ARCH_CAP_MDS_NO;
1570
1571         if (!boot_cpu_has(X86_FEATURE_RTM)) {
1572                 /*
1573                  * If RTM=0 because the kernel has disabled TSX, the host might
1574                  * have TAA_NO or TSX_CTRL.  Clear TAA_NO (the guest sees RTM=0
1575                  * and therefore knows that there cannot be TAA) but keep
1576                  * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1577                  * and we want to allow migrating those guests to tsx=off hosts.
1578                  */
1579                 data &= ~ARCH_CAP_TAA_NO;
1580         } else if (!boot_cpu_has_bug(X86_BUG_TAA)) {
1581                 data |= ARCH_CAP_TAA_NO;
1582         } else {
1583                 /*
1584                  * Nothing to do here; we emulate TSX_CTRL if present on the
1585                  * host so the guest can choose between disabling TSX or
1586                  * using VERW to clear CPU buffers.
1587                  */
1588         }
1589
1590         return data;
1591 }
1592
1593 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1594 {
1595         switch (msr->index) {
1596         case MSR_IA32_ARCH_CAPABILITIES:
1597                 msr->data = kvm_get_arch_capabilities();
1598                 break;
1599         case MSR_IA32_UCODE_REV:
1600                 rdmsrl_safe(msr->index, &msr->data);
1601                 break;
1602         default:
1603                 return static_call(kvm_x86_get_msr_feature)(msr);
1604         }
1605         return 0;
1606 }
1607
1608 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1609 {
1610         struct kvm_msr_entry msr;
1611         int r;
1612
1613         msr.index = index;
1614         r = kvm_get_msr_feature(&msr);
1615
1616         if (r == KVM_MSR_RET_INVALID) {
1617                 /* Unconditionally clear the output for simplicity */
1618                 *data = 0;
1619                 if (kvm_msr_ignored_check(index, 0, false))
1620                         r = 0;
1621         }
1622
1623         if (r)
1624                 return r;
1625
1626         *data = msr.data;
1627
1628         return 0;
1629 }
1630
1631 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1632 {
1633         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1634                 return false;
1635
1636         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1637                 return false;
1638
1639         if (efer & (EFER_LME | EFER_LMA) &&
1640             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1641                 return false;
1642
1643         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1644                 return false;
1645
1646         return true;
1647
1648 }
1649 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1650 {
1651         if (efer & efer_reserved_bits)
1652                 return false;
1653
1654         return __kvm_valid_efer(vcpu, efer);
1655 }
1656 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1657
1658 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1659 {
1660         u64 old_efer = vcpu->arch.efer;
1661         u64 efer = msr_info->data;
1662         int r;
1663
1664         if (efer & efer_reserved_bits)
1665                 return 1;
1666
1667         if (!msr_info->host_initiated) {
1668                 if (!__kvm_valid_efer(vcpu, efer))
1669                         return 1;
1670
1671                 if (is_paging(vcpu) &&
1672                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1673                         return 1;
1674         }
1675
1676         efer &= ~EFER_LMA;
1677         efer |= vcpu->arch.efer & EFER_LMA;
1678
1679         r = static_call(kvm_x86_set_efer)(vcpu, efer);
1680         if (r) {
1681                 WARN_ON(r > 0);
1682                 return r;
1683         }
1684
1685         if ((efer ^ old_efer) & KVM_MMU_EFER_ROLE_BITS)
1686                 kvm_mmu_reset_context(vcpu);
1687
1688         return 0;
1689 }
1690
1691 void kvm_enable_efer_bits(u64 mask)
1692 {
1693        efer_reserved_bits &= ~mask;
1694 }
1695 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1696
1697 bool kvm_msr_allowed(struct kvm_vcpu *vcpu, u32 index, u32 type)
1698 {
1699         struct kvm_x86_msr_filter *msr_filter;
1700         struct msr_bitmap_range *ranges;
1701         struct kvm *kvm = vcpu->kvm;
1702         bool allowed;
1703         int idx;
1704         u32 i;
1705
1706         /* x2APIC MSRs do not support filtering. */
1707         if (index >= 0x800 && index <= 0x8ff)
1708                 return true;
1709
1710         idx = srcu_read_lock(&kvm->srcu);
1711
1712         msr_filter = srcu_dereference(kvm->arch.msr_filter, &kvm->srcu);
1713         if (!msr_filter) {
1714                 allowed = true;
1715                 goto out;
1716         }
1717
1718         allowed = msr_filter->default_allow;
1719         ranges = msr_filter->ranges;
1720
1721         for (i = 0; i < msr_filter->count; i++) {
1722                 u32 start = ranges[i].base;
1723                 u32 end = start + ranges[i].nmsrs;
1724                 u32 flags = ranges[i].flags;
1725                 unsigned long *bitmap = ranges[i].bitmap;
1726
1727                 if ((index >= start) && (index < end) && (flags & type)) {
1728                         allowed = !!test_bit(index - start, bitmap);
1729                         break;
1730                 }
1731         }
1732
1733 out:
1734         srcu_read_unlock(&kvm->srcu, idx);
1735
1736         return allowed;
1737 }
1738 EXPORT_SYMBOL_GPL(kvm_msr_allowed);
1739
1740 /*
1741  * Write @data into the MSR specified by @index.  Select MSR specific fault
1742  * checks are bypassed if @host_initiated is %true.
1743  * Returns 0 on success, non-0 otherwise.
1744  * Assumes vcpu_load() was already called.
1745  */
1746 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1747                          bool host_initiated)
1748 {
1749         struct msr_data msr;
1750
1751         switch (index) {
1752         case MSR_FS_BASE:
1753         case MSR_GS_BASE:
1754         case MSR_KERNEL_GS_BASE:
1755         case MSR_CSTAR:
1756         case MSR_LSTAR:
1757                 if (is_noncanonical_address(data, vcpu))
1758                         return 1;
1759                 break;
1760         case MSR_IA32_SYSENTER_EIP:
1761         case MSR_IA32_SYSENTER_ESP:
1762                 /*
1763                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1764                  * non-canonical address is written on Intel but not on
1765                  * AMD (which ignores the top 32-bits, because it does
1766                  * not implement 64-bit SYSENTER).
1767                  *
1768                  * 64-bit code should hence be able to write a non-canonical
1769                  * value on AMD.  Making the address canonical ensures that
1770                  * vmentry does not fail on Intel after writing a non-canonical
1771                  * value, and that something deterministic happens if the guest
1772                  * invokes 64-bit SYSENTER.
1773                  */
1774                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1775                 break;
1776         case MSR_TSC_AUX:
1777                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1778                         return 1;
1779
1780                 if (!host_initiated &&
1781                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1782                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1783                         return 1;
1784
1785                 /*
1786                  * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1787                  * incomplete and conflicting architectural behavior.  Current
1788                  * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1789                  * reserved and always read as zeros.  Enforce Intel's reserved
1790                  * bits check if and only if the guest CPU is Intel, and clear
1791                  * the bits in all other cases.  This ensures cross-vendor
1792                  * migration will provide consistent behavior for the guest.
1793                  */
1794                 if (guest_cpuid_is_intel(vcpu) && (data >> 32) != 0)
1795                         return 1;
1796
1797                 data = (u32)data;
1798                 break;
1799         }
1800
1801         msr.data = data;
1802         msr.index = index;
1803         msr.host_initiated = host_initiated;
1804
1805         return static_call(kvm_x86_set_msr)(vcpu, &msr);
1806 }
1807
1808 static int kvm_set_msr_ignored_check(struct kvm_vcpu *vcpu,
1809                                      u32 index, u64 data, bool host_initiated)
1810 {
1811         int ret = __kvm_set_msr(vcpu, index, data, host_initiated);
1812
1813         if (ret == KVM_MSR_RET_INVALID)
1814                 if (kvm_msr_ignored_check(index, data, true))
1815                         ret = 0;
1816
1817         return ret;
1818 }
1819
1820 /*
1821  * Read the MSR specified by @index into @data.  Select MSR specific fault
1822  * checks are bypassed if @host_initiated is %true.
1823  * Returns 0 on success, non-0 otherwise.
1824  * Assumes vcpu_load() was already called.
1825  */
1826 int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1827                   bool host_initiated)
1828 {
1829         struct msr_data msr;
1830         int ret;
1831
1832         switch (index) {
1833         case MSR_TSC_AUX:
1834                 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX))
1835                         return 1;
1836
1837                 if (!host_initiated &&
1838                     !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) &&
1839                     !guest_cpuid_has(vcpu, X86_FEATURE_RDPID))
1840                         return 1;
1841                 break;
1842         }
1843
1844         msr.index = index;
1845         msr.host_initiated = host_initiated;
1846
1847         ret = static_call(kvm_x86_get_msr)(vcpu, &msr);
1848         if (!ret)
1849                 *data = msr.data;
1850         return ret;
1851 }
1852
1853 static int kvm_get_msr_ignored_check(struct kvm_vcpu *vcpu,
1854                                      u32 index, u64 *data, bool host_initiated)
1855 {
1856         int ret = __kvm_get_msr(vcpu, index, data, host_initiated);
1857
1858         if (ret == KVM_MSR_RET_INVALID) {
1859                 /* Unconditionally clear *data for simplicity */
1860                 *data = 0;
1861                 if (kvm_msr_ignored_check(index, 0, false))
1862                         ret = 0;
1863         }
1864
1865         return ret;
1866 }
1867
1868 static int kvm_get_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1869 {
1870         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_READ))
1871                 return KVM_MSR_RET_FILTERED;
1872         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1873 }
1874
1875 static int kvm_set_msr_with_filter(struct kvm_vcpu *vcpu, u32 index, u64 data)
1876 {
1877         if (!kvm_msr_allowed(vcpu, index, KVM_MSR_FILTER_WRITE))
1878                 return KVM_MSR_RET_FILTERED;
1879         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1880 }
1881
1882 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1883 {
1884         return kvm_get_msr_ignored_check(vcpu, index, data, false);
1885 }
1886 EXPORT_SYMBOL_GPL(kvm_get_msr);
1887
1888 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1889 {
1890         return kvm_set_msr_ignored_check(vcpu, index, data, false);
1891 }
1892 EXPORT_SYMBOL_GPL(kvm_set_msr);
1893
1894 static void complete_userspace_rdmsr(struct kvm_vcpu *vcpu)
1895 {
1896         if (!vcpu->run->msr.error) {
1897                 kvm_rax_write(vcpu, (u32)vcpu->run->msr.data);
1898                 kvm_rdx_write(vcpu, vcpu->run->msr.data >> 32);
1899         }
1900 }
1901
1902 static int complete_emulated_msr_access(struct kvm_vcpu *vcpu)
1903 {
1904         return complete_emulated_insn_gp(vcpu, vcpu->run->msr.error);
1905 }
1906
1907 static int complete_emulated_rdmsr(struct kvm_vcpu *vcpu)
1908 {
1909         complete_userspace_rdmsr(vcpu);
1910         return complete_emulated_msr_access(vcpu);
1911 }
1912
1913 static int complete_fast_msr_access(struct kvm_vcpu *vcpu)
1914 {
1915         return static_call(kvm_x86_complete_emulated_msr)(vcpu, vcpu->run->msr.error);
1916 }
1917
1918 static int complete_fast_rdmsr(struct kvm_vcpu *vcpu)
1919 {
1920         complete_userspace_rdmsr(vcpu);
1921         return complete_fast_msr_access(vcpu);
1922 }
1923
1924 static u64 kvm_msr_reason(int r)
1925 {
1926         switch (r) {
1927         case KVM_MSR_RET_INVALID:
1928                 return KVM_MSR_EXIT_REASON_UNKNOWN;
1929         case KVM_MSR_RET_FILTERED:
1930                 return KVM_MSR_EXIT_REASON_FILTER;
1931         default:
1932                 return KVM_MSR_EXIT_REASON_INVAL;
1933         }
1934 }
1935
1936 static int kvm_msr_user_space(struct kvm_vcpu *vcpu, u32 index,
1937                               u32 exit_reason, u64 data,
1938                               int (*completion)(struct kvm_vcpu *vcpu),
1939                               int r)
1940 {
1941         u64 msr_reason = kvm_msr_reason(r);
1942
1943         /* Check if the user wanted to know about this MSR fault */
1944         if (!(vcpu->kvm->arch.user_space_msr_mask & msr_reason))
1945                 return 0;
1946
1947         vcpu->run->exit_reason = exit_reason;
1948         vcpu->run->msr.error = 0;
1949         memset(vcpu->run->msr.pad, 0, sizeof(vcpu->run->msr.pad));
1950         vcpu->run->msr.reason = msr_reason;
1951         vcpu->run->msr.index = index;
1952         vcpu->run->msr.data = data;
1953         vcpu->arch.complete_userspace_io = completion;
1954
1955         return 1;
1956 }
1957
1958 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1959 {
1960         u32 ecx = kvm_rcx_read(vcpu);
1961         u64 data;
1962         int r;
1963
1964         r = kvm_get_msr_with_filter(vcpu, ecx, &data);
1965
1966         if (!r) {
1967                 trace_kvm_msr_read(ecx, data);
1968
1969                 kvm_rax_write(vcpu, data & -1u);
1970                 kvm_rdx_write(vcpu, (data >> 32) & -1u);
1971         } else {
1972                 /* MSR read failed? See if we should ask user space */
1973                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_RDMSR, 0,
1974                                        complete_fast_rdmsr, r))
1975                         return 0;
1976                 trace_kvm_msr_read_ex(ecx);
1977         }
1978
1979         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
1980 }
1981 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1982
1983 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1984 {
1985         u32 ecx = kvm_rcx_read(vcpu);
1986         u64 data = kvm_read_edx_eax(vcpu);
1987         int r;
1988
1989         r = kvm_set_msr_with_filter(vcpu, ecx, data);
1990
1991         if (!r) {
1992                 trace_kvm_msr_write(ecx, data);
1993         } else {
1994                 /* MSR write failed? See if we should ask user space */
1995                 if (kvm_msr_user_space(vcpu, ecx, KVM_EXIT_X86_WRMSR, data,
1996                                        complete_fast_msr_access, r))
1997                         return 0;
1998                 /* Signal all other negative errors to userspace */
1999                 if (r < 0)
2000                         return r;
2001                 trace_kvm_msr_write_ex(ecx, data);
2002         }
2003
2004         return static_call(kvm_x86_complete_emulated_msr)(vcpu, r);
2005 }
2006 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
2007
2008 int kvm_emulate_as_nop(struct kvm_vcpu *vcpu)
2009 {
2010         return kvm_skip_emulated_instruction(vcpu);
2011 }
2012 EXPORT_SYMBOL_GPL(kvm_emulate_as_nop);
2013
2014 int kvm_emulate_invd(struct kvm_vcpu *vcpu)
2015 {
2016         /* Treat an INVD instruction as a NOP and just skip it. */
2017         return kvm_emulate_as_nop(vcpu);
2018 }
2019 EXPORT_SYMBOL_GPL(kvm_emulate_invd);
2020
2021 int kvm_emulate_mwait(struct kvm_vcpu *vcpu)
2022 {
2023         pr_warn_once("kvm: MWAIT instruction emulated as NOP!\n");
2024         return kvm_emulate_as_nop(vcpu);
2025 }
2026 EXPORT_SYMBOL_GPL(kvm_emulate_mwait);
2027
2028 int kvm_handle_invalid_op(struct kvm_vcpu *vcpu)
2029 {
2030         kvm_queue_exception(vcpu, UD_VECTOR);
2031         return 1;
2032 }
2033 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op);
2034
2035 int kvm_emulate_monitor(struct kvm_vcpu *vcpu)
2036 {
2037         pr_warn_once("kvm: MONITOR instruction emulated as NOP!\n");
2038         return kvm_emulate_as_nop(vcpu);
2039 }
2040 EXPORT_SYMBOL_GPL(kvm_emulate_monitor);
2041
2042 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu *vcpu)
2043 {
2044         xfer_to_guest_mode_prepare();
2045         return vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu) ||
2046                 xfer_to_guest_mode_work_pending();
2047 }
2048
2049 /*
2050  * The fast path for frequent and performance sensitive wrmsr emulation,
2051  * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2052  * the latency of virtual IPI by avoiding the expensive bits of transitioning
2053  * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2054  * other cases which must be called after interrupts are enabled on the host.
2055  */
2056 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu *vcpu, u64 data)
2057 {
2058         if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(vcpu->arch.apic))
2059                 return 1;
2060
2061         if (((data & APIC_SHORT_MASK) == APIC_DEST_NOSHORT) &&
2062             ((data & APIC_DEST_MASK) == APIC_DEST_PHYSICAL) &&
2063             ((data & APIC_MODE_MASK) == APIC_DM_FIXED) &&
2064             ((u32)(data >> 32) != X2APIC_BROADCAST))
2065                 return kvm_x2apic_icr_write(vcpu->arch.apic, data);
2066
2067         return 1;
2068 }
2069
2070 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu *vcpu, u64 data)
2071 {
2072         if (!kvm_can_use_hv_timer(vcpu))
2073                 return 1;
2074
2075         kvm_set_lapic_tscdeadline_msr(vcpu, data);
2076         return 0;
2077 }
2078
2079 fastpath_t handle_fastpath_set_msr_irqoff(struct kvm_vcpu *vcpu)
2080 {
2081         u32 msr = kvm_rcx_read(vcpu);
2082         u64 data;
2083         fastpath_t ret = EXIT_FASTPATH_NONE;
2084
2085         switch (msr) {
2086         case APIC_BASE_MSR + (APIC_ICR >> 4):
2087                 data = kvm_read_edx_eax(vcpu);
2088                 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu, data)) {
2089                         kvm_skip_emulated_instruction(vcpu);
2090                         ret = EXIT_FASTPATH_EXIT_HANDLED;
2091                 }
2092                 break;
2093         case MSR_IA32_TSC_DEADLINE:
2094                 data = kvm_read_edx_eax(vcpu);
2095                 if (!handle_fastpath_set_tscdeadline(vcpu, data)) {
2096                         kvm_skip_emulated_instruction(vcpu);
2097                         ret = EXIT_FASTPATH_REENTER_GUEST;
2098                 }
2099                 break;
2100         default:
2101                 break;
2102         }
2103
2104         if (ret != EXIT_FASTPATH_NONE)
2105                 trace_kvm_msr_write(msr, data);
2106
2107         return ret;
2108 }
2109 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff);
2110
2111 /*
2112  * Adapt set_msr() to msr_io()'s calling convention
2113  */
2114 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2115 {
2116         return kvm_get_msr_ignored_check(vcpu, index, data, true);
2117 }
2118
2119 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
2120 {
2121         return kvm_set_msr_ignored_check(vcpu, index, *data, true);
2122 }
2123
2124 #ifdef CONFIG_X86_64
2125 struct pvclock_clock {
2126         int vclock_mode;
2127         u64 cycle_last;
2128         u64 mask;
2129         u32 mult;
2130         u32 shift;
2131         u64 base_cycles;
2132         u64 offset;
2133 };
2134
2135 struct pvclock_gtod_data {
2136         seqcount_t      seq;
2137
2138         struct pvclock_clock clock; /* extract of a clocksource struct */
2139         struct pvclock_clock raw_clock; /* extract of a clocksource struct */
2140
2141         ktime_t         offs_boot;
2142         u64             wall_time_sec;
2143 };
2144
2145 static struct pvclock_gtod_data pvclock_gtod_data;
2146
2147 static void update_pvclock_gtod(struct timekeeper *tk)
2148 {
2149         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
2150
2151         write_seqcount_begin(&vdata->seq);
2152
2153         /* copy pvclock gtod data */
2154         vdata->clock.vclock_mode        = tk->tkr_mono.clock->vdso_clock_mode;
2155         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
2156         vdata->clock.mask               = tk->tkr_mono.mask;
2157         vdata->clock.mult               = tk->tkr_mono.mult;
2158         vdata->clock.shift              = tk->tkr_mono.shift;
2159         vdata->clock.base_cycles        = tk->tkr_mono.xtime_nsec;
2160         vdata->clock.offset             = tk->tkr_mono.base;
2161
2162         vdata->raw_clock.vclock_mode    = tk->tkr_raw.clock->vdso_clock_mode;
2163         vdata->raw_clock.cycle_last     = tk->tkr_raw.cycle_last;
2164         vdata->raw_clock.mask           = tk->tkr_raw.mask;
2165         vdata->raw_clock.mult           = tk->tkr_raw.mult;
2166         vdata->raw_clock.shift          = tk->tkr_raw.shift;
2167         vdata->raw_clock.base_cycles    = tk->tkr_raw.xtime_nsec;
2168         vdata->raw_clock.offset         = tk->tkr_raw.base;
2169
2170         vdata->wall_time_sec            = tk->xtime_sec;
2171
2172         vdata->offs_boot                = tk->offs_boot;
2173
2174         write_seqcount_end(&vdata->seq);
2175 }
2176
2177 static s64 get_kvmclock_base_ns(void)
2178 {
2179         /* Count up from boot time, but with the frequency of the raw clock.  */
2180         return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot));
2181 }
2182 #else
2183 static s64 get_kvmclock_base_ns(void)
2184 {
2185         /* Master clock not used, so we can just use CLOCK_BOOTTIME.  */
2186         return ktime_get_boottime_ns();
2187 }
2188 #endif
2189
2190 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs)
2191 {
2192         int version;
2193         int r;
2194         struct pvclock_wall_clock wc;
2195         u32 wc_sec_hi;
2196         u64 wall_nsec;
2197
2198         if (!wall_clock)
2199                 return;
2200
2201         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
2202         if (r)
2203                 return;
2204
2205         if (version & 1)
2206                 ++version;  /* first time write, random junk */
2207
2208         ++version;
2209
2210         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
2211                 return;
2212
2213         /*
2214          * The guest calculates current wall clock time by adding
2215          * system time (updated by kvm_guest_time_update below) to the
2216          * wall clock specified here.  We do the reverse here.
2217          */
2218         wall_nsec = ktime_get_real_ns() - get_kvmclock_ns(kvm);
2219
2220         wc.nsec = do_div(wall_nsec, 1000000000);
2221         wc.sec = (u32)wall_nsec; /* overflow in 2106 guest time */
2222         wc.version = version;
2223
2224         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
2225
2226         if (sec_hi_ofs) {
2227                 wc_sec_hi = wall_nsec >> 32;
2228                 kvm_write_guest(kvm, wall_clock + sec_hi_ofs,
2229                                 &wc_sec_hi, sizeof(wc_sec_hi));
2230         }
2231
2232         version++;
2233         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
2234 }
2235
2236 static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time,
2237                                   bool old_msr, bool host_initiated)
2238 {
2239         struct kvm_arch *ka = &vcpu->kvm->arch;
2240
2241         if (vcpu->vcpu_id == 0 && !host_initiated) {
2242                 if (ka->boot_vcpu_runs_old_kvmclock != old_msr)
2243                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2244
2245                 ka->boot_vcpu_runs_old_kvmclock = old_msr;
2246         }
2247
2248         vcpu->arch.time = system_time;
2249         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2250
2251         /* we verify if the enable bit is set... */
2252         if (system_time & 1) {
2253                 kvm_gfn_to_pfn_cache_init(vcpu->kvm, &vcpu->arch.pv_time, vcpu,
2254                                           KVM_HOST_USES_PFN, system_time & ~1ULL,
2255                                           sizeof(struct pvclock_vcpu_time_info));
2256         } else {
2257                 kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
2258         }
2259
2260         return;
2261 }
2262
2263 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
2264 {
2265         do_shl32_div32(dividend, divisor);
2266         return dividend;
2267 }
2268
2269 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
2270                                s8 *pshift, u32 *pmultiplier)
2271 {
2272         uint64_t scaled64;
2273         int32_t  shift = 0;
2274         uint64_t tps64;
2275         uint32_t tps32;
2276
2277         tps64 = base_hz;
2278         scaled64 = scaled_hz;
2279         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
2280                 tps64 >>= 1;
2281                 shift--;
2282         }
2283
2284         tps32 = (uint32_t)tps64;
2285         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
2286                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
2287                         scaled64 >>= 1;
2288                 else
2289                         tps32 <<= 1;
2290                 shift++;
2291         }
2292
2293         *pshift = shift;
2294         *pmultiplier = div_frac(scaled64, tps32);
2295 }
2296
2297 #ifdef CONFIG_X86_64
2298 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
2299 #endif
2300
2301 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
2302 static unsigned long max_tsc_khz;
2303
2304 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
2305 {
2306         u64 v = (u64)khz * (1000000 + ppm);
2307         do_div(v, 1000000);
2308         return v;
2309 }
2310
2311 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier);
2312
2313 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
2314 {
2315         u64 ratio;
2316
2317         /* Guest TSC same frequency as host TSC? */
2318         if (!scale) {
2319                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2320                 return 0;
2321         }
2322
2323         /* TSC scaling supported? */
2324         if (!kvm_has_tsc_control) {
2325                 if (user_tsc_khz > tsc_khz) {
2326                         vcpu->arch.tsc_catchup = 1;
2327                         vcpu->arch.tsc_always_catchup = 1;
2328                         return 0;
2329                 } else {
2330                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2331                         return -1;
2332                 }
2333         }
2334
2335         /* TSC scaling required  - calculate ratio */
2336         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
2337                                 user_tsc_khz, tsc_khz);
2338
2339         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
2340                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2341                                     user_tsc_khz);
2342                 return -1;
2343         }
2344
2345         kvm_vcpu_write_tsc_multiplier(vcpu, ratio);
2346         return 0;
2347 }
2348
2349 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
2350 {
2351         u32 thresh_lo, thresh_hi;
2352         int use_scaling = 0;
2353
2354         /* tsc_khz can be zero if TSC calibration fails */
2355         if (user_tsc_khz == 0) {
2356                 /* set tsc_scaling_ratio to a safe value */
2357                 kvm_vcpu_write_tsc_multiplier(vcpu, kvm_default_tsc_scaling_ratio);
2358                 return -1;
2359         }
2360
2361         /* Compute a scale to convert nanoseconds in TSC cycles */
2362         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
2363                            &vcpu->arch.virtual_tsc_shift,
2364                            &vcpu->arch.virtual_tsc_mult);
2365         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
2366
2367         /*
2368          * Compute the variation in TSC rate which is acceptable
2369          * within the range of tolerance and decide if the
2370          * rate being applied is within that bounds of the hardware
2371          * rate.  If so, no scaling or compensation need be done.
2372          */
2373         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
2374         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
2375         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
2376                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
2377                 use_scaling = 1;
2378         }
2379         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
2380 }
2381
2382 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
2383 {
2384         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
2385                                       vcpu->arch.virtual_tsc_mult,
2386                                       vcpu->arch.virtual_tsc_shift);
2387         tsc += vcpu->arch.this_tsc_write;
2388         return tsc;
2389 }
2390
2391 #ifdef CONFIG_X86_64
2392 static inline int gtod_is_based_on_tsc(int mode)
2393 {
2394         return mode == VDSO_CLOCKMODE_TSC || mode == VDSO_CLOCKMODE_HVCLOCK;
2395 }
2396 #endif
2397
2398 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
2399 {
2400 #ifdef CONFIG_X86_64
2401         bool vcpus_matched;
2402         struct kvm_arch *ka = &vcpu->kvm->arch;
2403         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2404
2405         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2406                          atomic_read(&vcpu->kvm->online_vcpus));
2407
2408         /*
2409          * Once the masterclock is enabled, always perform request in
2410          * order to update it.
2411          *
2412          * In order to enable masterclock, the host clocksource must be TSC
2413          * and the vcpus need to have matched TSCs.  When that happens,
2414          * perform request to enable masterclock.
2415          */
2416         if (ka->use_master_clock ||
2417             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
2418                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2419
2420         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
2421                             atomic_read(&vcpu->kvm->online_vcpus),
2422                             ka->use_master_clock, gtod->clock.vclock_mode);
2423 #endif
2424 }
2425
2426 /*
2427  * Multiply tsc by a fixed point number represented by ratio.
2428  *
2429  * The most significant 64-N bits (mult) of ratio represent the
2430  * integral part of the fixed point number; the remaining N bits
2431  * (frac) represent the fractional part, ie. ratio represents a fixed
2432  * point number (mult + frac * 2^(-N)).
2433  *
2434  * N equals to kvm_tsc_scaling_ratio_frac_bits.
2435  */
2436 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
2437 {
2438         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
2439 }
2440
2441 u64 kvm_scale_tsc(u64 tsc, u64 ratio)
2442 {
2443         u64 _tsc = tsc;
2444
2445         if (ratio != kvm_default_tsc_scaling_ratio)
2446                 _tsc = __scale_tsc(ratio, tsc);
2447
2448         return _tsc;
2449 }
2450 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
2451
2452 static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
2453 {
2454         u64 tsc;
2455
2456         tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio);
2457
2458         return target_tsc - tsc;
2459 }
2460
2461 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
2462 {
2463         return vcpu->arch.l1_tsc_offset +
2464                 kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio);
2465 }
2466 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
2467
2468 u64 kvm_calc_nested_tsc_offset(u64 l1_offset, u64 l2_offset, u64 l2_multiplier)
2469 {
2470         u64 nested_offset;
2471
2472         if (l2_multiplier == kvm_default_tsc_scaling_ratio)
2473                 nested_offset = l1_offset;
2474         else
2475                 nested_offset = mul_s64_u64_shr((s64) l1_offset, l2_multiplier,
2476                                                 kvm_tsc_scaling_ratio_frac_bits);
2477
2478         nested_offset += l2_offset;
2479         return nested_offset;
2480 }
2481 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset);
2482
2483 u64 kvm_calc_nested_tsc_multiplier(u64 l1_multiplier, u64 l2_multiplier)
2484 {
2485         if (l2_multiplier != kvm_default_tsc_scaling_ratio)
2486                 return mul_u64_u64_shr(l1_multiplier, l2_multiplier,
2487                                        kvm_tsc_scaling_ratio_frac_bits);
2488
2489         return l1_multiplier;
2490 }
2491 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier);
2492
2493 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 l1_offset)
2494 {
2495         trace_kvm_write_tsc_offset(vcpu->vcpu_id,
2496                                    vcpu->arch.l1_tsc_offset,
2497                                    l1_offset);
2498
2499         vcpu->arch.l1_tsc_offset = l1_offset;
2500
2501         /*
2502          * If we are here because L1 chose not to trap WRMSR to TSC then
2503          * according to the spec this should set L1's TSC (as opposed to
2504          * setting L1's offset for L2).
2505          */
2506         if (is_guest_mode(vcpu))
2507                 vcpu->arch.tsc_offset = kvm_calc_nested_tsc_offset(
2508                         l1_offset,
2509                         static_call(kvm_x86_get_l2_tsc_offset)(vcpu),
2510                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2511         else
2512                 vcpu->arch.tsc_offset = l1_offset;
2513
2514         static_call(kvm_x86_write_tsc_offset)(vcpu, vcpu->arch.tsc_offset);
2515 }
2516
2517 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu *vcpu, u64 l1_multiplier)
2518 {
2519         vcpu->arch.l1_tsc_scaling_ratio = l1_multiplier;
2520
2521         /* Userspace is changing the multiplier while L2 is active */
2522         if (is_guest_mode(vcpu))
2523                 vcpu->arch.tsc_scaling_ratio = kvm_calc_nested_tsc_multiplier(
2524                         l1_multiplier,
2525                         static_call(kvm_x86_get_l2_tsc_multiplier)(vcpu));
2526         else
2527                 vcpu->arch.tsc_scaling_ratio = l1_multiplier;
2528
2529         if (kvm_has_tsc_control)
2530                 static_call(kvm_x86_write_tsc_multiplier)(
2531                         vcpu, vcpu->arch.tsc_scaling_ratio);
2532 }
2533
2534 static inline bool kvm_check_tsc_unstable(void)
2535 {
2536 #ifdef CONFIG_X86_64
2537         /*
2538          * TSC is marked unstable when we're running on Hyper-V,
2539          * 'TSC page' clocksource is good.
2540          */
2541         if (pvclock_gtod_data.clock.vclock_mode == VDSO_CLOCKMODE_HVCLOCK)
2542                 return false;
2543 #endif
2544         return check_tsc_unstable();
2545 }
2546
2547 /*
2548  * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2549  * offset for the vcpu and tracks the TSC matching generation that the vcpu
2550  * participates in.
2551  */
2552 static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc,
2553                                   u64 ns, bool matched)
2554 {
2555         struct kvm *kvm = vcpu->kvm;
2556
2557         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2558
2559         /*
2560          * We also track th most recent recorded KHZ, write and time to
2561          * allow the matching interval to be extended at each write.
2562          */
2563         kvm->arch.last_tsc_nsec = ns;
2564         kvm->arch.last_tsc_write = tsc;
2565         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
2566         kvm->arch.last_tsc_offset = offset;
2567
2568         vcpu->arch.last_guest_tsc = tsc;
2569
2570         kvm_vcpu_write_tsc_offset(vcpu, offset);
2571
2572         if (!matched) {
2573                 /*
2574                  * We split periods of matched TSC writes into generations.
2575                  * For each generation, we track the original measured
2576                  * nanosecond time, offset, and write, so if TSCs are in
2577                  * sync, we can match exact offset, and if not, we can match
2578                  * exact software computation in compute_guest_tsc()
2579                  *
2580                  * These values are tracked in kvm->arch.cur_xxx variables.
2581                  */
2582                 kvm->arch.cur_tsc_generation++;
2583                 kvm->arch.cur_tsc_nsec = ns;
2584                 kvm->arch.cur_tsc_write = tsc;
2585                 kvm->arch.cur_tsc_offset = offset;
2586                 kvm->arch.nr_vcpus_matched_tsc = 0;
2587         } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) {
2588                 kvm->arch.nr_vcpus_matched_tsc++;
2589         }
2590
2591         /* Keep track of which generation this VCPU has synchronized to */
2592         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
2593         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
2594         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
2595
2596         kvm_track_tsc_matching(vcpu);
2597 }
2598
2599 static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 data)
2600 {
2601         struct kvm *kvm = vcpu->kvm;
2602         u64 offset, ns, elapsed;
2603         unsigned long flags;
2604         bool matched = false;
2605         bool synchronizing = false;
2606
2607         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
2608         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2609         ns = get_kvmclock_base_ns();
2610         elapsed = ns - kvm->arch.last_tsc_nsec;
2611
2612         if (vcpu->arch.virtual_tsc_khz) {
2613                 if (data == 0) {
2614                         /*
2615                          * detection of vcpu initialization -- need to sync
2616                          * with other vCPUs. This particularly helps to keep
2617                          * kvm_clock stable after CPU hotplug
2618                          */
2619                         synchronizing = true;
2620                 } else {
2621                         u64 tsc_exp = kvm->arch.last_tsc_write +
2622                                                 nsec_to_cycles(vcpu, elapsed);
2623                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
2624                         /*
2625                          * Special case: TSC write with a small delta (1 second)
2626                          * of virtual cycle time against real time is
2627                          * interpreted as an attempt to synchronize the CPU.
2628                          */
2629                         synchronizing = data < tsc_exp + tsc_hz &&
2630                                         data + tsc_hz > tsc_exp;
2631                 }
2632         }
2633
2634         /*
2635          * For a reliable TSC, we can match TSC offsets, and for an unstable
2636          * TSC, we add elapsed time in this computation.  We could let the
2637          * compensation code attempt to catch up if we fall behind, but
2638          * it's better to try to match offsets from the beginning.
2639          */
2640         if (synchronizing &&
2641             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
2642                 if (!kvm_check_tsc_unstable()) {
2643                         offset = kvm->arch.cur_tsc_offset;
2644                 } else {
2645                         u64 delta = nsec_to_cycles(vcpu, elapsed);
2646                         data += delta;
2647                         offset = kvm_compute_l1_tsc_offset(vcpu, data);
2648                 }
2649                 matched = true;
2650         }
2651
2652         __kvm_synchronize_tsc(vcpu, offset, data, ns, matched);
2653         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
2654 }
2655
2656 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
2657                                            s64 adjustment)
2658 {
2659         u64 tsc_offset = vcpu->arch.l1_tsc_offset;
2660         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
2661 }
2662
2663 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
2664 {
2665         if (vcpu->arch.l1_tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
2666                 WARN_ON(adjustment < 0);
2667         adjustment = kvm_scale_tsc((u64) adjustment,
2668                                    vcpu->arch.l1_tsc_scaling_ratio);
2669         adjust_tsc_offset_guest(vcpu, adjustment);
2670 }
2671
2672 #ifdef CONFIG_X86_64
2673
2674 static u64 read_tsc(void)
2675 {
2676         u64 ret = (u64)rdtsc_ordered();
2677         u64 last = pvclock_gtod_data.clock.cycle_last;
2678
2679         if (likely(ret >= last))
2680                 return ret;
2681
2682         /*
2683          * GCC likes to generate cmov here, but this branch is extremely
2684          * predictable (it's just a function of time and the likely is
2685          * very likely) and there's a data dependence, so force GCC
2686          * to generate a branch instead.  I don't barrier() because
2687          * we don't actually need a barrier, and if this function
2688          * ever gets inlined it will generate worse code.
2689          */
2690         asm volatile ("");
2691         return last;
2692 }
2693
2694 static inline u64 vgettsc(struct pvclock_clock *clock, u64 *tsc_timestamp,
2695                           int *mode)
2696 {
2697         long v;
2698         u64 tsc_pg_val;
2699
2700         switch (clock->vclock_mode) {
2701         case VDSO_CLOCKMODE_HVCLOCK:
2702                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2703                                                   tsc_timestamp);
2704                 if (tsc_pg_val != U64_MAX) {
2705                         /* TSC page valid */
2706                         *mode = VDSO_CLOCKMODE_HVCLOCK;
2707                         v = (tsc_pg_val - clock->cycle_last) &
2708                                 clock->mask;
2709                 } else {
2710                         /* TSC page invalid */
2711                         *mode = VDSO_CLOCKMODE_NONE;
2712                 }
2713                 break;
2714         case VDSO_CLOCKMODE_TSC:
2715                 *mode = VDSO_CLOCKMODE_TSC;
2716                 *tsc_timestamp = read_tsc();
2717                 v = (*tsc_timestamp - clock->cycle_last) &
2718                         clock->mask;
2719                 break;
2720         default:
2721                 *mode = VDSO_CLOCKMODE_NONE;
2722         }
2723
2724         if (*mode == VDSO_CLOCKMODE_NONE)
2725                 *tsc_timestamp = v = 0;
2726
2727         return v * clock->mult;
2728 }
2729
2730 static int do_monotonic_raw(s64 *t, u64 *tsc_timestamp)
2731 {
2732         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2733         unsigned long seq;
2734         int mode;
2735         u64 ns;
2736
2737         do {
2738                 seq = read_seqcount_begin(&gtod->seq);
2739                 ns = gtod->raw_clock.base_cycles;
2740                 ns += vgettsc(&gtod->raw_clock, tsc_timestamp, &mode);
2741                 ns >>= gtod->raw_clock.shift;
2742                 ns += ktime_to_ns(ktime_add(gtod->raw_clock.offset, gtod->offs_boot));
2743         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2744         *t = ns;
2745
2746         return mode;
2747 }
2748
2749 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2750 {
2751         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2752         unsigned long seq;
2753         int mode;
2754         u64 ns;
2755
2756         do {
2757                 seq = read_seqcount_begin(&gtod->seq);
2758                 ts->tv_sec = gtod->wall_time_sec;
2759                 ns = gtod->clock.base_cycles;
2760                 ns += vgettsc(&gtod->clock, tsc_timestamp, &mode);
2761                 ns >>= gtod->clock.shift;
2762         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2763
2764         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2765         ts->tv_nsec = ns;
2766
2767         return mode;
2768 }
2769
2770 /* returns true if host is using TSC based clocksource */
2771 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2772 {
2773         /* checked again under seqlock below */
2774         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2775                 return false;
2776
2777         return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns,
2778                                                       tsc_timestamp));
2779 }
2780
2781 /* returns true if host is using TSC based clocksource */
2782 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2783                                            u64 *tsc_timestamp)
2784 {
2785         /* checked again under seqlock below */
2786         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2787                 return false;
2788
2789         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2790 }
2791 #endif
2792
2793 /*
2794  *
2795  * Assuming a stable TSC across physical CPUS, and a stable TSC
2796  * across virtual CPUs, the following condition is possible.
2797  * Each numbered line represents an event visible to both
2798  * CPUs at the next numbered event.
2799  *
2800  * "timespecX" represents host monotonic time. "tscX" represents
2801  * RDTSC value.
2802  *
2803  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2804  *
2805  * 1.  read timespec0,tsc0
2806  * 2.                                   | timespec1 = timespec0 + N
2807  *                                      | tsc1 = tsc0 + M
2808  * 3. transition to guest               | transition to guest
2809  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2810  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2811  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2812  *
2813  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2814  *
2815  *      - ret0 < ret1
2816  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2817  *              ...
2818  *      - 0 < N - M => M < N
2819  *
2820  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2821  * always the case (the difference between two distinct xtime instances
2822  * might be smaller then the difference between corresponding TSC reads,
2823  * when updating guest vcpus pvclock areas).
2824  *
2825  * To avoid that problem, do not allow visibility of distinct
2826  * system_timestamp/tsc_timestamp values simultaneously: use a master
2827  * copy of host monotonic time values. Update that master copy
2828  * in lockstep.
2829  *
2830  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2831  *
2832  */
2833
2834 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2835 {
2836 #ifdef CONFIG_X86_64
2837         struct kvm_arch *ka = &kvm->arch;
2838         int vclock_mode;
2839         bool host_tsc_clocksource, vcpus_matched;
2840
2841         lockdep_assert_held(&kvm->arch.tsc_write_lock);
2842         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2843                         atomic_read(&kvm->online_vcpus));
2844
2845         /*
2846          * If the host uses TSC clock, then passthrough TSC as stable
2847          * to the guest.
2848          */
2849         host_tsc_clocksource = kvm_get_time_and_clockread(
2850                                         &ka->master_kernel_ns,
2851                                         &ka->master_cycle_now);
2852
2853         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2854                                 && !ka->backwards_tsc_observed
2855                                 && !ka->boot_vcpu_runs_old_kvmclock;
2856
2857         if (ka->use_master_clock)
2858                 atomic_set(&kvm_guest_has_master_clock, 1);
2859
2860         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2861         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2862                                         vcpus_matched);
2863 #endif
2864 }
2865
2866 static void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2867 {
2868         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2869 }
2870
2871 static void __kvm_start_pvclock_update(struct kvm *kvm)
2872 {
2873         raw_spin_lock_irq(&kvm->arch.tsc_write_lock);
2874         write_seqcount_begin(&kvm->arch.pvclock_sc);
2875 }
2876
2877 static void kvm_start_pvclock_update(struct kvm *kvm)
2878 {
2879         kvm_make_mclock_inprogress_request(kvm);
2880
2881         /* no guest entries from this point */
2882         __kvm_start_pvclock_update(kvm);
2883 }
2884
2885 static void kvm_end_pvclock_update(struct kvm *kvm)
2886 {
2887         struct kvm_arch *ka = &kvm->arch;
2888         struct kvm_vcpu *vcpu;
2889         unsigned long i;
2890
2891         write_seqcount_end(&ka->pvclock_sc);
2892         raw_spin_unlock_irq(&ka->tsc_write_lock);
2893         kvm_for_each_vcpu(i, vcpu, kvm)
2894                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2895
2896         /* guest entries allowed */
2897         kvm_for_each_vcpu(i, vcpu, kvm)
2898                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2899 }
2900
2901 static void kvm_update_masterclock(struct kvm *kvm)
2902 {
2903         kvm_hv_invalidate_tsc_page(kvm);
2904         kvm_start_pvclock_update(kvm);
2905         pvclock_update_vm_gtod_copy(kvm);
2906         kvm_end_pvclock_update(kvm);
2907 }
2908
2909 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc.  */
2910 static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2911 {
2912         struct kvm_arch *ka = &kvm->arch;
2913         struct pvclock_vcpu_time_info hv_clock;
2914
2915         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2916         get_cpu();
2917
2918         data->flags = 0;
2919         if (ka->use_master_clock && __this_cpu_read(cpu_tsc_khz)) {
2920 #ifdef CONFIG_X86_64
2921                 struct timespec64 ts;
2922
2923                 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) {
2924                         data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec;
2925                         data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC;
2926                 } else
2927 #endif
2928                 data->host_tsc = rdtsc();
2929
2930                 data->flags |= KVM_CLOCK_TSC_STABLE;
2931                 hv_clock.tsc_timestamp = ka->master_cycle_now;
2932                 hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2933                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2934                                    &hv_clock.tsc_shift,
2935                                    &hv_clock.tsc_to_system_mul);
2936                 data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc);
2937         } else {
2938                 data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset;
2939         }
2940
2941         put_cpu();
2942 }
2943
2944 static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data)
2945 {
2946         struct kvm_arch *ka = &kvm->arch;
2947         unsigned seq;
2948
2949         do {
2950                 seq = read_seqcount_begin(&ka->pvclock_sc);
2951                 __get_kvmclock(kvm, data);
2952         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
2953 }
2954
2955 u64 get_kvmclock_ns(struct kvm *kvm)
2956 {
2957         struct kvm_clock_data data;
2958
2959         get_kvmclock(kvm, &data);
2960         return data.clock;
2961 }
2962
2963 static void kvm_setup_guest_pvclock(struct kvm_vcpu *v,
2964                                     struct gfn_to_pfn_cache *gpc,
2965                                     unsigned int offset)
2966 {
2967         struct kvm_vcpu_arch *vcpu = &v->arch;
2968         struct pvclock_vcpu_time_info *guest_hv_clock;
2969         unsigned long flags;
2970
2971         read_lock_irqsave(&gpc->lock, flags);
2972         while (!kvm_gfn_to_pfn_cache_check(v->kvm, gpc, gpc->gpa,
2973                                            offset + sizeof(*guest_hv_clock))) {
2974                 read_unlock_irqrestore(&gpc->lock, flags);
2975
2976                 if (kvm_gfn_to_pfn_cache_refresh(v->kvm, gpc, gpc->gpa,
2977                                                  offset + sizeof(*guest_hv_clock)))
2978                         return;
2979
2980                 read_lock_irqsave(&gpc->lock, flags);
2981         }
2982
2983         guest_hv_clock = (void *)(gpc->khva + offset);
2984
2985         /*
2986          * This VCPU is paused, but it's legal for a guest to read another
2987          * VCPU's kvmclock, so we really have to follow the specification where
2988          * it says that version is odd if data is being modified, and even after
2989          * it is consistent.
2990          */
2991
2992         guest_hv_clock->version = vcpu->hv_clock.version = (guest_hv_clock->version + 1) | 1;
2993         smp_wmb();
2994
2995         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2996         vcpu->hv_clock.flags |= (guest_hv_clock->flags & PVCLOCK_GUEST_STOPPED);
2997
2998         if (vcpu->pvclock_set_guest_stopped_request) {
2999                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
3000                 vcpu->pvclock_set_guest_stopped_request = false;
3001         }
3002
3003         memcpy(guest_hv_clock, &vcpu->hv_clock, sizeof(*guest_hv_clock));
3004         smp_wmb();
3005
3006         guest_hv_clock->version = ++vcpu->hv_clock.version;
3007
3008         mark_page_dirty_in_slot(v->kvm, gpc->memslot, gpc->gpa >> PAGE_SHIFT);
3009         read_unlock_irqrestore(&gpc->lock, flags);
3010
3011         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
3012 }
3013
3014 static int kvm_guest_time_update(struct kvm_vcpu *v)
3015 {
3016         unsigned long flags, tgt_tsc_khz;
3017         unsigned seq;
3018         struct kvm_vcpu_arch *vcpu = &v->arch;
3019         struct kvm_arch *ka = &v->kvm->arch;
3020         s64 kernel_ns;
3021         u64 tsc_timestamp, host_tsc;
3022         u8 pvclock_flags;
3023         bool use_master_clock;
3024
3025         kernel_ns = 0;
3026         host_tsc = 0;
3027
3028         /*
3029          * If the host uses TSC clock, then passthrough TSC as stable
3030          * to the guest.
3031          */
3032         do {
3033                 seq = read_seqcount_begin(&ka->pvclock_sc);
3034                 use_master_clock = ka->use_master_clock;
3035                 if (use_master_clock) {
3036                         host_tsc = ka->master_cycle_now;
3037                         kernel_ns = ka->master_kernel_ns;
3038                 }
3039         } while (read_seqcount_retry(&ka->pvclock_sc, seq));
3040
3041         /* Keep irq disabled to prevent changes to the clock */
3042         local_irq_save(flags);
3043         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
3044         if (unlikely(tgt_tsc_khz == 0)) {
3045                 local_irq_restore(flags);
3046                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3047                 return 1;
3048         }
3049         if (!use_master_clock) {
3050                 host_tsc = rdtsc();
3051                 kernel_ns = get_kvmclock_base_ns();
3052         }
3053
3054         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
3055
3056         /*
3057          * We may have to catch up the TSC to match elapsed wall clock
3058          * time for two reasons, even if kvmclock is used.
3059          *   1) CPU could have been running below the maximum TSC rate
3060          *   2) Broken TSC compensation resets the base at each VCPU
3061          *      entry to avoid unknown leaps of TSC even when running
3062          *      again on the same CPU.  This may cause apparent elapsed
3063          *      time to disappear, and the guest to stand still or run
3064          *      very slowly.
3065          */
3066         if (vcpu->tsc_catchup) {
3067                 u64 tsc = compute_guest_tsc(v, kernel_ns);
3068                 if (tsc > tsc_timestamp) {
3069                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
3070                         tsc_timestamp = tsc;
3071                 }
3072         }
3073
3074         local_irq_restore(flags);
3075
3076         /* With all the info we got, fill in the values */
3077
3078         if (kvm_has_tsc_control)
3079                 tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz,
3080                                             v->arch.l1_tsc_scaling_ratio);
3081
3082         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
3083                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
3084                                    &vcpu->hv_clock.tsc_shift,
3085                                    &vcpu->hv_clock.tsc_to_system_mul);
3086                 vcpu->hw_tsc_khz = tgt_tsc_khz;
3087         }
3088
3089         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
3090         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
3091         vcpu->last_guest_tsc = tsc_timestamp;
3092
3093         /* If the host uses TSC clocksource, then it is stable */
3094         pvclock_flags = 0;
3095         if (use_master_clock)
3096                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
3097
3098         vcpu->hv_clock.flags = pvclock_flags;
3099
3100         if (vcpu->pv_time.active)
3101                 kvm_setup_guest_pvclock(v, &vcpu->pv_time, 0);
3102         if (vcpu->xen.vcpu_info_cache.active)
3103                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_info_cache,
3104                                         offsetof(struct compat_vcpu_info, time));
3105         if (vcpu->xen.vcpu_time_info_cache.active)
3106                 kvm_setup_guest_pvclock(v, &vcpu->xen.vcpu_time_info_cache, 0);
3107         if (!v->vcpu_idx)
3108                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
3109         return 0;
3110 }
3111
3112 /*
3113  * kvmclock updates which are isolated to a given vcpu, such as
3114  * vcpu->cpu migration, should not allow system_timestamp from
3115  * the rest of the vcpus to remain static. Otherwise ntp frequency
3116  * correction applies to one vcpu's system_timestamp but not
3117  * the others.
3118  *
3119  * So in those cases, request a kvmclock update for all vcpus.
3120  * We need to rate-limit these requests though, as they can
3121  * considerably slow guests that have a large number of vcpus.
3122  * The time for a remote vcpu to update its kvmclock is bound
3123  * by the delay we use to rate-limit the updates.
3124  */
3125
3126 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3127
3128 static void kvmclock_update_fn(struct work_struct *work)
3129 {
3130         unsigned long i;
3131         struct delayed_work *dwork = to_delayed_work(work);
3132         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3133                                            kvmclock_update_work);
3134         struct kvm *kvm = container_of(ka, struct kvm, arch);
3135         struct kvm_vcpu *vcpu;
3136
3137         kvm_for_each_vcpu(i, vcpu, kvm) {
3138                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3139                 kvm_vcpu_kick(vcpu);
3140         }
3141 }
3142
3143 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
3144 {
3145         struct kvm *kvm = v->kvm;
3146
3147         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
3148         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
3149                                         KVMCLOCK_UPDATE_DELAY);
3150 }
3151
3152 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3153
3154 static void kvmclock_sync_fn(struct work_struct *work)
3155 {
3156         struct delayed_work *dwork = to_delayed_work(work);
3157         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
3158                                            kvmclock_sync_work);
3159         struct kvm *kvm = container_of(ka, struct kvm, arch);
3160
3161         if (!kvmclock_periodic_sync)
3162                 return;
3163
3164         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
3165         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
3166                                         KVMCLOCK_SYNC_PERIOD);
3167 }
3168
3169 /*
3170  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3171  */
3172 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
3173 {
3174         /* McStatusWrEn enabled? */
3175         if (guest_cpuid_is_amd_or_hygon(vcpu))
3176                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
3177
3178         return false;
3179 }
3180
3181 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3182 {
3183         u64 mcg_cap = vcpu->arch.mcg_cap;
3184         unsigned bank_num = mcg_cap & 0xff;
3185         u32 msr = msr_info->index;
3186         u64 data = msr_info->data;
3187
3188         switch (msr) {
3189         case MSR_IA32_MCG_STATUS:
3190                 vcpu->arch.mcg_status = data;
3191                 break;
3192         case MSR_IA32_MCG_CTL:
3193                 if (!(mcg_cap & MCG_CTL_P) &&
3194                     (data || !msr_info->host_initiated))
3195                         return 1;
3196                 if (data != 0 && data != ~(u64)0)
3197                         return 1;
3198                 vcpu->arch.mcg_ctl = data;
3199                 break;
3200         default:
3201                 if (msr >= MSR_IA32_MC0_CTL &&
3202                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3203                         u32 offset = array_index_nospec(
3204                                 msr - MSR_IA32_MC0_CTL,
3205                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3206
3207                         /* only 0 or all 1s can be written to IA32_MCi_CTL
3208                          * some Linux kernels though clear bit 10 in bank 4 to
3209                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
3210                          * this to avoid an uncatched #GP in the guest
3211                          */
3212                         if ((offset & 0x3) == 0 &&
3213                             data != 0 && (data | (1 << 10)) != ~(u64)0)
3214                                 return -1;
3215
3216                         /* MCi_STATUS */
3217                         if (!msr_info->host_initiated &&
3218                             (offset & 0x3) == 1 && data != 0) {
3219                                 if (!can_set_mci_status(vcpu))
3220                                         return -1;
3221                         }
3222
3223                         vcpu->arch.mce_banks[offset] = data;
3224                         break;
3225                 }
3226                 return 1;
3227         }
3228         return 0;
3229 }
3230
3231 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu)
3232 {
3233         u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT;
3234
3235         return (vcpu->arch.apf.msr_en_val & mask) == mask;
3236 }
3237
3238 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
3239 {
3240         gpa_t gpa = data & ~0x3f;
3241
3242         /* Bits 4:5 are reserved, Should be zero */
3243         if (data & 0x30)
3244                 return 1;
3245
3246         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_VMEXIT) &&
3247             (data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT))
3248                 return 1;
3249
3250         if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT) &&
3251             (data & KVM_ASYNC_PF_DELIVERY_AS_INT))
3252                 return 1;
3253
3254         if (!lapic_in_kernel(vcpu))
3255                 return data ? 1 : 0;
3256
3257         vcpu->arch.apf.msr_en_val = data;
3258
3259         if (!kvm_pv_async_pf_enabled(vcpu)) {
3260                 kvm_clear_async_pf_completion_queue(vcpu);
3261                 kvm_async_pf_hash_reset(vcpu);
3262                 return 0;
3263         }
3264
3265         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
3266                                         sizeof(u64)))
3267                 return 1;
3268
3269         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
3270         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
3271
3272         kvm_async_pf_wakeup_all(vcpu);
3273
3274         return 0;
3275 }
3276
3277 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu *vcpu, u64 data)
3278 {
3279         /* Bits 8-63 are reserved */
3280         if (data >> 8)
3281                 return 1;
3282
3283         if (!lapic_in_kernel(vcpu))
3284                 return 1;
3285
3286         vcpu->arch.apf.msr_int_val = data;
3287
3288         vcpu->arch.apf.vec = data & KVM_ASYNC_PF_VEC_MASK;
3289
3290         return 0;
3291 }
3292
3293 static void kvmclock_reset(struct kvm_vcpu *vcpu)
3294 {
3295         kvm_gfn_to_pfn_cache_destroy(vcpu->kvm, &vcpu->arch.pv_time);
3296         vcpu->arch.time = 0;
3297 }
3298
3299 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu *vcpu)
3300 {
3301         ++vcpu->stat.tlb_flush;
3302         static_call(kvm_x86_flush_tlb_all)(vcpu);
3303 }
3304
3305 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu *vcpu)
3306 {
3307         ++vcpu->stat.tlb_flush;
3308
3309         if (!tdp_enabled) {
3310                 /*
3311                  * A TLB flush on behalf of the guest is equivalent to
3312                  * INVPCID(all), toggling CR4.PGE, etc., which requires
3313                  * a forced sync of the shadow page tables.  Ensure all the
3314                  * roots are synced and the guest TLB in hardware is clean.
3315                  */
3316                 kvm_mmu_sync_roots(vcpu);
3317                 kvm_mmu_sync_prev_roots(vcpu);
3318         }
3319
3320         static_call(kvm_x86_flush_tlb_guest)(vcpu);
3321 }
3322
3323
3324 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu)
3325 {
3326         ++vcpu->stat.tlb_flush;
3327         static_call(kvm_x86_flush_tlb_current)(vcpu);
3328 }
3329
3330 /*
3331  * Service "local" TLB flush requests, which are specific to the current MMU
3332  * context.  In addition to the generic event handling in vcpu_enter_guest(),
3333  * TLB flushes that are targeted at an MMU context also need to be serviced
3334  * prior before nested VM-Enter/VM-Exit.
3335  */
3336 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu)
3337 {
3338         if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu))
3339                 kvm_vcpu_flush_tlb_current(vcpu);
3340
3341         if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu))
3342                 kvm_vcpu_flush_tlb_guest(vcpu);
3343 }
3344 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests);
3345
3346 static void record_steal_time(struct kvm_vcpu *vcpu)
3347 {
3348         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
3349         struct kvm_steal_time __user *st;
3350         struct kvm_memslots *slots;
3351         u64 steal;
3352         u32 version;
3353
3354         if (kvm_xen_msr_enabled(vcpu->kvm)) {
3355                 kvm_xen_runstate_set_running(vcpu);
3356                 return;
3357         }
3358
3359         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3360                 return;
3361
3362         if (WARN_ON_ONCE(current->mm != vcpu->kvm->mm))
3363                 return;
3364
3365         slots = kvm_memslots(vcpu->kvm);
3366
3367         if (unlikely(slots->generation != ghc->generation ||
3368                      kvm_is_error_hva(ghc->hva) || !ghc->memslot)) {
3369                 gfn_t gfn = vcpu->arch.st.msr_val & KVM_STEAL_VALID_BITS;
3370
3371                 /* We rely on the fact that it fits in a single page. */
3372                 BUILD_BUG_ON((sizeof(*st) - 1) & KVM_STEAL_VALID_BITS);
3373
3374                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, gfn, sizeof(*st)) ||
3375                     kvm_is_error_hva(ghc->hva) || !ghc->memslot)
3376                         return;
3377         }
3378
3379         st = (struct kvm_steal_time __user *)ghc->hva;
3380         /*
3381          * Doing a TLB flush here, on the guest's behalf, can avoid
3382          * expensive IPIs.
3383          */
3384         if (guest_pv_has(vcpu, KVM_FEATURE_PV_TLB_FLUSH)) {
3385                 u8 st_preempted = 0;
3386                 int err = -EFAULT;
3387
3388                 if (!user_access_begin(st, sizeof(*st)))
3389                         return;
3390
3391                 asm volatile("1: xchgb %0, %2\n"
3392                              "xor %1, %1\n"
3393                              "2:\n"
3394                              _ASM_EXTABLE_UA(1b, 2b)
3395                              : "+q" (st_preempted),
3396                                "+&r" (err),
3397                                "+m" (st->preempted));
3398                 if (err)
3399                         goto out;
3400
3401                 user_access_end();
3402
3403                 vcpu->arch.st.preempted = 0;
3404
3405                 trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
3406                                        st_preempted & KVM_VCPU_FLUSH_TLB);
3407                 if (st_preempted & KVM_VCPU_FLUSH_TLB)
3408                         kvm_vcpu_flush_tlb_guest(vcpu);
3409
3410                 if (!user_access_begin(st, sizeof(*st)))
3411                         goto dirty;
3412         } else {
3413                 if (!user_access_begin(st, sizeof(*st)))
3414                         return;
3415
3416                 unsafe_put_user(0, &st->preempted, out);
3417                 vcpu->arch.st.preempted = 0;
3418         }
3419
3420         unsafe_get_user(version, &st->version, out);
3421         if (version & 1)
3422                 version += 1;  /* first time write, random junk */
3423
3424         version += 1;
3425         unsafe_put_user(version, &st->version, out);
3426
3427         smp_wmb();
3428
3429         unsafe_get_user(steal, &st->steal, out);
3430         steal += current->sched_info.run_delay -
3431                 vcpu->arch.st.last_steal;
3432         vcpu->arch.st.last_steal = current->sched_info.run_delay;
3433         unsafe_put_user(steal, &st->steal, out);
3434
3435         version += 1;
3436         unsafe_put_user(version, &st->version, out);
3437
3438  out:
3439         user_access_end();
3440  dirty:
3441         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
3442 }
3443
3444 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3445 {
3446         bool pr = false;
3447         u32 msr = msr_info->index;
3448         u64 data = msr_info->data;
3449
3450         if (msr && msr == vcpu->kvm->arch.xen_hvm_config.msr)
3451                 return kvm_xen_write_hypercall_page(vcpu, data);
3452
3453         switch (msr) {
3454         case MSR_AMD64_NB_CFG:
3455         case MSR_IA32_UCODE_WRITE:
3456         case MSR_VM_HSAVE_PA:
3457         case MSR_AMD64_PATCH_LOADER:
3458         case MSR_AMD64_BU_CFG2:
3459         case MSR_AMD64_DC_CFG:
3460         case MSR_F15H_EX_CFG:
3461                 break;
3462
3463         case MSR_IA32_UCODE_REV:
3464                 if (msr_info->host_initiated)
3465                         vcpu->arch.microcode_version = data;
3466                 break;
3467         case MSR_IA32_ARCH_CAPABILITIES:
3468                 if (!msr_info->host_initiated)
3469                         return 1;
3470                 vcpu->arch.arch_capabilities = data;
3471                 break;
3472         case MSR_IA32_PERF_CAPABILITIES: {
3473                 struct kvm_msr_entry msr_ent = {.index = msr, .data = 0};
3474
3475                 if (!msr_info->host_initiated)
3476                         return 1;
3477                 if (kvm_get_msr_feature(&msr_ent))
3478                         return 1;
3479                 if (data & ~msr_ent.data)
3480                         return 1;
3481
3482                 vcpu->arch.perf_capabilities = data;
3483
3484                 return 0;
3485                 }
3486         case MSR_EFER:
3487                 return set_efer(vcpu, msr_info);
3488         case MSR_K7_HWCR:
3489                 data &= ~(u64)0x40;     /* ignore flush filter disable */
3490                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
3491                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
3492
3493                 /* Handle McStatusWrEn */
3494                 if (data == BIT_ULL(18)) {
3495                         vcpu->arch.msr_hwcr = data;
3496                 } else if (data != 0) {
3497                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
3498                                     data);
3499                         return 1;
3500                 }
3501                 break;
3502         case MSR_FAM10H_MMIO_CONF_BASE:
3503                 if (data != 0) {
3504                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
3505                                     "0x%llx\n", data);
3506                         return 1;
3507                 }
3508                 break;
3509         case 0x200 ... 0x2ff:
3510                 return kvm_mtrr_set_msr(vcpu, msr, data);
3511         case MSR_IA32_APICBASE:
3512                 return kvm_set_apic_base(vcpu, msr_info);
3513         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3514                 return kvm_x2apic_msr_write(vcpu, msr, data);
3515         case MSR_IA32_TSC_DEADLINE:
3516                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
3517                 break;
3518         case MSR_IA32_TSC_ADJUST:
3519                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
3520                         if (!msr_info->host_initiated) {
3521                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
3522                                 adjust_tsc_offset_guest(vcpu, adj);
3523                                 /* Before back to guest, tsc_timestamp must be adjusted
3524                                  * as well, otherwise guest's percpu pvclock time could jump.
3525                                  */
3526                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3527                         }
3528                         vcpu->arch.ia32_tsc_adjust_msr = data;
3529                 }
3530                 break;
3531         case MSR_IA32_MISC_ENABLE:
3532                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
3533                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
3534                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
3535                                 return 1;
3536                         vcpu->arch.ia32_misc_enable_msr = data;
3537                         kvm_update_cpuid_runtime(vcpu);
3538                 } else {
3539                         vcpu->arch.ia32_misc_enable_msr = data;
3540                 }
3541                 break;
3542         case MSR_IA32_SMBASE:
3543                 if (!msr_info->host_initiated)
3544                         return 1;
3545                 vcpu->arch.smbase = data;
3546                 break;
3547         case MSR_IA32_POWER_CTL:
3548                 vcpu->arch.msr_ia32_power_ctl = data;
3549                 break;
3550         case MSR_IA32_TSC:
3551                 if (msr_info->host_initiated) {
3552                         kvm_synchronize_tsc(vcpu, data);
3553                 } else {
3554                         u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset;
3555                         adjust_tsc_offset_guest(vcpu, adj);
3556                         vcpu->arch.ia32_tsc_adjust_msr += adj;
3557                 }
3558                 break;
3559         case MSR_IA32_XSS:
3560                 if (!msr_info->host_initiated &&
3561                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
3562                         return 1;
3563                 /*
3564                  * KVM supports exposing PT to the guest, but does not support
3565                  * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3566                  * XSAVES/XRSTORS to save/restore PT MSRs.
3567                  */
3568                 if (data & ~supported_xss)
3569                         return 1;
3570                 vcpu->arch.ia32_xss = data;
3571                 kvm_update_cpuid_runtime(vcpu);
3572                 break;
3573         case MSR_SMI_COUNT:
3574                 if (!msr_info->host_initiated)
3575                         return 1;
3576                 vcpu->arch.smi_count = data;
3577                 break;
3578         case MSR_KVM_WALL_CLOCK_NEW:
3579                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3580                         return 1;
3581
3582                 vcpu->kvm->arch.wall_clock = data;
3583                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3584                 break;
3585         case MSR_KVM_WALL_CLOCK:
3586                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3587                         return 1;
3588
3589                 vcpu->kvm->arch.wall_clock = data;
3590                 kvm_write_wall_clock(vcpu->kvm, data, 0);
3591                 break;
3592         case MSR_KVM_SYSTEM_TIME_NEW:
3593                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3594                         return 1;
3595
3596                 kvm_write_system_time(vcpu, data, false, msr_info->host_initiated);
3597                 break;
3598         case MSR_KVM_SYSTEM_TIME:
3599                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3600                         return 1;
3601
3602                 kvm_write_system_time(vcpu, data, true,  msr_info->host_initiated);
3603                 break;
3604         case MSR_KVM_ASYNC_PF_EN:
3605                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3606                         return 1;
3607
3608                 if (kvm_pv_enable_async_pf(vcpu, data))
3609                         return 1;
3610                 break;
3611         case MSR_KVM_ASYNC_PF_INT:
3612                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3613                         return 1;
3614
3615                 if (kvm_pv_enable_async_pf_int(vcpu, data))
3616                         return 1;
3617                 break;
3618         case MSR_KVM_ASYNC_PF_ACK:
3619                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3620                         return 1;
3621                 if (data & 0x1) {
3622                         vcpu->arch.apf.pageready_pending = false;
3623                         kvm_check_async_pf_completion(vcpu);
3624                 }
3625                 break;
3626         case MSR_KVM_STEAL_TIME:
3627                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3628                         return 1;
3629
3630                 if (unlikely(!sched_info_on()))
3631                         return 1;
3632
3633                 if (data & KVM_STEAL_RESERVED_MASK)
3634                         return 1;
3635
3636                 vcpu->arch.st.msr_val = data;
3637
3638                 if (!(data & KVM_MSR_ENABLED))
3639                         break;
3640
3641                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3642
3643                 break;
3644         case MSR_KVM_PV_EOI_EN:
3645                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3646                         return 1;
3647
3648                 if (kvm_lapic_set_pv_eoi(vcpu, data, sizeof(u8)))
3649                         return 1;
3650                 break;
3651
3652         case MSR_KVM_POLL_CONTROL:
3653                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3654                         return 1;
3655
3656                 /* only enable bit supported */
3657                 if (data & (-1ULL << 1))
3658                         return 1;
3659
3660                 vcpu->arch.msr_kvm_poll_control = data;
3661                 break;
3662
3663         case MSR_IA32_MCG_CTL:
3664         case MSR_IA32_MCG_STATUS:
3665         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3666                 return set_msr_mce(vcpu, msr_info);
3667
3668         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3669         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3670                 pr = true;
3671                 fallthrough;
3672         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3673         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3674                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3675                         return kvm_pmu_set_msr(vcpu, msr_info);
3676
3677                 if (pr || data != 0)
3678                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
3679                                     "0x%x data 0x%llx\n", msr, data);
3680                 break;
3681         case MSR_K7_CLK_CTL:
3682                 /*
3683                  * Ignore all writes to this no longer documented MSR.
3684                  * Writes are only relevant for old K7 processors,
3685                  * all pre-dating SVM, but a recommended workaround from
3686                  * AMD for these chips. It is possible to specify the
3687                  * affected processor models on the command line, hence
3688                  * the need to ignore the workaround.
3689                  */
3690                 break;
3691         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3692         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
3693         case HV_X64_MSR_SYNDBG_OPTIONS:
3694         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3695         case HV_X64_MSR_CRASH_CTL:
3696         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3697         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3698         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3699         case HV_X64_MSR_TSC_EMULATION_STATUS:
3700                 return kvm_hv_set_msr_common(vcpu, msr, data,
3701                                              msr_info->host_initiated);
3702         case MSR_IA32_BBL_CR_CTL3:
3703                 /* Drop writes to this legacy MSR -- see rdmsr
3704                  * counterpart for further detail.
3705                  */
3706                 if (report_ignored_msrs)
3707                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
3708                                 msr, data);
3709                 break;
3710         case MSR_AMD64_OSVW_ID_LENGTH:
3711                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3712                         return 1;
3713                 vcpu->arch.osvw.length = data;
3714                 break;
3715         case MSR_AMD64_OSVW_STATUS:
3716                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3717                         return 1;
3718                 vcpu->arch.osvw.status = data;
3719                 break;
3720         case MSR_PLATFORM_INFO:
3721                 if (!msr_info->host_initiated ||
3722                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
3723                      cpuid_fault_enabled(vcpu)))
3724                         return 1;
3725                 vcpu->arch.msr_platform_info = data;
3726                 break;
3727         case MSR_MISC_FEATURES_ENABLES:
3728                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
3729                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
3730                      !supports_cpuid_fault(vcpu)))
3731                         return 1;
3732                 vcpu->arch.msr_misc_features_enables = data;
3733                 break;
3734 #ifdef CONFIG_X86_64
3735         case MSR_IA32_XFD:
3736                 if (!msr_info->host_initiated &&
3737                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3738                         return 1;
3739
3740                 if (data & ~kvm_guest_supported_xfd(vcpu))
3741                         return 1;
3742
3743                 fpu_update_guest_xfd(&vcpu->arch.guest_fpu, data);
3744                 break;
3745         case MSR_IA32_XFD_ERR:
3746                 if (!msr_info->host_initiated &&
3747                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
3748                         return 1;
3749
3750                 if (data & ~kvm_guest_supported_xfd(vcpu))
3751                         return 1;
3752
3753                 vcpu->arch.guest_fpu.xfd_err = data;
3754                 break;
3755 #endif
3756         default:
3757                 if (kvm_pmu_is_valid_msr(vcpu, msr))
3758                         return kvm_pmu_set_msr(vcpu, msr_info);
3759                 return KVM_MSR_RET_INVALID;
3760         }
3761         return 0;
3762 }
3763 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
3764
3765 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
3766 {
3767         u64 data;
3768         u64 mcg_cap = vcpu->arch.mcg_cap;
3769         unsigned bank_num = mcg_cap & 0xff;
3770
3771         switch (msr) {
3772         case MSR_IA32_P5_MC_ADDR:
3773         case MSR_IA32_P5_MC_TYPE:
3774                 data = 0;
3775                 break;
3776         case MSR_IA32_MCG_CAP:
3777                 data = vcpu->arch.mcg_cap;
3778                 break;
3779         case MSR_IA32_MCG_CTL:
3780                 if (!(mcg_cap & MCG_CTL_P) && !host)
3781                         return 1;
3782                 data = vcpu->arch.mcg_ctl;
3783                 break;
3784         case MSR_IA32_MCG_STATUS:
3785                 data = vcpu->arch.mcg_status;
3786                 break;
3787         default:
3788                 if (msr >= MSR_IA32_MC0_CTL &&
3789                     msr < MSR_IA32_MCx_CTL(bank_num)) {
3790                         u32 offset = array_index_nospec(
3791                                 msr - MSR_IA32_MC0_CTL,
3792                                 MSR_IA32_MCx_CTL(bank_num) - MSR_IA32_MC0_CTL);
3793
3794                         data = vcpu->arch.mce_banks[offset];
3795                         break;
3796                 }
3797                 return 1;
3798         }
3799         *pdata = data;
3800         return 0;
3801 }
3802
3803 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
3804 {
3805         switch (msr_info->index) {
3806         case MSR_IA32_PLATFORM_ID:
3807         case MSR_IA32_EBL_CR_POWERON:
3808         case MSR_IA32_LASTBRANCHFROMIP:
3809         case MSR_IA32_LASTBRANCHTOIP:
3810         case MSR_IA32_LASTINTFROMIP:
3811         case MSR_IA32_LASTINTTOIP:
3812         case MSR_AMD64_SYSCFG:
3813         case MSR_K8_TSEG_ADDR:
3814         case MSR_K8_TSEG_MASK:
3815         case MSR_VM_HSAVE_PA:
3816         case MSR_K8_INT_PENDING_MSG:
3817         case MSR_AMD64_NB_CFG:
3818         case MSR_FAM10H_MMIO_CONF_BASE:
3819         case MSR_AMD64_BU_CFG2:
3820         case MSR_IA32_PERF_CTL:
3821         case MSR_AMD64_DC_CFG:
3822         case MSR_F15H_EX_CFG:
3823         /*
3824          * Intel Sandy Bridge CPUs must support the RAPL (running average power
3825          * limit) MSRs. Just return 0, as we do not want to expose the host
3826          * data here. Do not conditionalize this on CPUID, as KVM does not do
3827          * so for existing CPU-specific MSRs.
3828          */
3829         case MSR_RAPL_POWER_UNIT:
3830         case MSR_PP0_ENERGY_STATUS:     /* Power plane 0 (core) */
3831         case MSR_PP1_ENERGY_STATUS:     /* Power plane 1 (graphics uncore) */
3832         case MSR_PKG_ENERGY_STATUS:     /* Total package */
3833         case MSR_DRAM_ENERGY_STATUS:    /* DRAM controller */
3834                 msr_info->data = 0;
3835                 break;
3836         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
3837                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3838                         return kvm_pmu_get_msr(vcpu, msr_info);
3839                 if (!msr_info->host_initiated)
3840                         return 1;
3841                 msr_info->data = 0;
3842                 break;
3843         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
3844         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
3845         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
3846         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
3847                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3848                         return kvm_pmu_get_msr(vcpu, msr_info);
3849                 msr_info->data = 0;
3850                 break;
3851         case MSR_IA32_UCODE_REV:
3852                 msr_info->data = vcpu->arch.microcode_version;
3853                 break;
3854         case MSR_IA32_ARCH_CAPABILITIES:
3855                 if (!msr_info->host_initiated &&
3856                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
3857                         return 1;
3858                 msr_info->data = vcpu->arch.arch_capabilities;
3859                 break;
3860         case MSR_IA32_PERF_CAPABILITIES:
3861                 if (!msr_info->host_initiated &&
3862                     !guest_cpuid_has(vcpu, X86_FEATURE_PDCM))
3863                         return 1;
3864                 msr_info->data = vcpu->arch.perf_capabilities;
3865                 break;
3866         case MSR_IA32_POWER_CTL:
3867                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
3868                 break;
3869         case MSR_IA32_TSC: {
3870                 /*
3871                  * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
3872                  * even when not intercepted. AMD manual doesn't explicitly
3873                  * state this but appears to behave the same.
3874                  *
3875                  * On userspace reads and writes, however, we unconditionally
3876                  * return L1's TSC value to ensure backwards-compatible
3877                  * behavior for migration.
3878                  */
3879                 u64 offset, ratio;
3880
3881                 if (msr_info->host_initiated) {
3882                         offset = vcpu->arch.l1_tsc_offset;
3883                         ratio = vcpu->arch.l1_tsc_scaling_ratio;
3884                 } else {
3885                         offset = vcpu->arch.tsc_offset;
3886                         ratio = vcpu->arch.tsc_scaling_ratio;
3887                 }
3888
3889                 msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
3890                 break;
3891         }
3892         case MSR_MTRRcap:
3893         case 0x200 ... 0x2ff:
3894                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
3895         case 0xcd: /* fsb frequency */
3896                 msr_info->data = 3;
3897                 break;
3898                 /*
3899                  * MSR_EBC_FREQUENCY_ID
3900                  * Conservative value valid for even the basic CPU models.
3901                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
3902                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
3903                  * and 266MHz for model 3, or 4. Set Core Clock
3904                  * Frequency to System Bus Frequency Ratio to 1 (bits
3905                  * 31:24) even though these are only valid for CPU
3906                  * models > 2, however guests may end up dividing or
3907                  * multiplying by zero otherwise.
3908                  */
3909         case MSR_EBC_FREQUENCY_ID:
3910                 msr_info->data = 1 << 24;
3911                 break;
3912         case MSR_IA32_APICBASE:
3913                 msr_info->data = kvm_get_apic_base(vcpu);
3914                 break;
3915         case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff:
3916                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
3917         case MSR_IA32_TSC_DEADLINE:
3918                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
3919                 break;
3920         case MSR_IA32_TSC_ADJUST:
3921                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
3922                 break;
3923         case MSR_IA32_MISC_ENABLE:
3924                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3925                 break;
3926         case MSR_IA32_SMBASE:
3927                 if (!msr_info->host_initiated)
3928                         return 1;
3929                 msr_info->data = vcpu->arch.smbase;
3930                 break;
3931         case MSR_SMI_COUNT:
3932                 msr_info->data = vcpu->arch.smi_count;
3933                 break;
3934         case MSR_IA32_PERF_STATUS:
3935                 /* TSC increment by tick */
3936                 msr_info->data = 1000ULL;
3937                 /* CPU multiplier */
3938                 msr_info->data |= (((uint64_t)4ULL) << 40);
3939                 break;
3940         case MSR_EFER:
3941                 msr_info->data = vcpu->arch.efer;
3942                 break;
3943         case MSR_KVM_WALL_CLOCK:
3944                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3945                         return 1;
3946
3947                 msr_info->data = vcpu->kvm->arch.wall_clock;
3948                 break;
3949         case MSR_KVM_WALL_CLOCK_NEW:
3950                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3951                         return 1;
3952
3953                 msr_info->data = vcpu->kvm->arch.wall_clock;
3954                 break;
3955         case MSR_KVM_SYSTEM_TIME:
3956                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE))
3957                         return 1;
3958
3959                 msr_info->data = vcpu->arch.time;
3960                 break;
3961         case MSR_KVM_SYSTEM_TIME_NEW:
3962                 if (!guest_pv_has(vcpu, KVM_FEATURE_CLOCKSOURCE2))
3963                         return 1;
3964
3965                 msr_info->data = vcpu->arch.time;
3966                 break;
3967         case MSR_KVM_ASYNC_PF_EN:
3968                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF))
3969                         return 1;
3970
3971                 msr_info->data = vcpu->arch.apf.msr_en_val;
3972                 break;
3973         case MSR_KVM_ASYNC_PF_INT:
3974                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3975                         return 1;
3976
3977                 msr_info->data = vcpu->arch.apf.msr_int_val;
3978                 break;
3979         case MSR_KVM_ASYNC_PF_ACK:
3980                 if (!guest_pv_has(vcpu, KVM_FEATURE_ASYNC_PF_INT))
3981                         return 1;
3982
3983                 msr_info->data = 0;
3984                 break;
3985         case MSR_KVM_STEAL_TIME:
3986                 if (!guest_pv_has(vcpu, KVM_FEATURE_STEAL_TIME))
3987                         return 1;
3988
3989                 msr_info->data = vcpu->arch.st.msr_val;
3990                 break;
3991         case MSR_KVM_PV_EOI_EN:
3992                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_EOI))
3993                         return 1;
3994
3995                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3996                 break;
3997         case MSR_KVM_POLL_CONTROL:
3998                 if (!guest_pv_has(vcpu, KVM_FEATURE_POLL_CONTROL))
3999                         return 1;
4000
4001                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
4002                 break;
4003         case MSR_IA32_P5_MC_ADDR:
4004         case MSR_IA32_P5_MC_TYPE:
4005         case MSR_IA32_MCG_CAP:
4006         case MSR_IA32_MCG_CTL:
4007         case MSR_IA32_MCG_STATUS:
4008         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
4009                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
4010                                    msr_info->host_initiated);
4011         case MSR_IA32_XSS:
4012                 if (!msr_info->host_initiated &&
4013                     !guest_cpuid_has(vcpu, X86_FEATURE_XSAVES))
4014                         return 1;
4015                 msr_info->data = vcpu->arch.ia32_xss;
4016                 break;
4017         case MSR_K7_CLK_CTL:
4018                 /*
4019                  * Provide expected ramp-up count for K7. All other
4020                  * are set to zero, indicating minimum divisors for
4021                  * every field.
4022                  *
4023                  * This prevents guest kernels on AMD host with CPU
4024                  * type 6, model 8 and higher from exploding due to
4025                  * the rdmsr failing.
4026                  */
4027                 msr_info->data = 0x20000000;
4028                 break;
4029         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
4030         case HV_X64_MSR_SYNDBG_CONTROL ... HV_X64_MSR_SYNDBG_PENDING_BUFFER:
4031         case HV_X64_MSR_SYNDBG_OPTIONS:
4032         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
4033         case HV_X64_MSR_CRASH_CTL:
4034         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
4035         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
4036         case HV_X64_MSR_TSC_EMULATION_CONTROL:
4037         case HV_X64_MSR_TSC_EMULATION_STATUS:
4038                 return kvm_hv_get_msr_common(vcpu,
4039                                              msr_info->index, &msr_info->data,
4040                                              msr_info->host_initiated);
4041         case MSR_IA32_BBL_CR_CTL3:
4042                 /* This legacy MSR exists but isn't fully documented in current
4043                  * silicon.  It is however accessed by winxp in very narrow
4044                  * scenarios where it sets bit #19, itself documented as
4045                  * a "reserved" bit.  Best effort attempt to source coherent
4046                  * read data here should the balance of the register be
4047                  * interpreted by the guest:
4048                  *
4049                  * L2 cache control register 3: 64GB range, 256KB size,
4050                  * enabled, latency 0x1, configured
4051                  */
4052                 msr_info->data = 0xbe702111;
4053                 break;
4054         case MSR_AMD64_OSVW_ID_LENGTH:
4055                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4056                         return 1;
4057                 msr_info->data = vcpu->arch.osvw.length;
4058                 break;
4059         case MSR_AMD64_OSVW_STATUS:
4060                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
4061                         return 1;
4062                 msr_info->data = vcpu->arch.osvw.status;
4063                 break;
4064         case MSR_PLATFORM_INFO:
4065                 if (!msr_info->host_initiated &&
4066                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
4067                         return 1;
4068                 msr_info->data = vcpu->arch.msr_platform_info;
4069                 break;
4070         case MSR_MISC_FEATURES_ENABLES:
4071                 msr_info->data = vcpu->arch.msr_misc_features_enables;
4072                 break;
4073         case MSR_K7_HWCR:
4074                 msr_info->data = vcpu->arch.msr_hwcr;
4075                 break;
4076 #ifdef CONFIG_X86_64
4077         case MSR_IA32_XFD:
4078                 if (!msr_info->host_initiated &&
4079                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4080                         return 1;
4081
4082                 msr_info->data = vcpu->arch.guest_fpu.fpstate->xfd;
4083                 break;
4084         case MSR_IA32_XFD_ERR:
4085                 if (!msr_info->host_initiated &&
4086                     !guest_cpuid_has(vcpu, X86_FEATURE_XFD))
4087                         return 1;
4088
4089                 msr_info->data = vcpu->arch.guest_fpu.xfd_err;
4090                 break;
4091 #endif
4092         default:
4093                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
4094                         return kvm_pmu_get_msr(vcpu, msr_info);
4095                 return KVM_MSR_RET_INVALID;
4096         }
4097         return 0;
4098 }
4099 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
4100
4101 /*
4102  * Read or write a bunch of msrs. All parameters are kernel addresses.
4103  *
4104  * @return number of msrs set successfully.
4105  */
4106 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
4107                     struct kvm_msr_entry *entries,
4108                     int (*do_msr)(struct kvm_vcpu *vcpu,
4109                                   unsigned index, u64 *data))
4110 {
4111         int i;
4112
4113         for (i = 0; i < msrs->nmsrs; ++i)
4114                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
4115                         break;
4116
4117         return i;
4118 }
4119
4120 /*
4121  * Read or write a bunch of msrs. Parameters are user addresses.
4122  *
4123  * @return number of msrs set successfully.
4124  */
4125 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
4126                   int (*do_msr)(struct kvm_vcpu *vcpu,
4127                                 unsigned index, u64 *data),
4128                   int writeback)
4129 {
4130         struct kvm_msrs msrs;
4131         struct kvm_msr_entry *entries;
4132         int r, n;
4133         unsigned size;
4134
4135         r = -EFAULT;
4136         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
4137                 goto out;
4138
4139         r = -E2BIG;
4140         if (msrs.nmsrs >= MAX_IO_MSRS)
4141                 goto out;
4142
4143         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
4144         entries = memdup_user(user_msrs->entries, size);
4145         if (IS_ERR(entries)) {
4146                 r = PTR_ERR(entries);
4147                 goto out;
4148         }
4149
4150         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
4151         if (r < 0)
4152                 goto out_free;
4153
4154         r = -EFAULT;
4155         if (writeback && copy_to_user(user_msrs->entries, entries, size))
4156                 goto out_free;
4157
4158         r = n;
4159
4160 out_free:
4161         kfree(entries);
4162 out:
4163         return r;
4164 }
4165
4166 static inline bool kvm_can_mwait_in_guest(void)
4167 {
4168         return boot_cpu_has(X86_FEATURE_MWAIT) &&
4169                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
4170                 boot_cpu_has(X86_FEATURE_ARAT);
4171 }
4172
4173 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu *vcpu,
4174                                             struct kvm_cpuid2 __user *cpuid_arg)
4175 {
4176         struct kvm_cpuid2 cpuid;
4177         int r;
4178
4179         r = -EFAULT;
4180         if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4181                 return r;
4182
4183         r = kvm_get_hv_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4184         if (r)
4185                 return r;
4186
4187         r = -EFAULT;
4188         if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4189                 return r;
4190
4191         return 0;
4192 }
4193
4194 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
4195 {
4196         int r = 0;
4197
4198         switch (ext) {
4199         case KVM_CAP_IRQCHIP:
4200         case KVM_CAP_HLT:
4201         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
4202         case KVM_CAP_SET_TSS_ADDR:
4203         case KVM_CAP_EXT_CPUID:
4204         case KVM_CAP_EXT_EMUL_CPUID:
4205         case KVM_CAP_CLOCKSOURCE:
4206         case KVM_CAP_PIT:
4207         case KVM_CAP_NOP_IO_DELAY:
4208         case KVM_CAP_MP_STATE:
4209         case KVM_CAP_SYNC_MMU:
4210         case KVM_CAP_USER_NMI:
4211         case KVM_CAP_REINJECT_CONTROL:
4212         case KVM_CAP_IRQ_INJECT_STATUS:
4213         case KVM_CAP_IOEVENTFD:
4214         case KVM_CAP_IOEVENTFD_NO_LENGTH:
4215         case KVM_CAP_PIT2:
4216         case KVM_CAP_PIT_STATE2:
4217         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
4218         case KVM_CAP_VCPU_EVENTS:
4219         case KVM_CAP_HYPERV:
4220         case KVM_CAP_HYPERV_VAPIC:
4221         case KVM_CAP_HYPERV_SPIN:
4222         case KVM_CAP_HYPERV_SYNIC:
4223         case KVM_CAP_HYPERV_SYNIC2:
4224         case KVM_CAP_HYPERV_VP_INDEX:
4225         case KVM_CAP_HYPERV_EVENTFD:
4226         case KVM_CAP_HYPERV_TLBFLUSH:
4227         case KVM_CAP_HYPERV_SEND_IPI:
4228         case KVM_CAP_HYPERV_CPUID:
4229         case KVM_CAP_HYPERV_ENFORCE_CPUID:
4230         case KVM_CAP_SYS_HYPERV_CPUID:
4231         case KVM_CAP_PCI_SEGMENT:
4232         case KVM_CAP_DEBUGREGS:
4233         case KVM_CAP_X86_ROBUST_SINGLESTEP:
4234         case KVM_CAP_XSAVE:
4235         case KVM_CAP_ASYNC_PF:
4236         case KVM_CAP_ASYNC_PF_INT:
4237         case KVM_CAP_GET_TSC_KHZ:
4238         case KVM_CAP_KVMCLOCK_CTRL:
4239         case KVM_CAP_READONLY_MEM:
4240         case KVM_CAP_HYPERV_TIME:
4241         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
4242         case KVM_CAP_TSC_DEADLINE_TIMER:
4243         case KVM_CAP_DISABLE_QUIRKS:
4244         case KVM_CAP_SET_BOOT_CPU_ID:
4245         case KVM_CAP_SPLIT_IRQCHIP:
4246         case KVM_CAP_IMMEDIATE_EXIT:
4247         case KVM_CAP_PMU_EVENT_FILTER:
4248         case KVM_CAP_GET_MSR_FEATURES:
4249         case KVM_CAP_MSR_PLATFORM_INFO:
4250         case KVM_CAP_EXCEPTION_PAYLOAD:
4251         case KVM_CAP_SET_GUEST_DEBUG:
4252         case KVM_CAP_LAST_CPU:
4253         case KVM_CAP_X86_USER_SPACE_MSR:
4254         case KVM_CAP_X86_MSR_FILTER:
4255         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
4256 #ifdef CONFIG_X86_SGX_KVM
4257         case KVM_CAP_SGX_ATTRIBUTE:
4258 #endif
4259         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
4260         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
4261         case KVM_CAP_SREGS2:
4262         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
4263         case KVM_CAP_VCPU_ATTRIBUTES:
4264         case KVM_CAP_SYS_ATTRIBUTES:
4265         case KVM_CAP_VAPIC:
4266         case KVM_CAP_ENABLE_CAP:
4267                 r = 1;
4268                 break;
4269         case KVM_CAP_EXIT_HYPERCALL:
4270                 r = KVM_EXIT_HYPERCALL_VALID_MASK;
4271                 break;
4272         case KVM_CAP_SET_GUEST_DEBUG2:
4273                 return KVM_GUESTDBG_VALID_MASK;
4274 #ifdef CONFIG_KVM_XEN
4275         case KVM_CAP_XEN_HVM:
4276                 r = KVM_XEN_HVM_CONFIG_HYPERCALL_MSR |
4277                     KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL |
4278                     KVM_XEN_HVM_CONFIG_SHARED_INFO |
4279                     KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL |
4280                     KVM_XEN_HVM_CONFIG_EVTCHN_SEND;
4281                 if (sched_info_on())
4282                         r |= KVM_XEN_HVM_CONFIG_RUNSTATE;
4283                 break;
4284 #endif
4285         case KVM_CAP_SYNC_REGS:
4286                 r = KVM_SYNC_X86_VALID_FIELDS;
4287                 break;
4288         case KVM_CAP_ADJUST_CLOCK:
4289                 r = KVM_CLOCK_VALID_FLAGS;
4290                 break;
4291         case KVM_CAP_X86_DISABLE_EXITS:
4292                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
4293                       KVM_X86_DISABLE_EXITS_CSTATE;
4294                 if(kvm_can_mwait_in_guest())
4295                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
4296                 break;
4297         case KVM_CAP_X86_SMM:
4298                 /* SMBASE is usually relocated above 1M on modern chipsets,
4299                  * and SMM handlers might indeed rely on 4G segment limits,
4300                  * so do not report SMM to be available if real mode is
4301                  * emulated via vm86 mode.  Still, do not go to great lengths
4302                  * to avoid userspace's usage of the feature, because it is a
4303                  * fringe case that is not enabled except via specific settings
4304                  * of the module parameters.
4305                  */
4306                 r = static_call(kvm_x86_has_emulated_msr)(kvm, MSR_IA32_SMBASE);
4307                 break;
4308         case KVM_CAP_NR_VCPUS:
4309                 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS);
4310                 break;
4311         case KVM_CAP_MAX_VCPUS:
4312                 r = KVM_MAX_VCPUS;
4313                 break;
4314         case KVM_CAP_MAX_VCPU_ID:
4315                 r = KVM_MAX_VCPU_IDS;
4316                 break;
4317         case KVM_CAP_PV_MMU:    /* obsolete */
4318                 r = 0;
4319                 break;
4320         case KVM_CAP_MCE:
4321                 r = KVM_MAX_MCE_BANKS;
4322                 break;
4323         case KVM_CAP_XCRS:
4324                 r = boot_cpu_has(X86_FEATURE_XSAVE);
4325                 break;
4326         case KVM_CAP_TSC_CONTROL:
4327         case KVM_CAP_VM_TSC_CONTROL:
4328                 r = kvm_has_tsc_control;
4329                 break;
4330         case KVM_CAP_X2APIC_API:
4331                 r = KVM_X2APIC_API_VALID_FLAGS;
4332                 break;
4333         case KVM_CAP_NESTED_STATE:
4334                 r = kvm_x86_ops.nested_ops->get_state ?
4335                         kvm_x86_ops.nested_ops->get_state(NULL, NULL, 0) : 0;
4336                 break;
4337         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4338                 r = kvm_x86_ops.enable_direct_tlbflush != NULL;
4339                 break;
4340         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4341                 r = kvm_x86_ops.nested_ops->enable_evmcs != NULL;
4342                 break;
4343         case KVM_CAP_SMALLER_MAXPHYADDR:
4344                 r = (int) allow_smaller_maxphyaddr;
4345                 break;
4346         case KVM_CAP_STEAL_TIME:
4347                 r = sched_info_on();
4348                 break;
4349         case KVM_CAP_X86_BUS_LOCK_EXIT:
4350                 if (kvm_has_bus_lock_exit)
4351                         r = KVM_BUS_LOCK_DETECTION_OFF |
4352                             KVM_BUS_LOCK_DETECTION_EXIT;
4353                 else
4354                         r = 0;
4355                 break;
4356         case KVM_CAP_XSAVE2: {
4357                 u64 guest_perm = xstate_get_guest_group_perm();
4358
4359                 r = xstate_required_size(supported_xcr0 & guest_perm, false);
4360                 if (r < sizeof(struct kvm_xsave))
4361                         r = sizeof(struct kvm_xsave);
4362                 break;
4363         case KVM_CAP_PMU_CAPABILITY:
4364                 r = enable_pmu ? KVM_CAP_PMU_VALID_MASK : 0;
4365                 break;
4366         }
4367         case KVM_CAP_DISABLE_QUIRKS2:
4368                 r = KVM_X86_VALID_QUIRKS;
4369                 break;
4370         default:
4371                 break;
4372         }
4373         return r;
4374 }
4375
4376 static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
4377 {
4378         void __user *uaddr = (void __user*)(unsigned long)attr->addr;
4379
4380         if ((u64)(unsigned long)uaddr != attr->addr)
4381                 return ERR_PTR_USR(-EFAULT);
4382         return uaddr;
4383 }
4384
4385 static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
4386 {
4387         u64 __user *uaddr = kvm_get_attr_addr(attr);
4388
4389         if (attr->group)
4390                 return -ENXIO;
4391
4392         if (IS_ERR(uaddr))
4393                 return PTR_ERR(uaddr);
4394
4395         switch (attr->attr) {
4396         case KVM_X86_XCOMP_GUEST_SUPP:
4397                 if (put_user(supported_xcr0, uaddr))
4398                         return -EFAULT;
4399                 return 0;
4400         default:
4401                 return -ENXIO;
4402                 break;
4403         }
4404 }
4405
4406 static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
4407 {
4408         if (attr->group)
4409                 return -ENXIO;
4410
4411         switch (attr->attr) {
4412         case KVM_X86_XCOMP_GUEST_SUPP:
4413                 return 0;
4414         default:
4415                 return -ENXIO;
4416         }
4417 }
4418
4419 long kvm_arch_dev_ioctl(struct file *filp,
4420                         unsigned int ioctl, unsigned long arg)
4421 {
4422         void __user *argp = (void __user *)arg;
4423         long r;
4424
4425         switch (ioctl) {
4426         case KVM_GET_MSR_INDEX_LIST: {
4427                 struct kvm_msr_list __user *user_msr_list = argp;
4428                 struct kvm_msr_list msr_list;
4429                 unsigned n;
4430
4431                 r = -EFAULT;
4432                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4433                         goto out;
4434                 n = msr_list.nmsrs;
4435                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
4436                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4437                         goto out;
4438                 r = -E2BIG;
4439                 if (n < msr_list.nmsrs)
4440                         goto out;
4441                 r = -EFAULT;
4442                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
4443                                  num_msrs_to_save * sizeof(u32)))
4444                         goto out;
4445                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
4446                                  &emulated_msrs,
4447                                  num_emulated_msrs * sizeof(u32)))
4448                         goto out;
4449                 r = 0;
4450                 break;
4451         }
4452         case KVM_GET_SUPPORTED_CPUID:
4453         case KVM_GET_EMULATED_CPUID: {
4454                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4455                 struct kvm_cpuid2 cpuid;
4456
4457                 r = -EFAULT;
4458                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4459                         goto out;
4460
4461                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
4462                                             ioctl);
4463                 if (r)
4464                         goto out;
4465
4466                 r = -EFAULT;
4467                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4468                         goto out;
4469                 r = 0;
4470                 break;
4471         }
4472         case KVM_X86_GET_MCE_CAP_SUPPORTED:
4473                 r = -EFAULT;
4474                 if (copy_to_user(argp, &kvm_mce_cap_supported,
4475                                  sizeof(kvm_mce_cap_supported)))
4476                         goto out;
4477                 r = 0;
4478                 break;
4479         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
4480                 struct kvm_msr_list __user *user_msr_list = argp;
4481                 struct kvm_msr_list msr_list;
4482                 unsigned int n;
4483
4484                 r = -EFAULT;
4485                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
4486                         goto out;
4487                 n = msr_list.nmsrs;
4488                 msr_list.nmsrs = num_msr_based_features;
4489                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
4490                         goto out;
4491                 r = -E2BIG;
4492                 if (n < msr_list.nmsrs)
4493                         goto out;
4494                 r = -EFAULT;
4495                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
4496                                  num_msr_based_features * sizeof(u32)))
4497                         goto out;
4498                 r = 0;
4499                 break;
4500         }
4501         case KVM_GET_MSRS:
4502                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
4503                 break;
4504         case KVM_GET_SUPPORTED_HV_CPUID:
4505                 r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
4506                 break;
4507         case KVM_GET_DEVICE_ATTR: {
4508                 struct kvm_device_attr attr;
4509                 r = -EFAULT;
4510                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4511                         break;
4512                 r = kvm_x86_dev_get_attr(&attr);
4513                 break;
4514         }
4515         case KVM_HAS_DEVICE_ATTR: {
4516                 struct kvm_device_attr attr;
4517                 r = -EFAULT;
4518                 if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
4519                         break;
4520                 r = kvm_x86_dev_has_attr(&attr);
4521                 break;
4522         }
4523         default:
4524                 r = -EINVAL;
4525                 break;
4526         }
4527 out:
4528         return r;
4529 }
4530
4531 static void wbinvd_ipi(void *garbage)
4532 {
4533         wbinvd();
4534 }
4535
4536 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
4537 {
4538         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
4539 }
4540
4541 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
4542 {
4543         /* Address WBINVD may be executed by guest */
4544         if (need_emulate_wbinvd(vcpu)) {
4545                 if (static_call(kvm_x86_has_wbinvd_exit)())
4546                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4547                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
4548                         smp_call_function_single(vcpu->cpu,
4549                                         wbinvd_ipi, NULL, 1);
4550         }
4551
4552         static_call(kvm_x86_vcpu_load)(vcpu, cpu);
4553
4554         /* Save host pkru register if supported */
4555         vcpu->arch.host_pkru = read_pkru();
4556
4557         /* Apply any externally detected TSC adjustments (due to suspend) */
4558         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
4559                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
4560                 vcpu->arch.tsc_offset_adjustment = 0;
4561                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4562         }
4563
4564         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
4565                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
4566                                 rdtsc() - vcpu->arch.last_host_tsc;
4567                 if (tsc_delta < 0)
4568                         mark_tsc_unstable("KVM discovered backwards TSC");
4569
4570                 if (kvm_check_tsc_unstable()) {
4571                         u64 offset = kvm_compute_l1_tsc_offset(vcpu,
4572                                                 vcpu->arch.last_guest_tsc);
4573                         kvm_vcpu_write_tsc_offset(vcpu, offset);
4574                         vcpu->arch.tsc_catchup = 1;
4575                 }
4576
4577                 if (kvm_lapic_hv_timer_in_use(vcpu))
4578                         kvm_lapic_restart_hv_timer(vcpu);
4579
4580                 /*
4581                  * On a host with synchronized TSC, there is no need to update
4582                  * kvmclock on vcpu->cpu migration
4583                  */
4584                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
4585                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
4586                 if (vcpu->cpu != cpu)
4587                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
4588                 vcpu->cpu = cpu;
4589         }
4590
4591         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
4592 }
4593
4594 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
4595 {
4596         struct gfn_to_hva_cache *ghc = &vcpu->arch.st.cache;
4597         struct kvm_steal_time __user *st;
4598         struct kvm_memslots *slots;
4599         static const u8 preempted = KVM_VCPU_PREEMPTED;
4600
4601         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
4602                 return;
4603
4604         if (vcpu->arch.st.preempted)
4605                 return;
4606
4607         /* This happens on process exit */
4608         if (unlikely(current->mm != vcpu->kvm->mm))
4609                 return;
4610
4611         slots = kvm_memslots(vcpu->kvm);
4612
4613         if (unlikely(slots->generation != ghc->generation ||
4614                      kvm_is_error_hva(ghc->hva) || !ghc->memslot))
4615                 return;
4616
4617         st = (struct kvm_steal_time __user *)ghc->hva;
4618         BUILD_BUG_ON(sizeof(st->preempted) != sizeof(preempted));
4619
4620         if (!copy_to_user_nofault(&st->preempted, &preempted, sizeof(preempted)))
4621                 vcpu->arch.st.preempted = KVM_VCPU_PREEMPTED;
4622
4623         mark_page_dirty_in_slot(vcpu->kvm, ghc->memslot, gpa_to_gfn(ghc->gpa));
4624 }
4625
4626 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
4627 {
4628         int idx;
4629
4630         if (vcpu->preempted && !vcpu->arch.guest_state_protected)
4631                 vcpu->arch.preempted_in_kernel = !static_call(kvm_x86_get_cpl)(vcpu);
4632
4633         /*
4634          * Take the srcu lock as memslots will be accessed to check the gfn
4635          * cache generation against the memslots generation.
4636          */
4637         idx = srcu_read_lock(&vcpu->kvm->srcu);
4638         if (kvm_xen_msr_enabled(vcpu->kvm))
4639                 kvm_xen_runstate_set_preempted(vcpu);
4640         else
4641                 kvm_steal_time_set_preempted(vcpu);
4642         srcu_read_unlock(&vcpu->kvm->srcu, idx);
4643
4644         static_call(kvm_x86_vcpu_put)(vcpu);
4645         vcpu->arch.last_host_tsc = rdtsc();
4646 }
4647
4648 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
4649                                     struct kvm_lapic_state *s)
4650 {
4651         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
4652
4653         return kvm_apic_get_state(vcpu, s);
4654 }
4655
4656 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
4657                                     struct kvm_lapic_state *s)
4658 {
4659         int r;
4660
4661         r = kvm_apic_set_state(vcpu, s);
4662         if (r)
4663                 return r;
4664         update_cr8_intercept(vcpu);
4665
4666         return 0;
4667 }
4668
4669 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
4670 {
4671         /*
4672          * We can accept userspace's request for interrupt injection
4673          * as long as we have a place to store the interrupt number.
4674          * The actual injection will happen when the CPU is able to
4675          * deliver the interrupt.
4676          */
4677         if (kvm_cpu_has_extint(vcpu))
4678                 return false;
4679
4680         /* Acknowledging ExtINT does not happen if LINT0 is masked.  */
4681         return (!lapic_in_kernel(vcpu) ||
4682                 kvm_apic_accept_pic_intr(vcpu));
4683 }
4684
4685 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
4686 {
4687         /*
4688          * Do not cause an interrupt window exit if an exception
4689          * is pending or an event needs reinjection; userspace
4690          * might want to inject the interrupt manually using KVM_SET_REGS
4691          * or KVM_SET_SREGS.  For that to work, we must be at an
4692          * instruction boundary and with no events half-injected.
4693          */
4694         return (kvm_arch_interrupt_allowed(vcpu) &&
4695                 kvm_cpu_accept_dm_intr(vcpu) &&
4696                 !kvm_event_needs_reinjection(vcpu) &&
4697                 !vcpu->arch.exception.pending);
4698 }
4699
4700 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
4701                                     struct kvm_interrupt *irq)
4702 {
4703         if (irq->irq >= KVM_NR_INTERRUPTS)
4704                 return -EINVAL;
4705
4706         if (!irqchip_in_kernel(vcpu->kvm)) {
4707                 kvm_queue_interrupt(vcpu, irq->irq, false);
4708                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4709                 return 0;
4710         }
4711
4712         /*
4713          * With in-kernel LAPIC, we only use this to inject EXTINT, so
4714          * fail for in-kernel 8259.
4715          */
4716         if (pic_in_kernel(vcpu->kvm))
4717                 return -ENXIO;
4718
4719         if (vcpu->arch.pending_external_vector != -1)
4720                 return -EEXIST;
4721
4722         vcpu->arch.pending_external_vector = irq->irq;
4723         kvm_make_request(KVM_REQ_EVENT, vcpu);
4724         return 0;
4725 }
4726
4727 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
4728 {
4729         kvm_inject_nmi(vcpu);
4730
4731         return 0;
4732 }
4733
4734 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
4735 {
4736         kvm_make_request(KVM_REQ_SMI, vcpu);
4737
4738         return 0;
4739 }
4740
4741 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
4742                                            struct kvm_tpr_access_ctl *tac)
4743 {
4744         if (tac->flags)
4745                 return -EINVAL;
4746         vcpu->arch.tpr_access_reporting = !!tac->enabled;
4747         return 0;
4748 }
4749
4750 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
4751                                         u64 mcg_cap)
4752 {
4753         int r;
4754         unsigned bank_num = mcg_cap & 0xff, bank;
4755
4756         r = -EINVAL;
4757         if (!bank_num || bank_num > KVM_MAX_MCE_BANKS)
4758                 goto out;
4759         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
4760                 goto out;
4761         r = 0;
4762         vcpu->arch.mcg_cap = mcg_cap;
4763         /* Init IA32_MCG_CTL to all 1s */
4764         if (mcg_cap & MCG_CTL_P)
4765                 vcpu->arch.mcg_ctl = ~(u64)0;
4766         /* Init IA32_MCi_CTL to all 1s */
4767         for (bank = 0; bank < bank_num; bank++)
4768                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
4769
4770         static_call(kvm_x86_setup_mce)(vcpu);
4771 out:
4772         return r;
4773 }
4774
4775 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
4776                                       struct kvm_x86_mce *mce)
4777 {
4778         u64 mcg_cap = vcpu->arch.mcg_cap;
4779         unsigned bank_num = mcg_cap & 0xff;
4780         u64 *banks = vcpu->arch.mce_banks;
4781
4782         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
4783                 return -EINVAL;
4784         /*
4785          * if IA32_MCG_CTL is not all 1s, the uncorrected error
4786          * reporting is disabled
4787          */
4788         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
4789             vcpu->arch.mcg_ctl != ~(u64)0)
4790                 return 0;
4791         banks += 4 * mce->bank;
4792         /*
4793          * if IA32_MCi_CTL is not all 1s, the uncorrected error
4794          * reporting is disabled for the bank
4795          */
4796         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
4797                 return 0;
4798         if (mce->status & MCI_STATUS_UC) {
4799                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
4800                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
4801                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4802                         return 0;
4803                 }
4804                 if (banks[1] & MCI_STATUS_VAL)
4805                         mce->status |= MCI_STATUS_OVER;
4806                 banks[2] = mce->addr;
4807                 banks[3] = mce->misc;
4808                 vcpu->arch.mcg_status = mce->mcg_status;
4809                 banks[1] = mce->status;
4810                 kvm_queue_exception(vcpu, MC_VECTOR);
4811         } else if (!(banks[1] & MCI_STATUS_VAL)
4812                    || !(banks[1] & MCI_STATUS_UC)) {
4813                 if (banks[1] & MCI_STATUS_VAL)
4814                         mce->status |= MCI_STATUS_OVER;
4815                 banks[2] = mce->addr;
4816                 banks[3] = mce->misc;
4817                 banks[1] = mce->status;
4818         } else
4819                 banks[1] |= MCI_STATUS_OVER;
4820         return 0;
4821 }
4822
4823 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
4824                                                struct kvm_vcpu_events *events)
4825 {
4826         process_nmi(vcpu);
4827
4828         if (kvm_check_request(KVM_REQ_SMI, vcpu))
4829                 process_smi(vcpu);
4830
4831         /*
4832          * In guest mode, payload delivery should be deferred,
4833          * so that the L1 hypervisor can intercept #PF before
4834          * CR2 is modified (or intercept #DB before DR6 is
4835          * modified under nVMX). Unless the per-VM capability,
4836          * KVM_CAP_EXCEPTION_PAYLOAD, is set, we may not defer the delivery of
4837          * an exception payload and handle after a KVM_GET_VCPU_EVENTS. Since we
4838          * opportunistically defer the exception payload, deliver it if the
4839          * capability hasn't been requested before processing a
4840          * KVM_GET_VCPU_EVENTS.
4841          */
4842         if (!vcpu->kvm->arch.exception_payload_enabled &&
4843             vcpu->arch.exception.pending && vcpu->arch.exception.has_payload)
4844                 kvm_deliver_exception_payload(vcpu);
4845
4846         /*
4847          * The API doesn't provide the instruction length for software
4848          * exceptions, so don't report them. As long as the guest RIP
4849          * isn't advanced, we should expect to encounter the exception
4850          * again.
4851          */
4852         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
4853                 events->exception.injected = 0;
4854                 events->exception.pending = 0;
4855         } else {
4856                 events->exception.injected = vcpu->arch.exception.injected;
4857                 events->exception.pending = vcpu->arch.exception.pending;
4858                 /*
4859                  * For ABI compatibility, deliberately conflate
4860                  * pending and injected exceptions when
4861                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
4862                  */
4863                 if (!vcpu->kvm->arch.exception_payload_enabled)
4864                         events->exception.injected |=
4865                                 vcpu->arch.exception.pending;
4866         }
4867         events->exception.nr = vcpu->arch.exception.nr;
4868         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
4869         events->exception.error_code = vcpu->arch.exception.error_code;
4870         events->exception_has_payload = vcpu->arch.exception.has_payload;
4871         events->exception_payload = vcpu->arch.exception.payload;
4872
4873         events->interrupt.injected =
4874                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
4875         events->interrupt.nr = vcpu->arch.interrupt.nr;
4876         events->interrupt.soft = 0;
4877         events->interrupt.shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
4878
4879         events->nmi.injected = vcpu->arch.nmi_injected;
4880         events->nmi.pending = vcpu->arch.nmi_pending != 0;
4881         events->nmi.masked = static_call(kvm_x86_get_nmi_mask)(vcpu);
4882         events->nmi.pad = 0;
4883
4884         events->sipi_vector = 0; /* never valid when reporting to user space */
4885
4886         events->smi.smm = is_smm(vcpu);
4887         events->smi.pending = vcpu->arch.smi_pending;
4888         events->smi.smm_inside_nmi =
4889                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
4890         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
4891
4892         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
4893                          | KVM_VCPUEVENT_VALID_SHADOW
4894                          | KVM_VCPUEVENT_VALID_SMM);
4895         if (vcpu->kvm->arch.exception_payload_enabled)
4896                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
4897
4898         memset(&events->reserved, 0, sizeof(events->reserved));
4899 }
4900
4901 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm);
4902
4903 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
4904                                               struct kvm_vcpu_events *events)
4905 {
4906         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
4907                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
4908                               | KVM_VCPUEVENT_VALID_SHADOW
4909                               | KVM_VCPUEVENT_VALID_SMM
4910                               | KVM_VCPUEVENT_VALID_PAYLOAD))
4911                 return -EINVAL;
4912
4913         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
4914                 if (!vcpu->kvm->arch.exception_payload_enabled)
4915                         return -EINVAL;
4916                 if (events->exception.pending)
4917                         events->exception.injected = 0;
4918                 else
4919                         events->exception_has_payload = 0;
4920         } else {
4921                 events->exception.pending = 0;
4922                 events->exception_has_payload = 0;
4923         }
4924
4925         if ((events->exception.injected || events->exception.pending) &&
4926             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
4927                 return -EINVAL;
4928
4929         /* INITs are latched while in SMM */
4930         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
4931             (events->smi.smm || events->smi.pending) &&
4932             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
4933                 return -EINVAL;
4934
4935         process_nmi(vcpu);
4936         vcpu->arch.exception.injected = events->exception.injected;
4937         vcpu->arch.exception.pending = events->exception.pending;
4938         vcpu->arch.exception.nr = events->exception.nr;
4939         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
4940         vcpu->arch.exception.error_code = events->exception.error_code;
4941         vcpu->arch.exception.has_payload = events->exception_has_payload;
4942         vcpu->arch.exception.payload = events->exception_payload;
4943
4944         vcpu->arch.interrupt.injected = events->interrupt.injected;
4945         vcpu->arch.interrupt.nr = events->interrupt.nr;
4946         vcpu->arch.interrupt.soft = events->interrupt.soft;
4947         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
4948                 static_call(kvm_x86_set_interrupt_shadow)(vcpu,
4949                                                 events->interrupt.shadow);
4950
4951         vcpu->arch.nmi_injected = events->nmi.injected;
4952         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
4953                 vcpu->arch.nmi_pending = events->nmi.pending;
4954         static_call(kvm_x86_set_nmi_mask)(vcpu, events->nmi.masked);
4955
4956         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
4957             lapic_in_kernel(vcpu))
4958                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
4959
4960         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
4961                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
4962                         kvm_x86_ops.nested_ops->leave_nested(vcpu);
4963                         kvm_smm_changed(vcpu, events->smi.smm);
4964                 }
4965
4966                 vcpu->arch.smi_pending = events->smi.pending;
4967
4968                 if (events->smi.smm) {
4969                         if (events->smi.smm_inside_nmi)
4970                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
4971                         else
4972                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
4973                 }
4974
4975                 if (lapic_in_kernel(vcpu)) {
4976                         if (events->smi.latched_init)
4977                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4978                         else
4979                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
4980                 }
4981         }
4982
4983         kvm_make_request(KVM_REQ_EVENT, vcpu);
4984
4985         return 0;
4986 }
4987
4988 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
4989                                              struct kvm_debugregs *dbgregs)
4990 {
4991         unsigned long val;
4992
4993         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
4994         kvm_get_dr(vcpu, 6, &val);
4995         dbgregs->dr6 = val;
4996         dbgregs->dr7 = vcpu->arch.dr7;
4997         dbgregs->flags = 0;
4998         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
4999 }
5000
5001 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
5002                                             struct kvm_debugregs *dbgregs)
5003 {
5004         if (dbgregs->flags)
5005                 return -EINVAL;
5006
5007         if (!kvm_dr6_valid(dbgregs->dr6))
5008                 return -EINVAL;
5009         if (!kvm_dr7_valid(dbgregs->dr7))
5010                 return -EINVAL;
5011
5012         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
5013         kvm_update_dr0123(vcpu);
5014         vcpu->arch.dr6 = dbgregs->dr6;
5015         vcpu->arch.dr7 = dbgregs->dr7;
5016         kvm_update_dr7(vcpu);
5017
5018         return 0;
5019 }
5020
5021 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
5022                                          struct kvm_xsave *guest_xsave)
5023 {
5024         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5025                 return;
5026
5027         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5028                                        guest_xsave->region,
5029                                        sizeof(guest_xsave->region),
5030                                        vcpu->arch.pkru);
5031 }
5032
5033 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu,
5034                                           u8 *state, unsigned int size)
5035 {
5036         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5037                 return;
5038
5039         fpu_copy_guest_fpstate_to_uabi(&vcpu->arch.guest_fpu,
5040                                        state, size, vcpu->arch.pkru);
5041 }
5042
5043 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
5044                                         struct kvm_xsave *guest_xsave)
5045 {
5046         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
5047                 return 0;
5048
5049         return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
5050                                               guest_xsave->region,
5051                                               supported_xcr0, &vcpu->arch.pkru);
5052 }
5053
5054 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
5055                                         struct kvm_xcrs *guest_xcrs)
5056 {
5057         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
5058                 guest_xcrs->nr_xcrs = 0;
5059                 return;
5060         }
5061
5062         guest_xcrs->nr_xcrs = 1;
5063         guest_xcrs->flags = 0;
5064         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
5065         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
5066 }
5067
5068 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
5069                                        struct kvm_xcrs *guest_xcrs)
5070 {
5071         int i, r = 0;
5072
5073         if (!boot_cpu_has(X86_FEATURE_XSAVE))
5074                 return -EINVAL;
5075
5076         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
5077                 return -EINVAL;
5078
5079         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
5080                 /* Only support XCR0 currently */
5081                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
5082                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
5083                                 guest_xcrs->xcrs[i].value);
5084                         break;
5085                 }
5086         if (r)
5087                 r = -EINVAL;
5088         return r;
5089 }
5090
5091 /*
5092  * kvm_set_guest_paused() indicates to the guest kernel that it has been
5093  * stopped by the hypervisor.  This function will be called from the host only.
5094  * EINVAL is returned when the host attempts to set the flag for a guest that
5095  * does not support pv clocks.
5096  */
5097 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
5098 {
5099         if (!vcpu->arch.pv_time.active)
5100                 return -EINVAL;
5101         vcpu->arch.pvclock_set_guest_stopped_request = true;
5102         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5103         return 0;
5104 }
5105
5106 static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu,
5107                                  struct kvm_device_attr *attr)
5108 {
5109         int r;
5110
5111         switch (attr->attr) {
5112         case KVM_VCPU_TSC_OFFSET:
5113                 r = 0;
5114                 break;
5115         default:
5116                 r = -ENXIO;
5117         }
5118
5119         return r;
5120 }
5121
5122 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
5123                                  struct kvm_device_attr *attr)
5124 {
5125         u64 __user *uaddr = kvm_get_attr_addr(attr);
5126         int r;
5127
5128         if (IS_ERR(uaddr))
5129                 return PTR_ERR(uaddr);
5130
5131         switch (attr->attr) {
5132         case KVM_VCPU_TSC_OFFSET:
5133                 r = -EFAULT;
5134                 if (put_user(vcpu->arch.l1_tsc_offset, uaddr))
5135                         break;
5136                 r = 0;
5137                 break;
5138         default:
5139                 r = -ENXIO;
5140         }
5141
5142         return r;
5143 }
5144
5145 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
5146                                  struct kvm_device_attr *attr)
5147 {
5148         u64 __user *uaddr = kvm_get_attr_addr(attr);
5149         struct kvm *kvm = vcpu->kvm;
5150         int r;
5151
5152         if (IS_ERR(uaddr))
5153                 return PTR_ERR(uaddr);
5154
5155         switch (attr->attr) {
5156         case KVM_VCPU_TSC_OFFSET: {
5157                 u64 offset, tsc, ns;
5158                 unsigned long flags;
5159                 bool matched;
5160
5161                 r = -EFAULT;
5162                 if (get_user(offset, uaddr))
5163                         break;
5164
5165                 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
5166
5167                 matched = (vcpu->arch.virtual_tsc_khz &&
5168                            kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz &&
5169                            kvm->arch.last_tsc_offset == offset);
5170
5171                 tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset;
5172                 ns = get_kvmclock_base_ns();
5173
5174                 __kvm_synchronize_tsc(vcpu, offset, tsc, ns, matched);
5175                 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
5176
5177                 r = 0;
5178                 break;
5179         }
5180         default:
5181                 r = -ENXIO;
5182         }
5183
5184         return r;
5185 }
5186
5187 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu *vcpu,
5188                                       unsigned int ioctl,
5189                                       void __user *argp)
5190 {
5191         struct kvm_device_attr attr;
5192         int r;
5193
5194         if (copy_from_user(&attr, argp, sizeof(attr)))
5195                 return -EFAULT;
5196
5197         if (attr.group != KVM_VCPU_TSC_CTRL)
5198                 return -ENXIO;
5199
5200         switch (ioctl) {
5201         case KVM_HAS_DEVICE_ATTR:
5202                 r = kvm_arch_tsc_has_attr(vcpu, &attr);
5203                 break;
5204         case KVM_GET_DEVICE_ATTR:
5205                 r = kvm_arch_tsc_get_attr(vcpu, &attr);
5206                 break;
5207         case KVM_SET_DEVICE_ATTR:
5208                 r = kvm_arch_tsc_set_attr(vcpu, &attr);
5209                 break;
5210         }
5211
5212         return r;
5213 }
5214
5215 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
5216                                      struct kvm_enable_cap *cap)
5217 {
5218         int r;
5219         uint16_t vmcs_version;
5220         void __user *user_ptr;
5221
5222         if (cap->flags)
5223                 return -EINVAL;
5224
5225         switch (cap->cap) {
5226         case KVM_CAP_HYPERV_SYNIC2:
5227                 if (cap->args[0])
5228                         return -EINVAL;
5229                 fallthrough;
5230
5231         case KVM_CAP_HYPERV_SYNIC:
5232                 if (!irqchip_in_kernel(vcpu->kvm))
5233                         return -EINVAL;
5234                 return kvm_hv_activate_synic(vcpu, cap->cap ==
5235                                              KVM_CAP_HYPERV_SYNIC2);
5236         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
5237                 if (!kvm_x86_ops.nested_ops->enable_evmcs)
5238                         return -ENOTTY;
5239                 r = kvm_x86_ops.nested_ops->enable_evmcs(vcpu, &vmcs_version);
5240                 if (!r) {
5241                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
5242                         if (copy_to_user(user_ptr, &vmcs_version,
5243                                          sizeof(vmcs_version)))
5244                                 r = -EFAULT;
5245                 }
5246                 return r;
5247         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
5248                 if (!kvm_x86_ops.enable_direct_tlbflush)
5249                         return -ENOTTY;
5250
5251                 return static_call(kvm_x86_enable_direct_tlbflush)(vcpu);
5252
5253         case KVM_CAP_HYPERV_ENFORCE_CPUID:
5254                 return kvm_hv_set_enforce_cpuid(vcpu, cap->args[0]);
5255
5256         case KVM_CAP_ENFORCE_PV_FEATURE_CPUID:
5257                 vcpu->arch.pv_cpuid.enforce = cap->args[0];
5258                 if (vcpu->arch.pv_cpuid.enforce)
5259                         kvm_update_pv_runtime(vcpu);
5260
5261                 return 0;
5262         default:
5263                 return -EINVAL;
5264         }
5265 }
5266
5267 long kvm_arch_vcpu_ioctl(struct file *filp,
5268                          unsigned int ioctl, unsigned long arg)
5269 {
5270         struct kvm_vcpu *vcpu = filp->private_data;
5271         void __user *argp = (void __user *)arg;
5272         int r;
5273         union {
5274                 struct kvm_sregs2 *sregs2;
5275                 struct kvm_lapic_state *lapic;
5276                 struct kvm_xsave *xsave;
5277                 struct kvm_xcrs *xcrs;
5278                 void *buffer;
5279         } u;
5280
5281         vcpu_load(vcpu);
5282
5283         u.buffer = NULL;
5284         switch (ioctl) {
5285         case KVM_GET_LAPIC: {
5286                 r = -EINVAL;
5287                 if (!lapic_in_kernel(vcpu))
5288                         goto out;
5289                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
5290                                 GFP_KERNEL_ACCOUNT);
5291
5292                 r = -ENOMEM;
5293                 if (!u.lapic)
5294                         goto out;
5295                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
5296                 if (r)
5297                         goto out;
5298                 r = -EFAULT;
5299                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
5300                         goto out;
5301                 r = 0;
5302                 break;
5303         }
5304         case KVM_SET_LAPIC: {
5305                 r = -EINVAL;
5306                 if (!lapic_in_kernel(vcpu))
5307                         goto out;
5308                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
5309                 if (IS_ERR(u.lapic)) {
5310                         r = PTR_ERR(u.lapic);
5311                         goto out_nofree;
5312                 }
5313
5314                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
5315                 break;
5316         }
5317         case KVM_INTERRUPT: {
5318                 struct kvm_interrupt irq;
5319
5320                 r = -EFAULT;
5321                 if (copy_from_user(&irq, argp, sizeof(irq)))
5322                         goto out;
5323                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
5324                 break;
5325         }
5326         case KVM_NMI: {
5327                 r = kvm_vcpu_ioctl_nmi(vcpu);
5328                 break;
5329         }
5330         case KVM_SMI: {
5331                 r = kvm_vcpu_ioctl_smi(vcpu);
5332                 break;
5333         }
5334         case KVM_SET_CPUID: {
5335                 struct kvm_cpuid __user *cpuid_arg = argp;
5336                 struct kvm_cpuid cpuid;
5337
5338                 r = -EFAULT;
5339                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5340                         goto out;
5341                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
5342                 break;
5343         }
5344         case KVM_SET_CPUID2: {
5345                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5346                 struct kvm_cpuid2 cpuid;
5347
5348                 r = -EFAULT;
5349                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5350                         goto out;
5351                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
5352                                               cpuid_arg->entries);
5353                 break;
5354         }
5355         case KVM_GET_CPUID2: {
5356                 struct kvm_cpuid2 __user *cpuid_arg = argp;
5357                 struct kvm_cpuid2 cpuid;
5358
5359                 r = -EFAULT;
5360                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
5361                         goto out;
5362                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
5363                                               cpuid_arg->entries);
5364                 if (r)
5365                         goto out;
5366                 r = -EFAULT;
5367                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
5368                         goto out;
5369                 r = 0;
5370                 break;
5371         }
5372         case KVM_GET_MSRS: {
5373                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5374                 r = msr_io(vcpu, argp, do_get_msr, 1);
5375                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5376                 break;
5377         }
5378         case KVM_SET_MSRS: {
5379                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
5380                 r = msr_io(vcpu, argp, do_set_msr, 0);
5381                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5382                 break;
5383         }
5384         case KVM_TPR_ACCESS_REPORTING: {
5385                 struct kvm_tpr_access_ctl tac;
5386
5387                 r = -EFAULT;
5388                 if (copy_from_user(&tac, argp, sizeof(tac)))
5389                         goto out;
5390                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
5391                 if (r)
5392                         goto out;
5393                 r = -EFAULT;
5394                 if (copy_to_user(argp, &tac, sizeof(tac)))
5395                         goto out;
5396                 r = 0;
5397                 break;
5398         };
5399         case KVM_SET_VAPIC_ADDR: {
5400                 struct kvm_vapic_addr va;
5401                 int idx;
5402
5403                 r = -EINVAL;
5404                 if (!lapic_in_kernel(vcpu))
5405                         goto out;
5406                 r = -EFAULT;
5407                 if (copy_from_user(&va, argp, sizeof(va)))
5408                         goto out;
5409                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5410                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
5411                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5412                 break;
5413         }
5414         case KVM_X86_SETUP_MCE: {
5415                 u64 mcg_cap;
5416
5417                 r = -EFAULT;
5418                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
5419                         goto out;
5420                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
5421                 break;
5422         }
5423         case KVM_X86_SET_MCE: {
5424                 struct kvm_x86_mce mce;
5425
5426                 r = -EFAULT;
5427                 if (copy_from_user(&mce, argp, sizeof(mce)))
5428                         goto out;
5429                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
5430                 break;
5431         }
5432         case KVM_GET_VCPU_EVENTS: {
5433                 struct kvm_vcpu_events events;
5434
5435                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
5436
5437                 r = -EFAULT;
5438                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
5439                         break;
5440                 r = 0;
5441                 break;
5442         }
5443         case KVM_SET_VCPU_EVENTS: {
5444                 struct kvm_vcpu_events events;
5445
5446                 r = -EFAULT;
5447                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
5448                         break;
5449
5450                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
5451                 break;
5452         }
5453         case KVM_GET_DEBUGREGS: {
5454                 struct kvm_debugregs dbgregs;
5455
5456                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
5457
5458                 r = -EFAULT;
5459                 if (copy_to_user(argp, &dbgregs,
5460                                  sizeof(struct kvm_debugregs)))
5461                         break;
5462                 r = 0;
5463                 break;
5464         }
5465         case KVM_SET_DEBUGREGS: {
5466                 struct kvm_debugregs dbgregs;
5467
5468                 r = -EFAULT;
5469                 if (copy_from_user(&dbgregs, argp,
5470                                    sizeof(struct kvm_debugregs)))
5471                         break;
5472
5473                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
5474                 break;
5475         }
5476         case KVM_GET_XSAVE: {
5477                 r = -EINVAL;
5478                 if (vcpu->arch.guest_fpu.uabi_size > sizeof(struct kvm_xsave))
5479                         break;
5480
5481                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
5482                 r = -ENOMEM;
5483                 if (!u.xsave)
5484                         break;
5485
5486                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
5487
5488                 r = -EFAULT;
5489                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
5490                         break;
5491                 r = 0;
5492                 break;
5493         }
5494         case KVM_SET_XSAVE: {
5495                 int size = vcpu->arch.guest_fpu.uabi_size;
5496
5497                 u.xsave = memdup_user(argp, size);
5498                 if (IS_ERR(u.xsave)) {
5499                         r = PTR_ERR(u.xsave);
5500                         goto out_nofree;
5501                 }
5502
5503                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
5504                 break;
5505         }
5506
5507         case KVM_GET_XSAVE2: {
5508                 int size = vcpu->arch.guest_fpu.uabi_size;
5509
5510                 u.xsave = kzalloc(size, GFP_KERNEL_ACCOUNT);
5511                 r = -ENOMEM;
5512                 if (!u.xsave)
5513                         break;
5514
5515                 kvm_vcpu_ioctl_x86_get_xsave2(vcpu, u.buffer, size);
5516
5517                 r = -EFAULT;
5518                 if (copy_to_user(argp, u.xsave, size))
5519                         break;
5520
5521                 r = 0;
5522                 break;
5523         }
5524
5525         case KVM_GET_XCRS: {
5526                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
5527                 r = -ENOMEM;
5528                 if (!u.xcrs)
5529                         break;
5530
5531                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
5532
5533                 r = -EFAULT;
5534                 if (copy_to_user(argp, u.xcrs,
5535                                  sizeof(struct kvm_xcrs)))
5536                         break;
5537                 r = 0;
5538                 break;
5539         }
5540         case KVM_SET_XCRS: {
5541                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
5542                 if (IS_ERR(u.xcrs)) {
5543                         r = PTR_ERR(u.xcrs);
5544                         goto out_nofree;
5545                 }
5546
5547                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
5548                 break;
5549         }
5550         case KVM_SET_TSC_KHZ: {
5551                 u32 user_tsc_khz;
5552
5553                 r = -EINVAL;
5554                 user_tsc_khz = (u32)arg;
5555
5556                 if (kvm_has_tsc_control &&
5557                     user_tsc_khz >= kvm_max_guest_tsc_khz)
5558                         goto out;
5559
5560                 if (user_tsc_khz == 0)
5561                         user_tsc_khz = tsc_khz;
5562
5563                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
5564                         r = 0;
5565
5566                 goto out;
5567         }
5568         case KVM_GET_TSC_KHZ: {
5569                 r = vcpu->arch.virtual_tsc_khz;
5570                 goto out;
5571         }
5572         case KVM_KVMCLOCK_CTRL: {
5573                 r = kvm_set_guest_paused(vcpu);
5574                 goto out;
5575         }
5576         case KVM_ENABLE_CAP: {
5577                 struct kvm_enable_cap cap;
5578
5579                 r = -EFAULT;
5580                 if (copy_from_user(&cap, argp, sizeof(cap)))
5581                         goto out;
5582                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
5583                 break;
5584         }
5585         case KVM_GET_NESTED_STATE: {
5586                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5587                 u32 user_data_size;
5588
5589                 r = -EINVAL;
5590                 if (!kvm_x86_ops.nested_ops->get_state)
5591                         break;
5592
5593                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
5594                 r = -EFAULT;
5595                 if (get_user(user_data_size, &user_kvm_nested_state->size))
5596                         break;
5597
5598                 r = kvm_x86_ops.nested_ops->get_state(vcpu, user_kvm_nested_state,
5599                                                      user_data_size);
5600                 if (r < 0)
5601                         break;
5602
5603                 if (r > user_data_size) {
5604                         if (put_user(r, &user_kvm_nested_state->size))
5605                                 r = -EFAULT;
5606                         else
5607                                 r = -E2BIG;
5608                         break;
5609                 }
5610
5611                 r = 0;
5612                 break;
5613         }
5614         case KVM_SET_NESTED_STATE: {
5615                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
5616                 struct kvm_nested_state kvm_state;
5617                 int idx;
5618
5619                 r = -EINVAL;
5620                 if (!kvm_x86_ops.nested_ops->set_state)
5621                         break;
5622
5623                 r = -EFAULT;
5624                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
5625                         break;
5626
5627                 r = -EINVAL;
5628                 if (kvm_state.size < sizeof(kvm_state))
5629                         break;
5630
5631                 if (kvm_state.flags &
5632                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
5633                       | KVM_STATE_NESTED_EVMCS | KVM_STATE_NESTED_MTF_PENDING
5634                       | KVM_STATE_NESTED_GIF_SET))
5635                         break;
5636
5637                 /* nested_run_pending implies guest_mode.  */
5638                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
5639                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
5640                         break;
5641
5642                 idx = srcu_read_lock(&vcpu->kvm->srcu);
5643                 r = kvm_x86_ops.nested_ops->set_state(vcpu, user_kvm_nested_state, &kvm_state);
5644                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5645                 break;
5646         }
5647         case KVM_GET_SUPPORTED_HV_CPUID:
5648                 r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp);
5649                 break;
5650 #ifdef CONFIG_KVM_XEN
5651         case KVM_XEN_VCPU_GET_ATTR: {
5652                 struct kvm_xen_vcpu_attr xva;
5653
5654                 r = -EFAULT;
5655                 if (copy_from_user(&xva, argp, sizeof(xva)))
5656                         goto out;
5657                 r = kvm_xen_vcpu_get_attr(vcpu, &xva);
5658                 if (!r && copy_to_user(argp, &xva, sizeof(xva)))
5659                         r = -EFAULT;
5660                 break;
5661         }
5662         case KVM_XEN_VCPU_SET_ATTR: {
5663                 struct kvm_xen_vcpu_attr xva;
5664
5665                 r = -EFAULT;
5666                 if (copy_from_user(&xva, argp, sizeof(xva)))
5667                         goto out;
5668                 r = kvm_xen_vcpu_set_attr(vcpu, &xva);
5669                 break;
5670         }
5671 #endif
5672         case KVM_GET_SREGS2: {
5673                 u.sregs2 = kzalloc(sizeof(struct kvm_sregs2), GFP_KERNEL);
5674                 r = -ENOMEM;
5675                 if (!u.sregs2)
5676                         goto out;
5677                 __get_sregs2(vcpu, u.sregs2);
5678                 r = -EFAULT;
5679                 if (copy_to_user(argp, u.sregs2, sizeof(struct kvm_sregs2)))
5680                         goto out;
5681                 r = 0;
5682                 break;
5683         }
5684         case KVM_SET_SREGS2: {
5685                 u.sregs2 = memdup_user(argp, sizeof(struct kvm_sregs2));
5686                 if (IS_ERR(u.sregs2)) {
5687                         r = PTR_ERR(u.sregs2);
5688                         u.sregs2 = NULL;
5689                         goto out;
5690                 }
5691                 r = __set_sregs2(vcpu, u.sregs2);
5692                 break;
5693         }
5694         case KVM_HAS_DEVICE_ATTR:
5695         case KVM_GET_DEVICE_ATTR:
5696         case KVM_SET_DEVICE_ATTR:
5697                 r = kvm_vcpu_ioctl_device_attr(vcpu, ioctl, argp);
5698                 break;
5699         default:
5700                 r = -EINVAL;
5701         }
5702 out:
5703         kfree(u.buffer);
5704 out_nofree:
5705         vcpu_put(vcpu);
5706         return r;
5707 }
5708
5709 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
5710 {
5711         return VM_FAULT_SIGBUS;
5712 }
5713
5714 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
5715 {
5716         int ret;
5717
5718         if (addr > (unsigned int)(-3 * PAGE_SIZE))
5719                 return -EINVAL;
5720         ret = static_call(kvm_x86_set_tss_addr)(kvm, addr);
5721         return ret;
5722 }
5723
5724 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
5725                                               u64 ident_addr)
5726 {
5727         return static_call(kvm_x86_set_identity_map_addr)(kvm, ident_addr);
5728 }
5729
5730 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
5731                                          unsigned long kvm_nr_mmu_pages)
5732 {
5733         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
5734                 return -EINVAL;
5735
5736         mutex_lock(&kvm->slots_lock);
5737
5738         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
5739         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
5740
5741         mutex_unlock(&kvm->slots_lock);
5742         return 0;
5743 }
5744
5745 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
5746 {
5747         return kvm->arch.n_max_mmu_pages;
5748 }
5749
5750 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5751 {
5752         struct kvm_pic *pic = kvm->arch.vpic;
5753         int r;
5754
5755         r = 0;
5756         switch (chip->chip_id) {
5757         case KVM_IRQCHIP_PIC_MASTER:
5758                 memcpy(&chip->chip.pic, &pic->pics[0],
5759                         sizeof(struct kvm_pic_state));
5760                 break;
5761         case KVM_IRQCHIP_PIC_SLAVE:
5762                 memcpy(&chip->chip.pic, &pic->pics[1],
5763                         sizeof(struct kvm_pic_state));
5764                 break;
5765         case KVM_IRQCHIP_IOAPIC:
5766                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
5767                 break;
5768         default:
5769                 r = -EINVAL;
5770                 break;
5771         }
5772         return r;
5773 }
5774
5775 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
5776 {
5777         struct kvm_pic *pic = kvm->arch.vpic;
5778         int r;
5779
5780         r = 0;
5781         switch (chip->chip_id) {
5782         case KVM_IRQCHIP_PIC_MASTER:
5783                 spin_lock(&pic->lock);
5784                 memcpy(&pic->pics[0], &chip->chip.pic,
5785                         sizeof(struct kvm_pic_state));
5786                 spin_unlock(&pic->lock);
5787                 break;
5788         case KVM_IRQCHIP_PIC_SLAVE:
5789                 spin_lock(&pic->lock);
5790                 memcpy(&pic->pics[1], &chip->chip.pic,
5791                         sizeof(struct kvm_pic_state));
5792                 spin_unlock(&pic->lock);
5793                 break;
5794         case KVM_IRQCHIP_IOAPIC:
5795                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
5796                 break;
5797         default:
5798                 r = -EINVAL;
5799                 break;
5800         }
5801         kvm_pic_update_irq(pic);
5802         return r;
5803 }
5804
5805 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5806 {
5807         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
5808
5809         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
5810
5811         mutex_lock(&kps->lock);
5812         memcpy(ps, &kps->channels, sizeof(*ps));
5813         mutex_unlock(&kps->lock);
5814         return 0;
5815 }
5816
5817 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
5818 {
5819         int i;
5820         struct kvm_pit *pit = kvm->arch.vpit;
5821
5822         mutex_lock(&pit->pit_state.lock);
5823         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
5824         for (i = 0; i < 3; i++)
5825                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
5826         mutex_unlock(&pit->pit_state.lock);
5827         return 0;
5828 }
5829
5830 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5831 {
5832         mutex_lock(&kvm->arch.vpit->pit_state.lock);
5833         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
5834                 sizeof(ps->channels));
5835         ps->flags = kvm->arch.vpit->pit_state.flags;
5836         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
5837         memset(&ps->reserved, 0, sizeof(ps->reserved));
5838         return 0;
5839 }
5840
5841 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
5842 {
5843         int start = 0;
5844         int i;
5845         u32 prev_legacy, cur_legacy;
5846         struct kvm_pit *pit = kvm->arch.vpit;
5847
5848         mutex_lock(&pit->pit_state.lock);
5849         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
5850         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
5851         if (!prev_legacy && cur_legacy)
5852                 start = 1;
5853         memcpy(&pit->pit_state.channels, &ps->channels,
5854                sizeof(pit->pit_state.channels));
5855         pit->pit_state.flags = ps->flags;
5856         for (i = 0; i < 3; i++)
5857                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
5858                                    start && i == 0);
5859         mutex_unlock(&pit->pit_state.lock);
5860         return 0;
5861 }
5862
5863 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
5864                                  struct kvm_reinject_control *control)
5865 {
5866         struct kvm_pit *pit = kvm->arch.vpit;
5867
5868         /* pit->pit_state.lock was overloaded to prevent userspace from getting
5869          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
5870          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
5871          */
5872         mutex_lock(&pit->pit_state.lock);
5873         kvm_pit_set_reinject(pit, control->pit_reinject);
5874         mutex_unlock(&pit->pit_state.lock);
5875
5876         return 0;
5877 }
5878
5879 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot)
5880 {
5881
5882         /*
5883          * Flush all CPUs' dirty log buffers to the  dirty_bitmap.  Called
5884          * before reporting dirty_bitmap to userspace.  KVM flushes the buffers
5885          * on all VM-Exits, thus we only need to kick running vCPUs to force a
5886          * VM-Exit.
5887          */
5888         struct kvm_vcpu *vcpu;
5889         unsigned long i;
5890
5891         kvm_for_each_vcpu(i, vcpu, kvm)
5892                 kvm_vcpu_kick(vcpu);
5893 }
5894
5895 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
5896                         bool line_status)
5897 {
5898         if (!irqchip_in_kernel(kvm))
5899                 return -ENXIO;
5900
5901         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
5902                                         irq_event->irq, irq_event->level,
5903                                         line_status);
5904         return 0;
5905 }
5906
5907 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
5908                             struct kvm_enable_cap *cap)
5909 {
5910         int r;
5911
5912         if (cap->flags)
5913                 return -EINVAL;
5914
5915         switch (cap->cap) {
5916         case KVM_CAP_DISABLE_QUIRKS2:
5917                 r = -EINVAL;
5918                 if (cap->args[0] & ~KVM_X86_VALID_QUIRKS)
5919                         break;
5920                 fallthrough;
5921         case KVM_CAP_DISABLE_QUIRKS:
5922                 kvm->arch.disabled_quirks = cap->args[0];
5923                 r = 0;
5924                 break;
5925         case KVM_CAP_SPLIT_IRQCHIP: {
5926                 mutex_lock(&kvm->lock);
5927                 r = -EINVAL;
5928                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
5929                         goto split_irqchip_unlock;
5930                 r = -EEXIST;
5931                 if (irqchip_in_kernel(kvm))
5932                         goto split_irqchip_unlock;
5933                 if (kvm->created_vcpus)
5934                         goto split_irqchip_unlock;
5935                 r = kvm_setup_empty_irq_routing(kvm);
5936                 if (r)
5937                         goto split_irqchip_unlock;
5938                 /* Pairs with irqchip_in_kernel. */
5939                 smp_wmb();
5940                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
5941                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
5942                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
5943                 r = 0;
5944 split_irqchip_unlock:
5945                 mutex_unlock(&kvm->lock);
5946                 break;
5947         }
5948         case KVM_CAP_X2APIC_API:
5949                 r = -EINVAL;
5950                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
5951                         break;
5952
5953                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
5954                         kvm->arch.x2apic_format = true;
5955                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
5956                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
5957
5958                 r = 0;
5959                 break;
5960         case KVM_CAP_X86_DISABLE_EXITS:
5961                 r = -EINVAL;
5962                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
5963                         break;
5964
5965                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
5966                         kvm_can_mwait_in_guest())
5967                         kvm->arch.mwait_in_guest = true;
5968                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
5969                         kvm->arch.hlt_in_guest = true;
5970                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
5971                         kvm->arch.pause_in_guest = true;
5972                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
5973                         kvm->arch.cstate_in_guest = true;
5974                 r = 0;
5975                 break;
5976         case KVM_CAP_MSR_PLATFORM_INFO:
5977                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
5978                 r = 0;
5979                 break;
5980         case KVM_CAP_EXCEPTION_PAYLOAD:
5981                 kvm->arch.exception_payload_enabled = cap->args[0];
5982                 r = 0;
5983                 break;
5984         case KVM_CAP_X86_USER_SPACE_MSR:
5985                 kvm->arch.user_space_msr_mask = cap->args[0];
5986                 r = 0;
5987                 break;
5988         case KVM_CAP_X86_BUS_LOCK_EXIT:
5989                 r = -EINVAL;
5990                 if (cap->args[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE)
5991                         break;
5992
5993                 if ((cap->args[0] & KVM_BUS_LOCK_DETECTION_OFF) &&
5994                     (cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT))
5995                         break;
5996
5997                 if (kvm_has_bus_lock_exit &&
5998                     cap->args[0] & KVM_BUS_LOCK_DETECTION_EXIT)
5999                         kvm->arch.bus_lock_detection_enabled = true;
6000                 r = 0;
6001                 break;
6002 #ifdef CONFIG_X86_SGX_KVM
6003         case KVM_CAP_SGX_ATTRIBUTE: {
6004                 unsigned long allowed_attributes = 0;
6005
6006                 r = sgx_set_attribute(&allowed_attributes, cap->args[0]);
6007                 if (r)
6008                         break;
6009
6010                 /* KVM only supports the PROVISIONKEY privileged attribute. */
6011                 if ((allowed_attributes & SGX_ATTR_PROVISIONKEY) &&
6012                     !(allowed_attributes & ~SGX_ATTR_PROVISIONKEY))
6013                         kvm->arch.sgx_provisioning_allowed = true;
6014                 else
6015                         r = -EINVAL;
6016                 break;
6017         }
6018 #endif
6019         case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM:
6020                 r = -EINVAL;
6021                 if (!kvm_x86_ops.vm_copy_enc_context_from)
6022                         break;
6023
6024                 r = static_call(kvm_x86_vm_copy_enc_context_from)(kvm, cap->args[0]);
6025                 break;
6026         case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM:
6027                 r = -EINVAL;
6028                 if (!kvm_x86_ops.vm_move_enc_context_from)
6029                         break;
6030
6031                 r = static_call(kvm_x86_vm_move_enc_context_from)(kvm, cap->args[0]);
6032                 break;
6033         case KVM_CAP_EXIT_HYPERCALL:
6034                 if (cap->args[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK) {
6035                         r = -EINVAL;
6036                         break;
6037                 }
6038                 kvm->arch.hypercall_exit_enabled = cap->args[0];
6039                 r = 0;
6040                 break;
6041         case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
6042                 r = -EINVAL;
6043                 if (cap->args[0] & ~1)
6044                         break;
6045                 kvm->arch.exit_on_emulation_error = cap->args[0];
6046                 r = 0;
6047                 break;
6048         case KVM_CAP_PMU_CAPABILITY:
6049                 r = -EINVAL;
6050                 if (!enable_pmu || (cap->args[0] & ~KVM_CAP_PMU_VALID_MASK))
6051                         break;
6052
6053                 mutex_lock(&kvm->lock);
6054                 if (!kvm->created_vcpus) {
6055                         kvm->arch.enable_pmu = !(cap->args[0] & KVM_PMU_CAP_DISABLE);
6056                         r = 0;
6057                 }
6058                 mutex_unlock(&kvm->lock);
6059                 break;
6060         default:
6061                 r = -EINVAL;
6062                 break;
6063         }
6064         return r;
6065 }
6066
6067 static struct kvm_x86_msr_filter *kvm_alloc_msr_filter(bool default_allow)
6068 {
6069         struct kvm_x86_msr_filter *msr_filter;
6070
6071         msr_filter = kzalloc(sizeof(*msr_filter), GFP_KERNEL_ACCOUNT);
6072         if (!msr_filter)
6073                 return NULL;
6074
6075         msr_filter->default_allow = default_allow;
6076         return msr_filter;
6077 }
6078
6079 static void kvm_free_msr_filter(struct kvm_x86_msr_filter *msr_filter)
6080 {
6081         u32 i;
6082
6083         if (!msr_filter)
6084                 return;
6085
6086         for (i = 0; i < msr_filter->count; i++)
6087                 kfree(msr_filter->ranges[i].bitmap);
6088
6089         kfree(msr_filter);
6090 }
6091
6092 static int kvm_add_msr_filter(struct kvm_x86_msr_filter *msr_filter,
6093                               struct kvm_msr_filter_range *user_range)
6094 {
6095         unsigned long *bitmap = NULL;
6096         size_t bitmap_size;
6097
6098         if (!user_range->nmsrs)
6099                 return 0;
6100
6101         if (user_range->flags & ~(KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE))
6102                 return -EINVAL;
6103
6104         if (!user_range->flags)
6105                 return -EINVAL;
6106
6107         bitmap_size = BITS_TO_LONGS(user_range->nmsrs) * sizeof(long);
6108         if (!bitmap_size || bitmap_size > KVM_MSR_FILTER_MAX_BITMAP_SIZE)
6109                 return -EINVAL;
6110
6111         bitmap = memdup_user((__user u8*)user_range->bitmap, bitmap_size);
6112         if (IS_ERR(bitmap))
6113                 return PTR_ERR(bitmap);
6114
6115         msr_filter->ranges[msr_filter->count] = (struct msr_bitmap_range) {
6116                 .flags = user_range->flags,
6117                 .base = user_range->base,
6118                 .nmsrs = user_range->nmsrs,
6119                 .bitmap = bitmap,
6120         };
6121
6122         msr_filter->count++;
6123         return 0;
6124 }
6125
6126 static int kvm_vm_ioctl_set_msr_filter(struct kvm *kvm, void __user *argp)
6127 {
6128         struct kvm_msr_filter __user *user_msr_filter = argp;
6129         struct kvm_x86_msr_filter *new_filter, *old_filter;
6130         struct kvm_msr_filter filter;
6131         bool default_allow;
6132         bool empty = true;
6133         int r = 0;
6134         u32 i;
6135
6136         if (copy_from_user(&filter, user_msr_filter, sizeof(filter)))
6137                 return -EFAULT;
6138
6139         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++)
6140                 empty &= !filter.ranges[i].nmsrs;
6141
6142         default_allow = !(filter.flags & KVM_MSR_FILTER_DEFAULT_DENY);
6143         if (empty && !default_allow)
6144                 return -EINVAL;
6145
6146         new_filter = kvm_alloc_msr_filter(default_allow);
6147         if (!new_filter)
6148                 return -ENOMEM;
6149
6150         for (i = 0; i < ARRAY_SIZE(filter.ranges); i++) {
6151                 r = kvm_add_msr_filter(new_filter, &filter.ranges[i]);
6152                 if (r) {
6153                         kvm_free_msr_filter(new_filter);
6154                         return r;
6155                 }
6156         }
6157
6158         mutex_lock(&kvm->lock);
6159
6160         /* The per-VM filter is protected by kvm->lock... */
6161         old_filter = srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1);
6162
6163         rcu_assign_pointer(kvm->arch.msr_filter, new_filter);
6164         synchronize_srcu(&kvm->srcu);
6165
6166         kvm_free_msr_filter(old_filter);
6167
6168         kvm_make_all_cpus_request(kvm, KVM_REQ_MSR_FILTER_CHANGED);
6169         mutex_unlock(&kvm->lock);
6170
6171         return 0;
6172 }
6173
6174 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6175 static int kvm_arch_suspend_notifier(struct kvm *kvm)
6176 {
6177         struct kvm_vcpu *vcpu;
6178         unsigned long i;
6179         int ret = 0;
6180
6181         mutex_lock(&kvm->lock);
6182         kvm_for_each_vcpu(i, vcpu, kvm) {
6183                 if (!vcpu->arch.pv_time.active)
6184                         continue;
6185
6186                 ret = kvm_set_guest_paused(vcpu);
6187                 if (ret) {
6188                         kvm_err("Failed to pause guest VCPU%d: %d\n",
6189                                 vcpu->vcpu_id, ret);
6190                         break;
6191                 }
6192         }
6193         mutex_unlock(&kvm->lock);
6194
6195         return ret ? NOTIFY_BAD : NOTIFY_DONE;
6196 }
6197
6198 int kvm_arch_pm_notifier(struct kvm *kvm, unsigned long state)
6199 {
6200         switch (state) {
6201         case PM_HIBERNATION_PREPARE:
6202         case PM_SUSPEND_PREPARE:
6203                 return kvm_arch_suspend_notifier(kvm);
6204         }
6205
6206         return NOTIFY_DONE;
6207 }
6208 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6209
6210 static int kvm_vm_ioctl_get_clock(struct kvm *kvm, void __user *argp)
6211 {
6212         struct kvm_clock_data data = { 0 };
6213
6214         get_kvmclock(kvm, &data);
6215         if (copy_to_user(argp, &data, sizeof(data)))
6216                 return -EFAULT;
6217
6218         return 0;
6219 }
6220
6221 static int kvm_vm_ioctl_set_clock(struct kvm *kvm, void __user *argp)
6222 {
6223         struct kvm_arch *ka = &kvm->arch;
6224         struct kvm_clock_data data;
6225         u64 now_raw_ns;
6226
6227         if (copy_from_user(&data, argp, sizeof(data)))
6228                 return -EFAULT;
6229
6230         /*
6231          * Only KVM_CLOCK_REALTIME is used, but allow passing the
6232          * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6233          */
6234         if (data.flags & ~KVM_CLOCK_VALID_FLAGS)
6235                 return -EINVAL;
6236
6237         kvm_hv_invalidate_tsc_page(kvm);
6238         kvm_start_pvclock_update(kvm);
6239         pvclock_update_vm_gtod_copy(kvm);
6240
6241         /*
6242          * This pairs with kvm_guest_time_update(): when masterclock is
6243          * in use, we use master_kernel_ns + kvmclock_offset to set
6244          * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6245          * is slightly ahead) here we risk going negative on unsigned
6246          * 'system_time' when 'data.clock' is very small.
6247          */
6248         if (data.flags & KVM_CLOCK_REALTIME) {
6249                 u64 now_real_ns = ktime_get_real_ns();
6250
6251                 /*
6252                  * Avoid stepping the kvmclock backwards.
6253                  */
6254                 if (now_real_ns > data.realtime)
6255                         data.clock += now_real_ns - data.realtime;
6256         }
6257
6258         if (ka->use_master_clock)
6259                 now_raw_ns = ka->master_kernel_ns;
6260         else
6261                 now_raw_ns = get_kvmclock_base_ns();
6262         ka->kvmclock_offset = data.clock - now_raw_ns;
6263         kvm_end_pvclock_update(kvm);
6264         return 0;
6265 }
6266
6267 long kvm_arch_vm_ioctl(struct file *filp,
6268                        unsigned int ioctl, unsigned long arg)
6269 {
6270         struct kvm *kvm = filp->private_data;
6271         void __user *argp = (void __user *)arg;
6272         int r = -ENOTTY;
6273         /*
6274          * This union makes it completely explicit to gcc-3.x
6275          * that these two variables' stack usage should be
6276          * combined, not added together.
6277          */
6278         union {
6279                 struct kvm_pit_state ps;
6280                 struct kvm_pit_state2 ps2;
6281                 struct kvm_pit_config pit_config;
6282         } u;
6283
6284         switch (ioctl) {
6285         case KVM_SET_TSS_ADDR:
6286                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
6287                 break;
6288         case KVM_SET_IDENTITY_MAP_ADDR: {
6289                 u64 ident_addr;
6290
6291                 mutex_lock(&kvm->lock);
6292                 r = -EINVAL;
6293                 if (kvm->created_vcpus)
6294                         goto set_identity_unlock;
6295                 r = -EFAULT;
6296                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
6297                         goto set_identity_unlock;
6298                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
6299 set_identity_unlock:
6300                 mutex_unlock(&kvm->lock);
6301                 break;
6302         }
6303         case KVM_SET_NR_MMU_PAGES:
6304                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
6305                 break;
6306         case KVM_GET_NR_MMU_PAGES:
6307                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
6308                 break;
6309         case KVM_CREATE_IRQCHIP: {
6310                 mutex_lock(&kvm->lock);
6311
6312                 r = -EEXIST;
6313                 if (irqchip_in_kernel(kvm))
6314                         goto create_irqchip_unlock;
6315
6316                 r = -EINVAL;
6317                 if (kvm->created_vcpus)
6318                         goto create_irqchip_unlock;
6319
6320                 r = kvm_pic_init(kvm);
6321                 if (r)
6322                         goto create_irqchip_unlock;
6323
6324                 r = kvm_ioapic_init(kvm);
6325                 if (r) {
6326                         kvm_pic_destroy(kvm);
6327                         goto create_irqchip_unlock;
6328                 }
6329
6330                 r = kvm_setup_default_irq_routing(kvm);
6331                 if (r) {
6332                         kvm_ioapic_destroy(kvm);
6333                         kvm_pic_destroy(kvm);
6334                         goto create_irqchip_unlock;
6335                 }
6336                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6337                 smp_wmb();
6338                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
6339                 kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_ABSENT);
6340         create_irqchip_unlock:
6341                 mutex_unlock(&kvm->lock);
6342                 break;
6343         }
6344         case KVM_CREATE_PIT:
6345                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
6346                 goto create_pit;
6347         case KVM_CREATE_PIT2:
6348                 r = -EFAULT;
6349                 if (copy_from_user(&u.pit_config, argp,
6350                                    sizeof(struct kvm_pit_config)))
6351                         goto out;
6352         create_pit:
6353                 mutex_lock(&kvm->lock);
6354                 r = -EEXIST;
6355                 if (kvm->arch.vpit)
6356                         goto create_pit_unlock;
6357                 r = -ENOMEM;
6358                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
6359                 if (kvm->arch.vpit)
6360                         r = 0;
6361         create_pit_unlock:
6362                 mutex_unlock(&kvm->lock);
6363                 break;
6364         case KVM_GET_IRQCHIP: {
6365                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6366                 struct kvm_irqchip *chip;
6367
6368                 chip = memdup_user(argp, sizeof(*chip));
6369                 if (IS_ERR(chip)) {
6370                         r = PTR_ERR(chip);
6371                         goto out;
6372                 }
6373
6374                 r = -ENXIO;
6375                 if (!irqchip_kernel(kvm))
6376                         goto get_irqchip_out;
6377                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
6378                 if (r)
6379                         goto get_irqchip_out;
6380                 r = -EFAULT;
6381                 if (copy_to_user(argp, chip, sizeof(*chip)))
6382                         goto get_irqchip_out;
6383                 r = 0;
6384         get_irqchip_out:
6385                 kfree(chip);
6386                 break;
6387         }
6388         case KVM_SET_IRQCHIP: {
6389                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
6390                 struct kvm_irqchip *chip;
6391
6392                 chip = memdup_user(argp, sizeof(*chip));
6393                 if (IS_ERR(chip)) {
6394                         r = PTR_ERR(chip);
6395                         goto out;
6396                 }
6397
6398                 r = -ENXIO;
6399                 if (!irqchip_kernel(kvm))
6400                         goto set_irqchip_out;
6401                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
6402         set_irqchip_out:
6403                 kfree(chip);
6404                 break;
6405         }
6406         case KVM_GET_PIT: {
6407                 r = -EFAULT;
6408                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
6409                         goto out;
6410                 r = -ENXIO;
6411                 if (!kvm->arch.vpit)
6412                         goto out;
6413                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
6414                 if (r)
6415                         goto out;
6416                 r = -EFAULT;
6417                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
6418                         goto out;
6419                 r = 0;
6420                 break;
6421         }
6422         case KVM_SET_PIT: {
6423                 r = -EFAULT;
6424                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
6425                         goto out;
6426                 mutex_lock(&kvm->lock);
6427                 r = -ENXIO;
6428                 if (!kvm->arch.vpit)
6429                         goto set_pit_out;
6430                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
6431 set_pit_out:
6432                 mutex_unlock(&kvm->lock);
6433                 break;
6434         }
6435         case KVM_GET_PIT2: {
6436                 r = -ENXIO;
6437                 if (!kvm->arch.vpit)
6438                         goto out;
6439                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
6440                 if (r)
6441                         goto out;
6442                 r = -EFAULT;
6443                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
6444                         goto out;
6445                 r = 0;
6446                 break;
6447         }
6448         case KVM_SET_PIT2: {
6449                 r = -EFAULT;
6450                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
6451                         goto out;
6452                 mutex_lock(&kvm->lock);
6453                 r = -ENXIO;
6454                 if (!kvm->arch.vpit)
6455                         goto set_pit2_out;
6456                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
6457 set_pit2_out:
6458                 mutex_unlock(&kvm->lock);
6459                 break;
6460         }
6461         case KVM_REINJECT_CONTROL: {
6462                 struct kvm_reinject_control control;
6463                 r =  -EFAULT;
6464                 if (copy_from_user(&control, argp, sizeof(control)))
6465                         goto out;
6466                 r = -ENXIO;
6467                 if (!kvm->arch.vpit)
6468                         goto out;
6469                 r = kvm_vm_ioctl_reinject(kvm, &control);
6470                 break;
6471         }
6472         case KVM_SET_BOOT_CPU_ID:
6473                 r = 0;
6474                 mutex_lock(&kvm->lock);
6475                 if (kvm->created_vcpus)
6476                         r = -EBUSY;
6477                 else
6478                         kvm->arch.bsp_vcpu_id = arg;
6479                 mutex_unlock(&kvm->lock);
6480                 break;
6481 #ifdef CONFIG_KVM_XEN
6482         case KVM_XEN_HVM_CONFIG: {
6483                 struct kvm_xen_hvm_config xhc;
6484                 r = -EFAULT;
6485                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
6486                         goto out;
6487                 r = kvm_xen_hvm_config(kvm, &xhc);
6488                 break;
6489         }
6490         case KVM_XEN_HVM_GET_ATTR: {
6491                 struct kvm_xen_hvm_attr xha;
6492
6493                 r = -EFAULT;
6494                 if (copy_from_user(&xha, argp, sizeof(xha)))
6495                         goto out;
6496                 r = kvm_xen_hvm_get_attr(kvm, &xha);
6497                 if (!r && copy_to_user(argp, &xha, sizeof(xha)))
6498                         r = -EFAULT;
6499                 break;
6500         }
6501         case KVM_XEN_HVM_SET_ATTR: {
6502                 struct kvm_xen_hvm_attr xha;
6503
6504                 r = -EFAULT;
6505                 if (copy_from_user(&xha, argp, sizeof(xha)))
6506                         goto out;
6507                 r = kvm_xen_hvm_set_attr(kvm, &xha);
6508                 break;
6509         }
6510         case KVM_XEN_HVM_EVTCHN_SEND: {
6511                 struct kvm_irq_routing_xen_evtchn uxe;
6512
6513                 r = -EFAULT;
6514                 if (copy_from_user(&uxe, argp, sizeof(uxe)))
6515                         goto out;
6516                 r = kvm_xen_hvm_evtchn_send(kvm, &uxe);
6517                 break;
6518         }
6519 #endif
6520         case KVM_SET_CLOCK:
6521                 r = kvm_vm_ioctl_set_clock(kvm, argp);
6522                 break;
6523         case KVM_GET_CLOCK:
6524                 r = kvm_vm_ioctl_get_clock(kvm, argp);
6525                 break;
6526         case KVM_SET_TSC_KHZ: {
6527                 u32 user_tsc_khz;
6528
6529                 r = -EINVAL;
6530                 user_tsc_khz = (u32)arg;
6531
6532                 if (kvm_has_tsc_control &&
6533                     user_tsc_khz >= kvm_max_guest_tsc_khz)
6534                         goto out;
6535
6536                 if (user_tsc_khz == 0)
6537                         user_tsc_khz = tsc_khz;
6538
6539                 WRITE_ONCE(kvm->arch.default_tsc_khz, user_tsc_khz);
6540                 r = 0;
6541
6542                 goto out;
6543         }
6544         case KVM_GET_TSC_KHZ: {
6545                 r = READ_ONCE(kvm->arch.default_tsc_khz);
6546                 goto out;
6547         }
6548         case KVM_MEMORY_ENCRYPT_OP: {
6549                 r = -ENOTTY;
6550                 if (!kvm_x86_ops.mem_enc_ioctl)
6551                         goto out;
6552
6553                 r = static_call(kvm_x86_mem_enc_ioctl)(kvm, argp);
6554                 break;
6555         }
6556         case KVM_MEMORY_ENCRYPT_REG_REGION: {
6557                 struct kvm_enc_region region;
6558
6559                 r = -EFAULT;
6560                 if (copy_from_user(&region, argp, sizeof(region)))
6561                         goto out;
6562
6563                 r = -ENOTTY;
6564                 if (!kvm_x86_ops.mem_enc_register_region)
6565                         goto out;
6566
6567                 r = static_call(kvm_x86_mem_enc_register_region)(kvm, &region);
6568                 break;
6569         }
6570         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
6571                 struct kvm_enc_region region;
6572
6573                 r = -EFAULT;
6574                 if (copy_from_user(&region, argp, sizeof(region)))
6575                         goto out;
6576
6577                 r = -ENOTTY;
6578                 if (!kvm_x86_ops.mem_enc_unregister_region)
6579                         goto out;
6580
6581                 r = static_call(kvm_x86_mem_enc_unregister_region)(kvm, &region);
6582                 break;
6583         }
6584         case KVM_HYPERV_EVENTFD: {
6585                 struct kvm_hyperv_eventfd hvevfd;
6586
6587                 r = -EFAULT;
6588                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
6589                         goto out;
6590                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
6591                 break;
6592         }
6593         case KVM_SET_PMU_EVENT_FILTER:
6594                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
6595                 break;
6596         case KVM_X86_SET_MSR_FILTER:
6597                 r = kvm_vm_ioctl_set_msr_filter(kvm, argp);
6598                 break;
6599         default:
6600                 r = -ENOTTY;
6601         }
6602 out:
6603         return r;
6604 }
6605
6606 static void kvm_init_msr_list(void)
6607 {
6608         struct x86_pmu_capability x86_pmu;
6609         u32 dummy[2];
6610         unsigned i;
6611
6612         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
6613                          "Please update the fixed PMCs in msrs_to_saved_all[]");
6614
6615         perf_get_x86_pmu_capability(&x86_pmu);
6616
6617         num_msrs_to_save = 0;
6618         num_emulated_msrs = 0;
6619         num_msr_based_features = 0;
6620
6621         for (i = 0; i < ARRAY_SIZE(msrs_to_save_all); i++) {
6622                 if (rdmsr_safe(msrs_to_save_all[i], &dummy[0], &dummy[1]) < 0)
6623                         continue;
6624
6625                 /*
6626                  * Even MSRs that are valid in the host may not be exposed
6627                  * to the guests in some cases.
6628                  */
6629                 switch (msrs_to_save_all[i]) {
6630                 case MSR_IA32_BNDCFGS:
6631                         if (!kvm_mpx_supported())
6632                                 continue;
6633                         break;
6634                 case MSR_TSC_AUX:
6635                         if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP) &&
6636                             !kvm_cpu_cap_has(X86_FEATURE_RDPID))
6637                                 continue;
6638                         break;
6639                 case MSR_IA32_UMWAIT_CONTROL:
6640                         if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG))
6641                                 continue;
6642                         break;
6643                 case MSR_IA32_RTIT_CTL:
6644                 case MSR_IA32_RTIT_STATUS:
6645                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT))
6646                                 continue;
6647                         break;
6648                 case MSR_IA32_RTIT_CR3_MATCH:
6649                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6650                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
6651                                 continue;
6652                         break;
6653                 case MSR_IA32_RTIT_OUTPUT_BASE:
6654                 case MSR_IA32_RTIT_OUTPUT_MASK:
6655                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6656                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
6657                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
6658                                 continue;
6659                         break;
6660                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B:
6661                         if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT) ||
6662                                 msrs_to_save_all[i] - MSR_IA32_RTIT_ADDR0_A >=
6663                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
6664                                 continue;
6665                         break;
6666                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
6667                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
6668                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6669                                 continue;
6670                         break;
6671                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
6672                         if (msrs_to_save_all[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
6673                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
6674                                 continue;
6675                         break;
6676                 case MSR_IA32_XFD:
6677                 case MSR_IA32_XFD_ERR:
6678                         if (!kvm_cpu_cap_has(X86_FEATURE_XFD))
6679                                 continue;
6680                         break;
6681                 default:
6682                         break;
6683                 }
6684
6685                 msrs_to_save[num_msrs_to_save++] = msrs_to_save_all[i];
6686         }
6687
6688         for (i = 0; i < ARRAY_SIZE(emulated_msrs_all); i++) {
6689                 if (!static_call(kvm_x86_has_emulated_msr)(NULL, emulated_msrs_all[i]))
6690                         continue;
6691
6692                 emulated_msrs[num_emulated_msrs++] = emulated_msrs_all[i];
6693         }
6694
6695         for (i = 0; i < ARRAY_SIZE(msr_based_features_all); i++) {
6696                 struct kvm_msr_entry msr;
6697
6698                 msr.index = msr_based_features_all[i];
6699                 if (kvm_get_msr_feature(&msr))
6700                         continue;
6701
6702                 msr_based_features[num_msr_based_features++] = msr_based_features_all[i];
6703         }
6704 }
6705
6706 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
6707                            const void *v)
6708 {
6709         int handled = 0;
6710         int n;
6711
6712         do {
6713                 n = min(len, 8);
6714                 if (!(lapic_in_kernel(vcpu) &&
6715                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
6716                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
6717                         break;
6718                 handled += n;
6719                 addr += n;
6720                 len -= n;
6721                 v += n;
6722         } while (len);
6723
6724         return handled;
6725 }
6726
6727 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
6728 {
6729         int handled = 0;
6730         int n;
6731
6732         do {
6733                 n = min(len, 8);
6734                 if (!(lapic_in_kernel(vcpu) &&
6735                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
6736                                          addr, n, v))
6737                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
6738                         break;
6739                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
6740                 handled += n;
6741                 addr += n;
6742                 len -= n;
6743                 v += n;
6744         } while (len);
6745
6746         return handled;
6747 }
6748
6749 static void kvm_set_segment(struct kvm_vcpu *vcpu,
6750                         struct kvm_segment *var, int seg)
6751 {
6752         static_call(kvm_x86_set_segment)(vcpu, var, seg);
6753 }
6754
6755 void kvm_get_segment(struct kvm_vcpu *vcpu,
6756                      struct kvm_segment *var, int seg)
6757 {
6758         static_call(kvm_x86_get_segment)(vcpu, var, seg);
6759 }
6760
6761 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u64 access,
6762                            struct x86_exception *exception)
6763 {
6764         struct kvm_mmu *mmu = vcpu->arch.mmu;
6765         gpa_t t_gpa;
6766
6767         BUG_ON(!mmu_is_nested(vcpu));
6768
6769         /* NPT walks are always user-walks */
6770         access |= PFERR_USER_MASK;
6771         t_gpa  = mmu->gva_to_gpa(vcpu, mmu, gpa, access, exception);
6772
6773         return t_gpa;
6774 }
6775
6776 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
6777                               struct x86_exception *exception)
6778 {
6779         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6780
6781         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6782         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6783 }
6784 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read);
6785
6786  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
6787                                 struct x86_exception *exception)
6788 {
6789         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6790
6791         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6792         access |= PFERR_FETCH_MASK;
6793         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6794 }
6795
6796 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
6797                                struct x86_exception *exception)
6798 {
6799         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6800
6801         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6802         access |= PFERR_WRITE_MASK;
6803         return mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
6804 }
6805 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write);
6806
6807 /* uses this to access any guest's mapped memory without checking CPL */
6808 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
6809                                 struct x86_exception *exception)
6810 {
6811         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6812
6813         return mmu->gva_to_gpa(vcpu, mmu, gva, 0, exception);
6814 }
6815
6816 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6817                                       struct kvm_vcpu *vcpu, u64 access,
6818                                       struct x86_exception *exception)
6819 {
6820         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6821         void *data = val;
6822         int r = X86EMUL_CONTINUE;
6823
6824         while (bytes) {
6825                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6826                 unsigned offset = addr & (PAGE_SIZE-1);
6827                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
6828                 int ret;
6829
6830                 if (gpa == UNMAPPED_GVA)
6831                         return X86EMUL_PROPAGATE_FAULT;
6832                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
6833                                                offset, toread);
6834                 if (ret < 0) {
6835                         r = X86EMUL_IO_NEEDED;
6836                         goto out;
6837                 }
6838
6839                 bytes -= toread;
6840                 data += toread;
6841                 addr += toread;
6842         }
6843 out:
6844         return r;
6845 }
6846
6847 /* used for instruction fetching */
6848 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
6849                                 gva_t addr, void *val, unsigned int bytes,
6850                                 struct x86_exception *exception)
6851 {
6852         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6853         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6854         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6855         unsigned offset;
6856         int ret;
6857
6858         /* Inline kvm_read_guest_virt_helper for speed.  */
6859         gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access|PFERR_FETCH_MASK,
6860                                     exception);
6861         if (unlikely(gpa == UNMAPPED_GVA))
6862                 return X86EMUL_PROPAGATE_FAULT;
6863
6864         offset = addr & (PAGE_SIZE-1);
6865         if (WARN_ON(offset + bytes > PAGE_SIZE))
6866                 bytes = (unsigned)PAGE_SIZE - offset;
6867         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
6868                                        offset, bytes);
6869         if (unlikely(ret < 0))
6870                 return X86EMUL_IO_NEEDED;
6871
6872         return X86EMUL_CONTINUE;
6873 }
6874
6875 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
6876                                gva_t addr, void *val, unsigned int bytes,
6877                                struct x86_exception *exception)
6878 {
6879         u64 access = (static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0;
6880
6881         /*
6882          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
6883          * is returned, but our callers are not ready for that and they blindly
6884          * call kvm_inject_page_fault.  Ensure that they at least do not leak
6885          * uninitialized kernel stack memory into cr2 and error code.
6886          */
6887         memset(exception, 0, sizeof(*exception));
6888         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
6889                                           exception);
6890 }
6891 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
6892
6893 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
6894                              gva_t addr, void *val, unsigned int bytes,
6895                              struct x86_exception *exception, bool system)
6896 {
6897         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6898         u64 access = 0;
6899
6900         if (system)
6901                 access |= PFERR_IMPLICIT_ACCESS;
6902         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6903                 access |= PFERR_USER_MASK;
6904
6905         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
6906 }
6907
6908 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
6909                 unsigned long addr, void *val, unsigned int bytes)
6910 {
6911         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6912         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
6913
6914         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
6915 }
6916
6917 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
6918                                       struct kvm_vcpu *vcpu, u64 access,
6919                                       struct x86_exception *exception)
6920 {
6921         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
6922         void *data = val;
6923         int r = X86EMUL_CONTINUE;
6924
6925         while (bytes) {
6926                 gpa_t gpa = mmu->gva_to_gpa(vcpu, mmu, addr, access, exception);
6927                 unsigned offset = addr & (PAGE_SIZE-1);
6928                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
6929                 int ret;
6930
6931                 if (gpa == UNMAPPED_GVA)
6932                         return X86EMUL_PROPAGATE_FAULT;
6933                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
6934                 if (ret < 0) {
6935                         r = X86EMUL_IO_NEEDED;
6936                         goto out;
6937                 }
6938
6939                 bytes -= towrite;
6940                 data += towrite;
6941                 addr += towrite;
6942         }
6943 out:
6944         return r;
6945 }
6946
6947 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
6948                               unsigned int bytes, struct x86_exception *exception,
6949                               bool system)
6950 {
6951         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6952         u64 access = PFERR_WRITE_MASK;
6953
6954         if (system)
6955                 access |= PFERR_IMPLICIT_ACCESS;
6956         else if (static_call(kvm_x86_get_cpl)(vcpu) == 3)
6957                 access |= PFERR_USER_MASK;
6958
6959         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6960                                            access, exception);
6961 }
6962
6963 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
6964                                 unsigned int bytes, struct x86_exception *exception)
6965 {
6966         /* kvm_write_guest_virt_system can pull in tons of pages. */
6967         vcpu->arch.l1tf_flush_l1d = true;
6968
6969         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
6970                                            PFERR_WRITE_MASK, exception);
6971 }
6972 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
6973
6974 static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
6975                                 void *insn, int insn_len)
6976 {
6977         return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
6978                                                             insn, insn_len);
6979 }
6980
6981 int handle_ud(struct kvm_vcpu *vcpu)
6982 {
6983         static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
6984         int emul_type = EMULTYPE_TRAP_UD;
6985         char sig[5]; /* ud2; .ascii "kvm" */
6986         struct x86_exception e;
6987
6988         if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
6989                 return 1;
6990
6991         if (force_emulation_prefix &&
6992             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
6993                                 sig, sizeof(sig), &e) == 0 &&
6994             memcmp(sig, kvm_emulate_prefix, sizeof(sig)) == 0) {
6995                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
6996                 emul_type = EMULTYPE_TRAP_UD_FORCED;
6997         }
6998
6999         return kvm_emulate_instruction(vcpu, emul_type);
7000 }
7001 EXPORT_SYMBOL_GPL(handle_ud);
7002
7003 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7004                             gpa_t gpa, bool write)
7005 {
7006         /* For APIC access vmexit */
7007         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7008                 return 1;
7009
7010         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
7011                 trace_vcpu_match_mmio(gva, gpa, write, true);
7012                 return 1;
7013         }
7014
7015         return 0;
7016 }
7017
7018 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
7019                                 gpa_t *gpa, struct x86_exception *exception,
7020                                 bool write)
7021 {
7022         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
7023         u64 access = ((static_call(kvm_x86_get_cpl)(vcpu) == 3) ? PFERR_USER_MASK : 0)
7024                 | (write ? PFERR_WRITE_MASK : 0);
7025
7026         /*
7027          * currently PKRU is only applied to ept enabled guest so
7028          * there is no pkey in EPT page table for L1 guest or EPT
7029          * shadow page table for L2 guest.
7030          */
7031         if (vcpu_match_mmio_gva(vcpu, gva) && (!is_paging(vcpu) ||
7032             !permission_fault(vcpu, vcpu->arch.walk_mmu,
7033                               vcpu->arch.mmio_access, 0, access))) {
7034                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
7035                                         (gva & (PAGE_SIZE - 1));
7036                 trace_vcpu_match_mmio(gva, *gpa, write, false);
7037                 return 1;
7038         }
7039
7040         *gpa = mmu->gva_to_gpa(vcpu, mmu, gva, access, exception);
7041
7042         if (*gpa == UNMAPPED_GVA)
7043                 return -1;
7044
7045         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
7046 }
7047
7048 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
7049                         const void *val, int bytes)
7050 {
7051         int ret;
7052
7053         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
7054         if (ret < 0)
7055                 return 0;
7056         kvm_page_track_write(vcpu, gpa, val, bytes);
7057         return 1;
7058 }
7059
7060 struct read_write_emulator_ops {
7061         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
7062                                   int bytes);
7063         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
7064                                   void *val, int bytes);
7065         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7066                                int bytes, void *val);
7067         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
7068                                     void *val, int bytes);
7069         bool write;
7070 };
7071
7072 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
7073 {
7074         if (vcpu->mmio_read_completed) {
7075                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
7076                                vcpu->mmio_fragments[0].gpa, val);
7077                 vcpu->mmio_read_completed = 0;
7078                 return 1;
7079         }
7080
7081         return 0;
7082 }
7083
7084 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7085                         void *val, int bytes)
7086 {
7087         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
7088 }
7089
7090 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
7091                          void *val, int bytes)
7092 {
7093         return emulator_write_phys(vcpu, gpa, val, bytes);
7094 }
7095
7096 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
7097 {
7098         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
7099         return vcpu_mmio_write(vcpu, gpa, bytes, val);
7100 }
7101
7102 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7103                           void *val, int bytes)
7104 {
7105         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
7106         return X86EMUL_IO_NEEDED;
7107 }
7108
7109 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
7110                            void *val, int bytes)
7111 {
7112         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
7113
7114         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
7115         return X86EMUL_CONTINUE;
7116 }
7117
7118 static const struct read_write_emulator_ops read_emultor = {
7119         .read_write_prepare = read_prepare,
7120         .read_write_emulate = read_emulate,
7121         .read_write_mmio = vcpu_mmio_read,
7122         .read_write_exit_mmio = read_exit_mmio,
7123 };
7124
7125 static const struct read_write_emulator_ops write_emultor = {
7126         .read_write_emulate = write_emulate,
7127         .read_write_mmio = write_mmio,
7128         .read_write_exit_mmio = write_exit_mmio,
7129         .write = true,
7130 };
7131
7132 static int emulator_read_write_onepage(unsigned long addr, void *val,
7133                                        unsigned int bytes,
7134                                        struct x86_exception *exception,
7135                                        struct kvm_vcpu *vcpu,
7136                                        const struct read_write_emulator_ops *ops)
7137 {
7138         gpa_t gpa;
7139         int handled, ret;
7140         bool write = ops->write;
7141         struct kvm_mmio_fragment *frag;
7142         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7143
7144         /*
7145          * If the exit was due to a NPF we may already have a GPA.
7146          * If the GPA is present, use it to avoid the GVA to GPA table walk.
7147          * Note, this cannot be used on string operations since string
7148          * operation using rep will only have the initial GPA from the NPF
7149          * occurred.
7150          */
7151         if (ctxt->gpa_available && emulator_can_use_gpa(ctxt) &&
7152             (addr & ~PAGE_MASK) == (ctxt->gpa_val & ~PAGE_MASK)) {
7153                 gpa = ctxt->gpa_val;
7154                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
7155         } else {
7156                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
7157                 if (ret < 0)
7158                         return X86EMUL_PROPAGATE_FAULT;
7159         }
7160
7161         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
7162                 return X86EMUL_CONTINUE;
7163
7164         /*
7165          * Is this MMIO handled locally?
7166          */
7167         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
7168         if (handled == bytes)
7169                 return X86EMUL_CONTINUE;
7170
7171         gpa += handled;
7172         bytes -= handled;
7173         val += handled;
7174
7175         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
7176         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
7177         frag->gpa = gpa;
7178         frag->data = val;
7179         frag->len = bytes;
7180         return X86EMUL_CONTINUE;
7181 }
7182
7183 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
7184                         unsigned long addr,
7185                         void *val, unsigned int bytes,
7186                         struct x86_exception *exception,
7187                         const struct read_write_emulator_ops *ops)
7188 {
7189         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7190         gpa_t gpa;
7191         int rc;
7192
7193         if (ops->read_write_prepare &&
7194                   ops->read_write_prepare(vcpu, val, bytes))
7195                 return X86EMUL_CONTINUE;
7196
7197         vcpu->mmio_nr_fragments = 0;
7198
7199         /* Crossing a page boundary? */
7200         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
7201                 int now;
7202
7203                 now = -addr & ~PAGE_MASK;
7204                 rc = emulator_read_write_onepage(addr, val, now, exception,
7205                                                  vcpu, ops);
7206
7207                 if (rc != X86EMUL_CONTINUE)
7208                         return rc;
7209                 addr += now;
7210                 if (ctxt->mode != X86EMUL_MODE_PROT64)
7211                         addr = (u32)addr;
7212                 val += now;
7213                 bytes -= now;
7214         }
7215
7216         rc = emulator_read_write_onepage(addr, val, bytes, exception,
7217                                          vcpu, ops);
7218         if (rc != X86EMUL_CONTINUE)
7219                 return rc;
7220
7221         if (!vcpu->mmio_nr_fragments)
7222                 return rc;
7223
7224         gpa = vcpu->mmio_fragments[0].gpa;
7225
7226         vcpu->mmio_needed = 1;
7227         vcpu->mmio_cur_fragment = 0;
7228
7229         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
7230         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
7231         vcpu->run->exit_reason = KVM_EXIT_MMIO;
7232         vcpu->run->mmio.phys_addr = gpa;
7233
7234         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
7235 }
7236
7237 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
7238                                   unsigned long addr,
7239                                   void *val,
7240                                   unsigned int bytes,
7241                                   struct x86_exception *exception)
7242 {
7243         return emulator_read_write(ctxt, addr, val, bytes,
7244                                    exception, &read_emultor);
7245 }
7246
7247 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
7248                             unsigned long addr,
7249                             const void *val,
7250                             unsigned int bytes,
7251                             struct x86_exception *exception)
7252 {
7253         return emulator_read_write(ctxt, addr, (void *)val, bytes,
7254                                    exception, &write_emultor);
7255 }
7256
7257 #define CMPXCHG_TYPE(t, ptr, old, new) \
7258         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
7259
7260 #ifdef CONFIG_X86_64
7261 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
7262 #else
7263 #  define CMPXCHG64(ptr, old, new) \
7264         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
7265 #endif
7266
7267 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
7268                                      unsigned long addr,
7269                                      const void *old,
7270                                      const void *new,
7271                                      unsigned int bytes,
7272                                      struct x86_exception *exception)
7273 {
7274         struct kvm_host_map map;
7275         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7276         u64 page_line_mask;
7277         gpa_t gpa;
7278         char *kaddr;
7279         bool exchanged;
7280
7281         /* guests cmpxchg8b have to be emulated atomically */
7282         if (bytes > 8 || (bytes & (bytes - 1)))
7283                 goto emul_write;
7284
7285         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
7286
7287         if (gpa == UNMAPPED_GVA ||
7288             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
7289                 goto emul_write;
7290
7291         /*
7292          * Emulate the atomic as a straight write to avoid #AC if SLD is
7293          * enabled in the host and the access splits a cache line.
7294          */
7295         if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT))
7296                 page_line_mask = ~(cache_line_size() - 1);
7297         else
7298                 page_line_mask = PAGE_MASK;
7299
7300         if (((gpa + bytes - 1) & page_line_mask) != (gpa & page_line_mask))
7301                 goto emul_write;
7302
7303         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
7304                 goto emul_write;
7305
7306         kaddr = map.hva + offset_in_page(gpa);
7307
7308         switch (bytes) {
7309         case 1:
7310                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
7311                 break;
7312         case 2:
7313                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
7314                 break;
7315         case 4:
7316                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
7317                 break;
7318         case 8:
7319                 exchanged = CMPXCHG64(kaddr, old, new);
7320                 break;
7321         default:
7322                 BUG();
7323         }
7324
7325         kvm_vcpu_unmap(vcpu, &map, true);
7326
7327         if (!exchanged)
7328                 return X86EMUL_CMPXCHG_FAILED;
7329
7330         kvm_page_track_write(vcpu, gpa, new, bytes);
7331
7332         return X86EMUL_CONTINUE;
7333
7334 emul_write:
7335         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
7336
7337         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
7338 }
7339
7340 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
7341 {
7342         int r = 0, i;
7343
7344         for (i = 0; i < vcpu->arch.pio.count; i++) {
7345                 if (vcpu->arch.pio.in)
7346                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
7347                                             vcpu->arch.pio.size, pd);
7348                 else
7349                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
7350                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
7351                                              pd);
7352                 if (r)
7353                         break;
7354                 pd += vcpu->arch.pio.size;
7355         }
7356         return r;
7357 }
7358
7359 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
7360                                unsigned short port,
7361                                unsigned int count, bool in)
7362 {
7363         vcpu->arch.pio.port = port;
7364         vcpu->arch.pio.in = in;
7365         vcpu->arch.pio.count  = count;
7366         vcpu->arch.pio.size = size;
7367
7368         if (!kernel_pio(vcpu, vcpu->arch.pio_data))
7369                 return 1;
7370
7371         vcpu->run->exit_reason = KVM_EXIT_IO;
7372         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
7373         vcpu->run->io.size = size;
7374         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
7375         vcpu->run->io.count = count;
7376         vcpu->run->io.port = port;
7377
7378         return 0;
7379 }
7380
7381 static int __emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7382                              unsigned short port, unsigned int count)
7383 {
7384         WARN_ON(vcpu->arch.pio.count);
7385         memset(vcpu->arch.pio_data, 0, size * count);
7386         return emulator_pio_in_out(vcpu, size, port, count, true);
7387 }
7388
7389 static void complete_emulator_pio_in(struct kvm_vcpu *vcpu, void *val)
7390 {
7391         int size = vcpu->arch.pio.size;
7392         unsigned count = vcpu->arch.pio.count;
7393         memcpy(val, vcpu->arch.pio_data, size * count);
7394         trace_kvm_pio(KVM_PIO_IN, vcpu->arch.pio.port, size, count, vcpu->arch.pio_data);
7395         vcpu->arch.pio.count = 0;
7396 }
7397
7398 static int emulator_pio_in(struct kvm_vcpu *vcpu, int size,
7399                            unsigned short port, void *val, unsigned int count)
7400 {
7401         if (vcpu->arch.pio.count) {
7402                 /*
7403                  * Complete a previous iteration that required userspace I/O.
7404                  * Note, @count isn't guaranteed to match pio.count as userspace
7405                  * can modify ECX before rerunning the vCPU.  Ignore any such
7406                  * shenanigans as KVM doesn't support modifying the rep count,
7407                  * and the emulator ensures @count doesn't overflow the buffer.
7408                  */
7409         } else {
7410                 int r = __emulator_pio_in(vcpu, size, port, count);
7411                 if (!r)
7412                         return r;
7413
7414                 /* Results already available, fall through.  */
7415         }
7416
7417         complete_emulator_pio_in(vcpu, val);
7418         return 1;
7419 }
7420
7421 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
7422                                     int size, unsigned short port, void *val,
7423                                     unsigned int count)
7424 {
7425         return emulator_pio_in(emul_to_vcpu(ctxt), size, port, val, count);
7426
7427 }
7428
7429 static int emulator_pio_out(struct kvm_vcpu *vcpu, int size,
7430                             unsigned short port, const void *val,
7431                             unsigned int count)
7432 {
7433         int ret;
7434
7435         memcpy(vcpu->arch.pio_data, val, size * count);
7436         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
7437         ret = emulator_pio_in_out(vcpu, size, port, count, false);
7438         if (ret)
7439                 vcpu->arch.pio.count = 0;
7440
7441         return ret;
7442 }
7443
7444 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
7445                                      int size, unsigned short port,
7446                                      const void *val, unsigned int count)
7447 {
7448         return emulator_pio_out(emul_to_vcpu(ctxt), size, port, val, count);
7449 }
7450
7451 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
7452 {
7453         return static_call(kvm_x86_get_segment_base)(vcpu, seg);
7454 }
7455
7456 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
7457 {
7458         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
7459 }
7460
7461 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
7462 {
7463         if (!need_emulate_wbinvd(vcpu))
7464                 return X86EMUL_CONTINUE;
7465
7466         if (static_call(kvm_x86_has_wbinvd_exit)()) {
7467                 int cpu = get_cpu();
7468
7469                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
7470                 on_each_cpu_mask(vcpu->arch.wbinvd_dirty_mask,
7471                                 wbinvd_ipi, NULL, 1);
7472                 put_cpu();
7473                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
7474         } else
7475                 wbinvd();
7476         return X86EMUL_CONTINUE;
7477 }
7478
7479 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
7480 {
7481         kvm_emulate_wbinvd_noskip(vcpu);
7482         return kvm_skip_emulated_instruction(vcpu);
7483 }
7484 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
7485
7486
7487
7488 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
7489 {
7490         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
7491 }
7492
7493 static void emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
7494                             unsigned long *dest)
7495 {
7496         kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
7497 }
7498
7499 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
7500                            unsigned long value)
7501 {
7502
7503         return kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
7504 }
7505
7506 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
7507 {
7508         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
7509 }
7510
7511 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
7512 {
7513         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7514         unsigned long value;
7515
7516         switch (cr) {
7517         case 0:
7518                 value = kvm_read_cr0(vcpu);
7519                 break;
7520         case 2:
7521                 value = vcpu->arch.cr2;
7522                 break;
7523         case 3:
7524                 value = kvm_read_cr3(vcpu);
7525                 break;
7526         case 4:
7527                 value = kvm_read_cr4(vcpu);
7528                 break;
7529         case 8:
7530                 value = kvm_get_cr8(vcpu);
7531                 break;
7532         default:
7533                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7534                 return 0;
7535         }
7536
7537         return value;
7538 }
7539
7540 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
7541 {
7542         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7543         int res = 0;
7544
7545         switch (cr) {
7546         case 0:
7547                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
7548                 break;
7549         case 2:
7550                 vcpu->arch.cr2 = val;
7551                 break;
7552         case 3:
7553                 res = kvm_set_cr3(vcpu, val);
7554                 break;
7555         case 4:
7556                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
7557                 break;
7558         case 8:
7559                 res = kvm_set_cr8(vcpu, val);
7560                 break;
7561         default:
7562                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
7563                 res = -1;
7564         }
7565
7566         return res;
7567 }
7568
7569 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
7570 {
7571         return static_call(kvm_x86_get_cpl)(emul_to_vcpu(ctxt));
7572 }
7573
7574 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7575 {
7576         static_call(kvm_x86_get_gdt)(emul_to_vcpu(ctxt), dt);
7577 }
7578
7579 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7580 {
7581         static_call(kvm_x86_get_idt)(emul_to_vcpu(ctxt), dt);
7582 }
7583
7584 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7585 {
7586         static_call(kvm_x86_set_gdt)(emul_to_vcpu(ctxt), dt);
7587 }
7588
7589 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
7590 {
7591         static_call(kvm_x86_set_idt)(emul_to_vcpu(ctxt), dt);
7592 }
7593
7594 static unsigned long emulator_get_cached_segment_base(
7595         struct x86_emulate_ctxt *ctxt, int seg)
7596 {
7597         return get_segment_base(emul_to_vcpu(ctxt), seg);
7598 }
7599
7600 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
7601                                  struct desc_struct *desc, u32 *base3,
7602                                  int seg)
7603 {
7604         struct kvm_segment var;
7605
7606         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
7607         *selector = var.selector;
7608
7609         if (var.unusable) {
7610                 memset(desc, 0, sizeof(*desc));
7611                 if (base3)
7612                         *base3 = 0;
7613                 return false;
7614         }
7615
7616         if (var.g)
7617                 var.limit >>= 12;
7618         set_desc_limit(desc, var.limit);
7619         set_desc_base(desc, (unsigned long)var.base);
7620 #ifdef CONFIG_X86_64
7621         if (base3)
7622                 *base3 = var.base >> 32;
7623 #endif
7624         desc->type = var.type;
7625         desc->s = var.s;
7626         desc->dpl = var.dpl;
7627         desc->p = var.present;
7628         desc->avl = var.avl;
7629         desc->l = var.l;
7630         desc->d = var.db;
7631         desc->g = var.g;
7632
7633         return true;
7634 }
7635
7636 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
7637                                  struct desc_struct *desc, u32 base3,
7638                                  int seg)
7639 {
7640         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7641         struct kvm_segment var;
7642
7643         var.selector = selector;
7644         var.base = get_desc_base(desc);
7645 #ifdef CONFIG_X86_64
7646         var.base |= ((u64)base3) << 32;
7647 #endif
7648         var.limit = get_desc_limit(desc);
7649         if (desc->g)
7650                 var.limit = (var.limit << 12) | 0xfff;
7651         var.type = desc->type;
7652         var.dpl = desc->dpl;
7653         var.db = desc->d;
7654         var.s = desc->s;
7655         var.l = desc->l;
7656         var.g = desc->g;
7657         var.avl = desc->avl;
7658         var.present = desc->p;
7659         var.unusable = !var.present;
7660         var.padding = 0;
7661
7662         kvm_set_segment(vcpu, &var, seg);
7663         return;
7664 }
7665
7666 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7667                                         u32 msr_index, u64 *pdata)
7668 {
7669         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7670         int r;
7671
7672         r = kvm_get_msr_with_filter(vcpu, msr_index, pdata);
7673
7674         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_RDMSR, 0,
7675                                     complete_emulated_rdmsr, r)) {
7676                 /* Bounce to user space */
7677                 return X86EMUL_IO_NEEDED;
7678         }
7679
7680         return r;
7681 }
7682
7683 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt *ctxt,
7684                                         u32 msr_index, u64 data)
7685 {
7686         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7687         int r;
7688
7689         r = kvm_set_msr_with_filter(vcpu, msr_index, data);
7690
7691         if (r && kvm_msr_user_space(vcpu, msr_index, KVM_EXIT_X86_WRMSR, data,
7692                                     complete_emulated_msr_access, r)) {
7693                 /* Bounce to user space */
7694                 return X86EMUL_IO_NEEDED;
7695         }
7696
7697         return r;
7698 }
7699
7700 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
7701                             u32 msr_index, u64 *pdata)
7702 {
7703         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
7704 }
7705
7706 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
7707                             u32 msr_index, u64 data)
7708 {
7709         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
7710 }
7711
7712 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
7713 {
7714         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7715
7716         return vcpu->arch.smbase;
7717 }
7718
7719 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
7720 {
7721         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7722
7723         vcpu->arch.smbase = smbase;
7724 }
7725
7726 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
7727                               u32 pmc)
7728 {
7729         if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt), pmc))
7730                 return 0;
7731         return -EINVAL;
7732 }
7733
7734 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
7735                              u32 pmc, u64 *pdata)
7736 {
7737         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
7738 }
7739
7740 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
7741 {
7742         emul_to_vcpu(ctxt)->arch.halt_request = 1;
7743 }
7744
7745 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
7746                               struct x86_instruction_info *info,
7747                               enum x86_intercept_stage stage)
7748 {
7749         return static_call(kvm_x86_check_intercept)(emul_to_vcpu(ctxt), info, stage,
7750                                             &ctxt->exception);
7751 }
7752
7753 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
7754                               u32 *eax, u32 *ebx, u32 *ecx, u32 *edx,
7755                               bool exact_only)
7756 {
7757         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, exact_only);
7758 }
7759
7760 static bool emulator_guest_has_long_mode(struct x86_emulate_ctxt *ctxt)
7761 {
7762         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_LM);
7763 }
7764
7765 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt *ctxt)
7766 {
7767         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_MOVBE);
7768 }
7769
7770 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt *ctxt)
7771 {
7772         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_FXSR);
7773 }
7774
7775 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt *ctxt)
7776 {
7777         return guest_cpuid_has(emul_to_vcpu(ctxt), X86_FEATURE_RDPID);
7778 }
7779
7780 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
7781 {
7782         return kvm_register_read_raw(emul_to_vcpu(ctxt), reg);
7783 }
7784
7785 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
7786 {
7787         kvm_register_write_raw(emul_to_vcpu(ctxt), reg, val);
7788 }
7789
7790 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
7791 {
7792         static_call(kvm_x86_set_nmi_mask)(emul_to_vcpu(ctxt), masked);
7793 }
7794
7795 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
7796 {
7797         return emul_to_vcpu(ctxt)->arch.hflags;
7798 }
7799
7800 static void emulator_exiting_smm(struct x86_emulate_ctxt *ctxt)
7801 {
7802         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7803
7804         kvm_smm_changed(vcpu, false);
7805 }
7806
7807 static int emulator_leave_smm(struct x86_emulate_ctxt *ctxt,
7808                                   const char *smstate)
7809 {
7810         return static_call(kvm_x86_leave_smm)(emul_to_vcpu(ctxt), smstate);
7811 }
7812
7813 static void emulator_triple_fault(struct x86_emulate_ctxt *ctxt)
7814 {
7815         kvm_make_request(KVM_REQ_TRIPLE_FAULT, emul_to_vcpu(ctxt));
7816 }
7817
7818 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
7819 {
7820         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
7821 }
7822
7823 static const struct x86_emulate_ops emulate_ops = {
7824         .read_gpr            = emulator_read_gpr,
7825         .write_gpr           = emulator_write_gpr,
7826         .read_std            = emulator_read_std,
7827         .write_std           = emulator_write_std,
7828         .read_phys           = kvm_read_guest_phys_system,
7829         .fetch               = kvm_fetch_guest_virt,
7830         .read_emulated       = emulator_read_emulated,
7831         .write_emulated      = emulator_write_emulated,
7832         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
7833         .invlpg              = emulator_invlpg,
7834         .pio_in_emulated     = emulator_pio_in_emulated,
7835         .pio_out_emulated    = emulator_pio_out_emulated,
7836         .get_segment         = emulator_get_segment,
7837         .set_segment         = emulator_set_segment,
7838         .get_cached_segment_base = emulator_get_cached_segment_base,
7839         .get_gdt             = emulator_get_gdt,
7840         .get_idt             = emulator_get_idt,
7841         .set_gdt             = emulator_set_gdt,
7842         .set_idt             = emulator_set_idt,
7843         .get_cr              = emulator_get_cr,
7844         .set_cr              = emulator_set_cr,
7845         .cpl                 = emulator_get_cpl,
7846         .get_dr              = emulator_get_dr,
7847         .set_dr              = emulator_set_dr,
7848         .get_smbase          = emulator_get_smbase,
7849         .set_smbase          = emulator_set_smbase,
7850         .set_msr_with_filter = emulator_set_msr_with_filter,
7851         .get_msr_with_filter = emulator_get_msr_with_filter,
7852         .set_msr             = emulator_set_msr,
7853         .get_msr             = emulator_get_msr,
7854         .check_pmc           = emulator_check_pmc,
7855         .read_pmc            = emulator_read_pmc,
7856         .halt                = emulator_halt,
7857         .wbinvd              = emulator_wbinvd,
7858         .fix_hypercall       = emulator_fix_hypercall,
7859         .intercept           = emulator_intercept,
7860         .get_cpuid           = emulator_get_cpuid,
7861         .guest_has_long_mode = emulator_guest_has_long_mode,
7862         .guest_has_movbe     = emulator_guest_has_movbe,
7863         .guest_has_fxsr      = emulator_guest_has_fxsr,
7864         .guest_has_rdpid     = emulator_guest_has_rdpid,
7865         .set_nmi_mask        = emulator_set_nmi_mask,
7866         .get_hflags          = emulator_get_hflags,
7867         .exiting_smm         = emulator_exiting_smm,
7868         .leave_smm           = emulator_leave_smm,
7869         .triple_fault        = emulator_triple_fault,
7870         .set_xcr             = emulator_set_xcr,
7871 };
7872
7873 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
7874 {
7875         u32 int_shadow = static_call(kvm_x86_get_interrupt_shadow)(vcpu);
7876         /*
7877          * an sti; sti; sequence only disable interrupts for the first
7878          * instruction. So, if the last instruction, be it emulated or
7879          * not, left the system with the INT_STI flag enabled, it
7880          * means that the last instruction is an sti. We should not
7881          * leave the flag on in this case. The same goes for mov ss
7882          */
7883         if (int_shadow & mask)
7884                 mask = 0;
7885         if (unlikely(int_shadow || mask)) {
7886                 static_call(kvm_x86_set_interrupt_shadow)(vcpu, mask);
7887                 if (!mask)
7888                         kvm_make_request(KVM_REQ_EVENT, vcpu);
7889         }
7890 }
7891
7892 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
7893 {
7894         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7895         if (ctxt->exception.vector == PF_VECTOR)
7896                 return kvm_inject_emulated_page_fault(vcpu, &ctxt->exception);
7897
7898         if (ctxt->exception.error_code_valid)
7899                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
7900                                       ctxt->exception.error_code);
7901         else
7902                 kvm_queue_exception(vcpu, ctxt->exception.vector);
7903         return false;
7904 }
7905
7906 static struct x86_emulate_ctxt *alloc_emulate_ctxt(struct kvm_vcpu *vcpu)
7907 {
7908         struct x86_emulate_ctxt *ctxt;
7909
7910         ctxt = kmem_cache_zalloc(x86_emulator_cache, GFP_KERNEL_ACCOUNT);
7911         if (!ctxt) {
7912                 pr_err("kvm: failed to allocate vcpu's emulator\n");
7913                 return NULL;
7914         }
7915
7916         ctxt->vcpu = vcpu;
7917         ctxt->ops = &emulate_ops;
7918         vcpu->arch.emulate_ctxt = ctxt;
7919
7920         return ctxt;
7921 }
7922
7923 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
7924 {
7925         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7926         int cs_db, cs_l;
7927
7928         static_call(kvm_x86_get_cs_db_l_bits)(vcpu, &cs_db, &cs_l);
7929
7930         ctxt->gpa_available = false;
7931         ctxt->eflags = kvm_get_rflags(vcpu);
7932         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
7933
7934         ctxt->eip = kvm_rip_read(vcpu);
7935         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
7936                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
7937                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
7938                      cs_db                              ? X86EMUL_MODE_PROT32 :
7939                                                           X86EMUL_MODE_PROT16;
7940         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
7941         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
7942         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
7943
7944         ctxt->interruptibility = 0;
7945         ctxt->have_exception = false;
7946         ctxt->exception.vector = -1;
7947         ctxt->perm_ok = false;
7948
7949         init_decode_cache(ctxt);
7950         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
7951 }
7952
7953 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
7954 {
7955         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
7956         int ret;
7957
7958         init_emulate_ctxt(vcpu);
7959
7960         ctxt->op_bytes = 2;
7961         ctxt->ad_bytes = 2;
7962         ctxt->_eip = ctxt->eip + inc_eip;
7963         ret = emulate_int_real(ctxt, irq);
7964
7965         if (ret != X86EMUL_CONTINUE) {
7966                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
7967         } else {
7968                 ctxt->eip = ctxt->_eip;
7969                 kvm_rip_write(vcpu, ctxt->eip);
7970                 kvm_set_rflags(vcpu, ctxt->eflags);
7971         }
7972 }
7973 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
7974
7975 static void prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
7976                                            u8 ndata, u8 *insn_bytes, u8 insn_size)
7977 {
7978         struct kvm_run *run = vcpu->run;
7979         u64 info[5];
7980         u8 info_start;
7981
7982         /*
7983          * Zero the whole array used to retrieve the exit info, as casting to
7984          * u32 for select entries will leave some chunks uninitialized.
7985          */
7986         memset(&info, 0, sizeof(info));
7987
7988         static_call(kvm_x86_get_exit_info)(vcpu, (u32 *)&info[0], &info[1],
7989                                            &info[2], (u32 *)&info[3],
7990                                            (u32 *)&info[4]);
7991
7992         run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
7993         run->emulation_failure.suberror = KVM_INTERNAL_ERROR_EMULATION;
7994
7995         /*
7996          * There's currently space for 13 entries, but 5 are used for the exit
7997          * reason and info.  Restrict to 4 to reduce the maintenance burden
7998          * when expanding kvm_run.emulation_failure in the future.
7999          */
8000         if (WARN_ON_ONCE(ndata > 4))
8001                 ndata = 4;
8002
8003         /* Always include the flags as a 'data' entry. */
8004         info_start = 1;
8005         run->emulation_failure.flags = 0;
8006
8007         if (insn_size) {
8008                 BUILD_BUG_ON((sizeof(run->emulation_failure.insn_size) +
8009                               sizeof(run->emulation_failure.insn_bytes) != 16));
8010                 info_start += 2;
8011                 run->emulation_failure.flags |=
8012                         KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES;
8013                 run->emulation_failure.insn_size = insn_size;
8014                 memset(run->emulation_failure.insn_bytes, 0x90,
8015                        sizeof(run->emulation_failure.insn_bytes));
8016                 memcpy(run->emulation_failure.insn_bytes, insn_bytes, insn_size);
8017         }
8018
8019         memcpy(&run->internal.data[info_start], info, sizeof(info));
8020         memcpy(&run->internal.data[info_start + ARRAY_SIZE(info)], data,
8021                ndata * sizeof(data[0]));
8022
8023         run->emulation_failure.ndata = info_start + ARRAY_SIZE(info) + ndata;
8024 }
8025
8026 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu *vcpu)
8027 {
8028         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8029
8030         prepare_emulation_failure_exit(vcpu, NULL, 0, ctxt->fetch.data,
8031                                        ctxt->fetch.end - ctxt->fetch.data);
8032 }
8033
8034 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu, u64 *data,
8035                                           u8 ndata)
8036 {
8037         prepare_emulation_failure_exit(vcpu, data, ndata, NULL, 0);
8038 }
8039 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit);
8040
8041 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu *vcpu)
8042 {
8043         __kvm_prepare_emulation_failure_exit(vcpu, NULL, 0);
8044 }
8045 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit);
8046
8047 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
8048 {
8049         struct kvm *kvm = vcpu->kvm;
8050
8051         ++vcpu->stat.insn_emulation_fail;
8052         trace_kvm_emulate_insn_failed(vcpu);
8053
8054         if (emulation_type & EMULTYPE_VMWARE_GP) {
8055                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8056                 return 1;
8057         }
8058
8059         if (kvm->arch.exit_on_emulation_error ||
8060             (emulation_type & EMULTYPE_SKIP)) {
8061                 prepare_emulation_ctxt_failure_exit(vcpu);
8062                 return 0;
8063         }
8064
8065         kvm_queue_exception(vcpu, UD_VECTOR);
8066
8067         if (!is_guest_mode(vcpu) && static_call(kvm_x86_get_cpl)(vcpu) == 0) {
8068                 prepare_emulation_ctxt_failure_exit(vcpu);
8069                 return 0;
8070         }
8071
8072         return 1;
8073 }
8074
8075 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8076                                   bool write_fault_to_shadow_pgtable,
8077                                   int emulation_type)
8078 {
8079         gpa_t gpa = cr2_or_gpa;
8080         kvm_pfn_t pfn;
8081
8082         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8083                 return false;
8084
8085         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8086             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8087                 return false;
8088
8089         if (!vcpu->arch.mmu->direct_map) {
8090                 /*
8091                  * Write permission should be allowed since only
8092                  * write access need to be emulated.
8093                  */
8094                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8095
8096                 /*
8097                  * If the mapping is invalid in guest, let cpu retry
8098                  * it to generate fault.
8099                  */
8100                 if (gpa == UNMAPPED_GVA)
8101                         return true;
8102         }
8103
8104         /*
8105          * Do not retry the unhandleable instruction if it faults on the
8106          * readonly host memory, otherwise it will goto a infinite loop:
8107          * retry instruction -> write #PF -> emulation fail -> retry
8108          * instruction -> ...
8109          */
8110         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
8111
8112         /*
8113          * If the instruction failed on the error pfn, it can not be fixed,
8114          * report the error to userspace.
8115          */
8116         if (is_error_noslot_pfn(pfn))
8117                 return false;
8118
8119         kvm_release_pfn_clean(pfn);
8120
8121         /* The instructions are well-emulated on direct mmu. */
8122         if (vcpu->arch.mmu->direct_map) {
8123                 unsigned int indirect_shadow_pages;
8124
8125                 write_lock(&vcpu->kvm->mmu_lock);
8126                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
8127                 write_unlock(&vcpu->kvm->mmu_lock);
8128
8129                 if (indirect_shadow_pages)
8130                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8131
8132                 return true;
8133         }
8134
8135         /*
8136          * if emulation was due to access to shadowed page table
8137          * and it failed try to unshadow page and re-enter the
8138          * guest to let CPU execute the instruction.
8139          */
8140         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8141
8142         /*
8143          * If the access faults on its page table, it can not
8144          * be fixed by unprotecting shadow page and it should
8145          * be reported to userspace.
8146          */
8147         return !write_fault_to_shadow_pgtable;
8148 }
8149
8150 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
8151                               gpa_t cr2_or_gpa,  int emulation_type)
8152 {
8153         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
8154         unsigned long last_retry_eip, last_retry_addr, gpa = cr2_or_gpa;
8155
8156         last_retry_eip = vcpu->arch.last_retry_eip;
8157         last_retry_addr = vcpu->arch.last_retry_addr;
8158
8159         /*
8160          * If the emulation is caused by #PF and it is non-page_table
8161          * writing instruction, it means the VM-EXIT is caused by shadow
8162          * page protected, we can zap the shadow page and retry this
8163          * instruction directly.
8164          *
8165          * Note: if the guest uses a non-page-table modifying instruction
8166          * on the PDE that points to the instruction, then we will unmap
8167          * the instruction and go to an infinite loop. So, we cache the
8168          * last retried eip and the last fault address, if we meet the eip
8169          * and the address again, we can break out of the potential infinite
8170          * loop.
8171          */
8172         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
8173
8174         if (!(emulation_type & EMULTYPE_ALLOW_RETRY_PF))
8175                 return false;
8176
8177         if (WARN_ON_ONCE(is_guest_mode(vcpu)) ||
8178             WARN_ON_ONCE(!(emulation_type & EMULTYPE_PF)))
8179                 return false;
8180
8181         if (x86_page_table_writing_insn(ctxt))
8182                 return false;
8183
8184         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2_or_gpa)
8185                 return false;
8186
8187         vcpu->arch.last_retry_eip = ctxt->eip;
8188         vcpu->arch.last_retry_addr = cr2_or_gpa;
8189
8190         if (!vcpu->arch.mmu->direct_map)
8191                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2_or_gpa, NULL);
8192
8193         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
8194
8195         return true;
8196 }
8197
8198 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
8199 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
8200
8201 static void kvm_smm_changed(struct kvm_vcpu *vcpu, bool entering_smm)
8202 {
8203         trace_kvm_smm_transition(vcpu->vcpu_id, vcpu->arch.smbase, entering_smm);
8204
8205         if (entering_smm) {
8206                 vcpu->arch.hflags |= HF_SMM_MASK;
8207         } else {
8208                 vcpu->arch.hflags &= ~(HF_SMM_MASK | HF_SMM_INSIDE_NMI_MASK);
8209
8210                 /* Process a latched INIT or SMI, if any.  */
8211                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8212
8213                 /*
8214                  * Even if KVM_SET_SREGS2 loaded PDPTRs out of band,
8215                  * on SMM exit we still need to reload them from
8216                  * guest memory
8217                  */
8218                 vcpu->arch.pdptrs_from_userspace = false;
8219         }
8220
8221         kvm_mmu_reset_context(vcpu);
8222 }
8223
8224 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
8225                                 unsigned long *db)
8226 {
8227         u32 dr6 = 0;
8228         int i;
8229         u32 enable, rwlen;
8230
8231         enable = dr7;
8232         rwlen = dr7 >> 16;
8233         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
8234                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
8235                         dr6 |= (1 << i);
8236         return dr6;
8237 }
8238
8239 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
8240 {
8241         struct kvm_run *kvm_run = vcpu->run;
8242
8243         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
8244                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_ACTIVE_LOW;
8245                 kvm_run->debug.arch.pc = kvm_get_linear_rip(vcpu);
8246                 kvm_run->debug.arch.exception = DB_VECTOR;
8247                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
8248                 return 0;
8249         }
8250         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
8251         return 1;
8252 }
8253
8254 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
8255 {
8256         unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8257         int r;
8258
8259         r = static_call(kvm_x86_skip_emulated_instruction)(vcpu);
8260         if (unlikely(!r))
8261                 return 0;
8262
8263         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8264
8265         /*
8266          * rflags is the old, "raw" value of the flags.  The new value has
8267          * not been saved yet.
8268          *
8269          * This is correct even for TF set by the guest, because "the
8270          * processor will not generate this exception after the instruction
8271          * that sets the TF flag".
8272          */
8273         if (unlikely(rflags & X86_EFLAGS_TF))
8274                 r = kvm_vcpu_do_singlestep(vcpu);
8275         return r;
8276 }
8277 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
8278
8279 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
8280 {
8281         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
8282             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
8283                 struct kvm_run *kvm_run = vcpu->run;
8284                 unsigned long eip = kvm_get_linear_rip(vcpu);
8285                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8286                                            vcpu->arch.guest_debug_dr7,
8287                                            vcpu->arch.eff_db);
8288
8289                 if (dr6 != 0) {
8290                         kvm_run->debug.arch.dr6 = dr6 | DR6_ACTIVE_LOW;
8291                         kvm_run->debug.arch.pc = eip;
8292                         kvm_run->debug.arch.exception = DB_VECTOR;
8293                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
8294                         *r = 0;
8295                         return true;
8296                 }
8297         }
8298
8299         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
8300             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
8301                 unsigned long eip = kvm_get_linear_rip(vcpu);
8302                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
8303                                            vcpu->arch.dr7,
8304                                            vcpu->arch.db);
8305
8306                 if (dr6 != 0) {
8307                         kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
8308                         *r = 1;
8309                         return true;
8310                 }
8311         }
8312
8313         return false;
8314 }
8315
8316 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
8317 {
8318         switch (ctxt->opcode_len) {
8319         case 1:
8320                 switch (ctxt->b) {
8321                 case 0xe4:      /* IN */
8322                 case 0xe5:
8323                 case 0xec:
8324                 case 0xed:
8325                 case 0xe6:      /* OUT */
8326                 case 0xe7:
8327                 case 0xee:
8328                 case 0xef:
8329                 case 0x6c:      /* INS */
8330                 case 0x6d:
8331                 case 0x6e:      /* OUTS */
8332                 case 0x6f:
8333                         return true;
8334                 }
8335                 break;
8336         case 2:
8337                 switch (ctxt->b) {
8338                 case 0x33:      /* RDPMC */
8339                         return true;
8340                 }
8341                 break;
8342         }
8343
8344         return false;
8345 }
8346
8347 /*
8348  * Decode to be emulated instruction. Return EMULATION_OK if success.
8349  */
8350 int x86_decode_emulated_instruction(struct kvm_vcpu *vcpu, int emulation_type,
8351                                     void *insn, int insn_len)
8352 {
8353         int r = EMULATION_OK;
8354         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8355
8356         init_emulate_ctxt(vcpu);
8357
8358         /*
8359          * We will reenter on the same instruction since we do not set
8360          * complete_userspace_io. This does not handle watchpoints yet,
8361          * those would be handled in the emulate_ops.
8362          */
8363         if (!(emulation_type & EMULTYPE_SKIP) &&
8364             kvm_vcpu_check_breakpoint(vcpu, &r))
8365                 return r;
8366
8367         r = x86_decode_insn(ctxt, insn, insn_len, emulation_type);
8368
8369         trace_kvm_emulate_insn_start(vcpu);
8370         ++vcpu->stat.insn_emulation;
8371
8372         return r;
8373 }
8374 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction);
8375
8376 int x86_emulate_instruction(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa,
8377                             int emulation_type, void *insn, int insn_len)
8378 {
8379         int r;
8380         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
8381         bool writeback = true;
8382         bool write_fault_to_spt;
8383
8384         if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
8385                 return 1;
8386
8387         vcpu->arch.l1tf_flush_l1d = true;
8388
8389         /*
8390          * Clear write_fault_to_shadow_pgtable here to ensure it is
8391          * never reused.
8392          */
8393         write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
8394         vcpu->arch.write_fault_to_shadow_pgtable = false;
8395
8396         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
8397                 kvm_clear_exception_queue(vcpu);
8398
8399                 r = x86_decode_emulated_instruction(vcpu, emulation_type,
8400                                                     insn, insn_len);
8401                 if (r != EMULATION_OK)  {
8402                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
8403                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
8404                                 kvm_queue_exception(vcpu, UD_VECTOR);
8405                                 return 1;
8406                         }
8407                         if (reexecute_instruction(vcpu, cr2_or_gpa,
8408                                                   write_fault_to_spt,
8409                                                   emulation_type))
8410                                 return 1;
8411                         if (ctxt->have_exception) {
8412                                 /*
8413                                  * #UD should result in just EMULATION_FAILED, and trap-like
8414                                  * exception should not be encountered during decode.
8415                                  */
8416                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
8417                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
8418                                 inject_emulated_exception(vcpu);
8419                                 return 1;
8420                         }
8421                         return handle_emulation_failure(vcpu, emulation_type);
8422                 }
8423         }
8424
8425         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
8426             !is_vmware_backdoor_opcode(ctxt)) {
8427                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
8428                 return 1;
8429         }
8430
8431         /*
8432          * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
8433          * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
8434          * The caller is responsible for updating interruptibility state and
8435          * injecting single-step #DBs.
8436          */
8437         if (emulation_type & EMULTYPE_SKIP) {
8438                 if (ctxt->mode != X86EMUL_MODE_PROT64)
8439                         ctxt->eip = (u32)ctxt->_eip;
8440                 else
8441                         ctxt->eip = ctxt->_eip;
8442
8443                 if (emulation_type & EMULTYPE_COMPLETE_USER_EXIT) {
8444                         r = 1;
8445                         goto writeback;
8446                 }
8447
8448                 kvm_rip_write(vcpu, ctxt->eip);
8449                 if (ctxt->eflags & X86_EFLAGS_RF)
8450                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
8451                 return 1;
8452         }
8453
8454         if (retry_instruction(ctxt, cr2_or_gpa, emulation_type))
8455                 return 1;
8456
8457         /* this is needed for vmware backdoor interface to work since it
8458            changes registers values  during IO operation */
8459         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
8460                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
8461                 emulator_invalidate_register_cache(ctxt);
8462         }
8463
8464 restart:
8465         if (emulation_type & EMULTYPE_PF) {
8466                 /* Save the faulting GPA (cr2) in the address field */
8467                 ctxt->exception.address = cr2_or_gpa;
8468
8469                 /* With shadow page tables, cr2 contains a GVA or nGPA. */
8470                 if (vcpu->arch.mmu->direct_map) {
8471                         ctxt->gpa_available = true;
8472                         ctxt->gpa_val = cr2_or_gpa;
8473                 }
8474         } else {
8475                 /* Sanitize the address out of an abundance of paranoia. */
8476                 ctxt->exception.address = 0;
8477         }
8478
8479         r = x86_emulate_insn(ctxt);
8480
8481         if (r == EMULATION_INTERCEPTED)
8482                 return 1;
8483
8484         if (r == EMULATION_FAILED) {
8485                 if (reexecute_instruction(vcpu, cr2_or_gpa, write_fault_to_spt,
8486                                         emulation_type))
8487                         return 1;
8488
8489                 return handle_emulation_failure(vcpu, emulation_type);
8490         }
8491
8492         if (ctxt->have_exception) {
8493                 r = 1;
8494                 if (inject_emulated_exception(vcpu))
8495                         return r;
8496         } else if (vcpu->arch.pio.count) {
8497                 if (!vcpu->arch.pio.in) {
8498                         /* FIXME: return into emulator if single-stepping.  */
8499                         vcpu->arch.pio.count = 0;
8500                 } else {
8501                         writeback = false;
8502                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
8503                 }
8504                 r = 0;
8505         } else if (vcpu->mmio_needed) {
8506                 ++vcpu->stat.mmio_exits;
8507
8508                 if (!vcpu->mmio_is_write)
8509                         writeback = false;
8510                 r = 0;
8511                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8512         } else if (vcpu->arch.complete_userspace_io) {
8513                 writeback = false;
8514                 r = 0;
8515         } else if (r == EMULATION_RESTART)
8516                 goto restart;
8517         else
8518                 r = 1;
8519
8520 writeback:
8521         if (writeback) {
8522                 unsigned long rflags = static_call(kvm_x86_get_rflags)(vcpu);
8523                 toggle_interruptibility(vcpu, ctxt->interruptibility);
8524                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8525                 if (!ctxt->have_exception ||
8526                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
8527                         kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_INSTRUCTIONS);
8528                         if (ctxt->is_branch)
8529                                 kvm_pmu_trigger_event(vcpu, PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
8530                         kvm_rip_write(vcpu, ctxt->eip);
8531                         if (r && (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
8532                                 r = kvm_vcpu_do_singlestep(vcpu);
8533                         static_call_cond(kvm_x86_update_emulated_instruction)(vcpu);
8534                         __kvm_set_rflags(vcpu, ctxt->eflags);
8535                 }
8536
8537                 /*
8538                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
8539                  * do nothing, and it will be requested again as soon as
8540                  * the shadow expires.  But we still need to check here,
8541                  * because POPF has no interrupt shadow.
8542                  */
8543                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
8544                         kvm_make_request(KVM_REQ_EVENT, vcpu);
8545         } else
8546                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
8547
8548         return r;
8549 }
8550
8551 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
8552 {
8553         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
8554 }
8555 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
8556
8557 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
8558                                         void *insn, int insn_len)
8559 {
8560         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
8561 }
8562 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
8563
8564 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
8565 {
8566         vcpu->arch.pio.count = 0;
8567         return 1;
8568 }
8569
8570 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
8571 {
8572         vcpu->arch.pio.count = 0;
8573
8574         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
8575                 return 1;
8576
8577         return kvm_skip_emulated_instruction(vcpu);
8578 }
8579
8580 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
8581                             unsigned short port)
8582 {
8583         unsigned long val = kvm_rax_read(vcpu);
8584         int ret = emulator_pio_out(vcpu, size, port, &val, 1);
8585
8586         if (ret)
8587                 return ret;
8588
8589         /*
8590          * Workaround userspace that relies on old KVM behavior of %rip being
8591          * incremented prior to exiting to userspace to handle "OUT 0x7e".
8592          */
8593         if (port == 0x7e &&
8594             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
8595                 vcpu->arch.complete_userspace_io =
8596                         complete_fast_pio_out_port_0x7e;
8597                 kvm_skip_emulated_instruction(vcpu);
8598         } else {
8599                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8600                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
8601         }
8602         return 0;
8603 }
8604
8605 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
8606 {
8607         unsigned long val;
8608
8609         /* We should only ever be called with arch.pio.count equal to 1 */
8610         BUG_ON(vcpu->arch.pio.count != 1);
8611
8612         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
8613                 vcpu->arch.pio.count = 0;
8614                 return 1;
8615         }
8616
8617         /* For size less than 4 we merge, else we zero extend */
8618         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
8619
8620         /*
8621          * Since vcpu->arch.pio.count == 1 let emulator_pio_in perform
8622          * the copy and tracing
8623          */
8624         emulator_pio_in(vcpu, vcpu->arch.pio.size, vcpu->arch.pio.port, &val, 1);
8625         kvm_rax_write(vcpu, val);
8626
8627         return kvm_skip_emulated_instruction(vcpu);
8628 }
8629
8630 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
8631                            unsigned short port)
8632 {
8633         unsigned long val;
8634         int ret;
8635
8636         /* For size less than 4 we merge, else we zero extend */
8637         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
8638
8639         ret = emulator_pio_in(vcpu, size, port, &val, 1);
8640         if (ret) {
8641                 kvm_rax_write(vcpu, val);
8642                 return ret;
8643         }
8644
8645         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
8646         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
8647
8648         return 0;
8649 }
8650
8651 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
8652 {
8653         int ret;
8654
8655         if (in)
8656                 ret = kvm_fast_pio_in(vcpu, size, port);
8657         else
8658                 ret = kvm_fast_pio_out(vcpu, size, port);
8659         return ret && kvm_skip_emulated_instruction(vcpu);
8660 }
8661 EXPORT_SYMBOL_GPL(kvm_fast_pio);
8662
8663 static int kvmclock_cpu_down_prep(unsigned int cpu)
8664 {
8665         __this_cpu_write(cpu_tsc_khz, 0);
8666         return 0;
8667 }
8668
8669 static void tsc_khz_changed(void *data)
8670 {
8671         struct cpufreq_freqs *freq = data;
8672         unsigned long khz = 0;
8673
8674         if (data)
8675                 khz = freq->new;
8676         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8677                 khz = cpufreq_quick_get(raw_smp_processor_id());
8678         if (!khz)
8679                 khz = tsc_khz;
8680         __this_cpu_write(cpu_tsc_khz, khz);
8681 }
8682
8683 #ifdef CONFIG_X86_64
8684 static void kvm_hyperv_tsc_notifier(void)
8685 {
8686         struct kvm *kvm;
8687         int cpu;
8688
8689         mutex_lock(&kvm_lock);
8690         list_for_each_entry(kvm, &vm_list, vm_list)
8691                 kvm_make_mclock_inprogress_request(kvm);
8692
8693         /* no guest entries from this point */
8694         hyperv_stop_tsc_emulation();
8695
8696         /* TSC frequency always matches when on Hyper-V */
8697         for_each_present_cpu(cpu)
8698                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
8699         kvm_max_guest_tsc_khz = tsc_khz;
8700
8701         list_for_each_entry(kvm, &vm_list, vm_list) {
8702                 __kvm_start_pvclock_update(kvm);
8703                 pvclock_update_vm_gtod_copy(kvm);
8704                 kvm_end_pvclock_update(kvm);
8705         }
8706
8707         mutex_unlock(&kvm_lock);
8708 }
8709 #endif
8710
8711 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
8712 {
8713         struct kvm *kvm;
8714         struct kvm_vcpu *vcpu;
8715         int send_ipi = 0;
8716         unsigned long i;
8717
8718         /*
8719          * We allow guests to temporarily run on slowing clocks,
8720          * provided we notify them after, or to run on accelerating
8721          * clocks, provided we notify them before.  Thus time never
8722          * goes backwards.
8723          *
8724          * However, we have a problem.  We can't atomically update
8725          * the frequency of a given CPU from this function; it is
8726          * merely a notifier, which can be called from any CPU.
8727          * Changing the TSC frequency at arbitrary points in time
8728          * requires a recomputation of local variables related to
8729          * the TSC for each VCPU.  We must flag these local variables
8730          * to be updated and be sure the update takes place with the
8731          * new frequency before any guests proceed.
8732          *
8733          * Unfortunately, the combination of hotplug CPU and frequency
8734          * change creates an intractable locking scenario; the order
8735          * of when these callouts happen is undefined with respect to
8736          * CPU hotplug, and they can race with each other.  As such,
8737          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
8738          * undefined; you can actually have a CPU frequency change take
8739          * place in between the computation of X and the setting of the
8740          * variable.  To protect against this problem, all updates of
8741          * the per_cpu tsc_khz variable are done in an interrupt
8742          * protected IPI, and all callers wishing to update the value
8743          * must wait for a synchronous IPI to complete (which is trivial
8744          * if the caller is on the CPU already).  This establishes the
8745          * necessary total order on variable updates.
8746          *
8747          * Note that because a guest time update may take place
8748          * anytime after the setting of the VCPU's request bit, the
8749          * correct TSC value must be set before the request.  However,
8750          * to ensure the update actually makes it to any guest which
8751          * starts running in hardware virtualization between the set
8752          * and the acquisition of the spinlock, we must also ping the
8753          * CPU after setting the request bit.
8754          *
8755          */
8756
8757         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8758
8759         mutex_lock(&kvm_lock);
8760         list_for_each_entry(kvm, &vm_list, vm_list) {
8761                 kvm_for_each_vcpu(i, vcpu, kvm) {
8762                         if (vcpu->cpu != cpu)
8763                                 continue;
8764                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8765                         if (vcpu->cpu != raw_smp_processor_id())
8766                                 send_ipi = 1;
8767                 }
8768         }
8769         mutex_unlock(&kvm_lock);
8770
8771         if (freq->old < freq->new && send_ipi) {
8772                 /*
8773                  * We upscale the frequency.  Must make the guest
8774                  * doesn't see old kvmclock values while running with
8775                  * the new frequency, otherwise we risk the guest sees
8776                  * time go backwards.
8777                  *
8778                  * In case we update the frequency for another cpu
8779                  * (which might be in guest context) send an interrupt
8780                  * to kick the cpu out of guest context.  Next time
8781                  * guest context is entered kvmclock will be updated,
8782                  * so the guest will not see stale values.
8783                  */
8784                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
8785         }
8786 }
8787
8788 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
8789                                      void *data)
8790 {
8791         struct cpufreq_freqs *freq = data;
8792         int cpu;
8793
8794         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
8795                 return 0;
8796         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
8797                 return 0;
8798
8799         for_each_cpu(cpu, freq->policy->cpus)
8800                 __kvmclock_cpufreq_notifier(freq, cpu);
8801
8802         return 0;
8803 }
8804
8805 static struct notifier_block kvmclock_cpufreq_notifier_block = {
8806         .notifier_call  = kvmclock_cpufreq_notifier
8807 };
8808
8809 static int kvmclock_cpu_online(unsigned int cpu)
8810 {
8811         tsc_khz_changed(NULL);
8812         return 0;
8813 }
8814
8815 static void kvm_timer_init(void)
8816 {
8817         max_tsc_khz = tsc_khz;
8818
8819         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8820 #ifdef CONFIG_CPU_FREQ
8821                 struct cpufreq_policy *policy;
8822                 int cpu;
8823
8824                 cpu = get_cpu();
8825                 policy = cpufreq_cpu_get(cpu);
8826                 if (policy) {
8827                         if (policy->cpuinfo.max_freq)
8828                                 max_tsc_khz = policy->cpuinfo.max_freq;
8829                         cpufreq_cpu_put(policy);
8830                 }
8831                 put_cpu();
8832 #endif
8833                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
8834                                           CPUFREQ_TRANSITION_NOTIFIER);
8835         }
8836
8837         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
8838                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
8839 }
8840
8841 #ifdef CONFIG_X86_64
8842 static void pvclock_gtod_update_fn(struct work_struct *work)
8843 {
8844         struct kvm *kvm;
8845         struct kvm_vcpu *vcpu;
8846         unsigned long i;
8847
8848         mutex_lock(&kvm_lock);
8849         list_for_each_entry(kvm, &vm_list, vm_list)
8850                 kvm_for_each_vcpu(i, vcpu, kvm)
8851                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8852         atomic_set(&kvm_guest_has_master_clock, 0);
8853         mutex_unlock(&kvm_lock);
8854 }
8855
8856 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
8857
8858 /*
8859  * Indirection to move queue_work() out of the tk_core.seq write held
8860  * region to prevent possible deadlocks against time accessors which
8861  * are invoked with work related locks held.
8862  */
8863 static void pvclock_irq_work_fn(struct irq_work *w)
8864 {
8865         queue_work(system_long_wq, &pvclock_gtod_work);
8866 }
8867
8868 static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn);
8869
8870 /*
8871  * Notification about pvclock gtod data update.
8872  */
8873 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
8874                                void *priv)
8875 {
8876         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
8877         struct timekeeper *tk = priv;
8878
8879         update_pvclock_gtod(tk);
8880
8881         /*
8882          * Disable master clock if host does not trust, or does not use,
8883          * TSC based clocksource. Delegate queue_work() to irq_work as
8884          * this is invoked with tk_core.seq write held.
8885          */
8886         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
8887             atomic_read(&kvm_guest_has_master_clock) != 0)
8888                 irq_work_queue(&pvclock_irq_work);
8889         return 0;
8890 }
8891
8892 static struct notifier_block pvclock_gtod_notifier = {
8893         .notifier_call = pvclock_gtod_notify,
8894 };
8895 #endif
8896
8897 int kvm_arch_init(void *opaque)
8898 {
8899         struct kvm_x86_init_ops *ops = opaque;
8900         int r;
8901
8902         if (kvm_x86_ops.hardware_enable) {
8903                 pr_err("kvm: already loaded vendor module '%s'\n", kvm_x86_ops.name);
8904                 r = -EEXIST;
8905                 goto out;
8906         }
8907
8908         if (!ops->cpu_has_kvm_support()) {
8909                 pr_err_ratelimited("kvm: no hardware support for '%s'\n",
8910                                    ops->runtime_ops->name);
8911                 r = -EOPNOTSUPP;
8912                 goto out;
8913         }
8914         if (ops->disabled_by_bios()) {
8915                 pr_err_ratelimited("kvm: support for '%s' disabled by bios\n",
8916                                    ops->runtime_ops->name);
8917                 r = -EOPNOTSUPP;
8918                 goto out;
8919         }
8920
8921         /*
8922          * KVM explicitly assumes that the guest has an FPU and
8923          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
8924          * vCPU's FPU state as a fxregs_state struct.
8925          */
8926         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
8927                 printk(KERN_ERR "kvm: inadequate fpu\n");
8928                 r = -EOPNOTSUPP;
8929                 goto out;
8930         }
8931
8932         if (IS_ENABLED(CONFIG_PREEMPT_RT) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
8933                 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
8934                 r = -EOPNOTSUPP;
8935                 goto out;
8936         }
8937
8938         r = -ENOMEM;
8939
8940         x86_emulator_cache = kvm_alloc_emulator_cache();
8941         if (!x86_emulator_cache) {
8942                 pr_err("kvm: failed to allocate cache for x86 emulator\n");
8943                 goto out;
8944         }
8945
8946         user_return_msrs = alloc_percpu(struct kvm_user_return_msrs);
8947         if (!user_return_msrs) {
8948                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_user_return_msrs\n");
8949                 goto out_free_x86_emulator_cache;
8950         }
8951         kvm_nr_uret_msrs = 0;
8952
8953         r = kvm_mmu_module_init();
8954         if (r)
8955                 goto out_free_percpu;
8956
8957         kvm_timer_init();
8958
8959         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
8960                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
8961                 supported_xcr0 = host_xcr0 & KVM_SUPPORTED_XCR0;
8962         }
8963
8964         if (pi_inject_timer == -1)
8965                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
8966 #ifdef CONFIG_X86_64
8967         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
8968
8969         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8970                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
8971 #endif
8972
8973         return 0;
8974
8975 out_free_percpu:
8976         free_percpu(user_return_msrs);
8977 out_free_x86_emulator_cache:
8978         kmem_cache_destroy(x86_emulator_cache);
8979 out:
8980         return r;
8981 }
8982
8983 void kvm_arch_exit(void)
8984 {
8985 #ifdef CONFIG_X86_64
8986         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
8987                 clear_hv_tscchange_cb();
8988 #endif
8989         kvm_lapic_exit();
8990
8991         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
8992                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
8993                                             CPUFREQ_TRANSITION_NOTIFIER);
8994         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
8995 #ifdef CONFIG_X86_64
8996         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
8997         irq_work_sync(&pvclock_irq_work);
8998         cancel_work_sync(&pvclock_gtod_work);
8999 #endif
9000         kvm_x86_ops.hardware_enable = NULL;
9001         kvm_mmu_module_exit();
9002         free_percpu(user_return_msrs);
9003         kmem_cache_destroy(x86_emulator_cache);
9004 #ifdef CONFIG_KVM_XEN
9005         static_key_deferred_flush(&kvm_xen_enabled);
9006         WARN_ON(static_branch_unlikely(&kvm_xen_enabled.key));
9007 #endif
9008 }
9009
9010 static int __kvm_emulate_halt(struct kvm_vcpu *vcpu, int state, int reason)
9011 {
9012         /*
9013          * The vCPU has halted, e.g. executed HLT.  Update the run state if the
9014          * local APIC is in-kernel, the run loop will detect the non-runnable
9015          * state and halt the vCPU.  Exit to userspace if the local APIC is
9016          * managed by userspace, in which case userspace is responsible for
9017          * handling wake events.
9018          */
9019         ++vcpu->stat.halt_exits;
9020         if (lapic_in_kernel(vcpu)) {
9021                 vcpu->arch.mp_state = state;
9022                 return 1;
9023         } else {
9024                 vcpu->run->exit_reason = reason;
9025                 return 0;
9026         }
9027 }
9028
9029 int kvm_emulate_halt_noskip(struct kvm_vcpu *vcpu)
9030 {
9031         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_HALTED, KVM_EXIT_HLT);
9032 }
9033 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip);
9034
9035 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
9036 {
9037         int ret = kvm_skip_emulated_instruction(vcpu);
9038         /*
9039          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9040          * KVM_EXIT_DEBUG here.
9041          */
9042         return kvm_emulate_halt_noskip(vcpu) && ret;
9043 }
9044 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
9045
9046 int kvm_emulate_ap_reset_hold(struct kvm_vcpu *vcpu)
9047 {
9048         int ret = kvm_skip_emulated_instruction(vcpu);
9049
9050         return __kvm_emulate_halt(vcpu, KVM_MP_STATE_AP_RESET_HOLD,
9051                                         KVM_EXIT_AP_RESET_HOLD) && ret;
9052 }
9053 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold);
9054
9055 #ifdef CONFIG_X86_64
9056 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
9057                                 unsigned long clock_type)
9058 {
9059         struct kvm_clock_pairing clock_pairing;
9060         struct timespec64 ts;
9061         u64 cycle;
9062         int ret;
9063
9064         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
9065                 return -KVM_EOPNOTSUPP;
9066
9067         /*
9068          * When tsc is in permanent catchup mode guests won't be able to use
9069          * pvclock_read_retry loop to get consistent view of pvclock
9070          */
9071         if (vcpu->arch.tsc_always_catchup)
9072                 return -KVM_EOPNOTSUPP;
9073
9074         if (!kvm_get_walltime_and_clockread(&ts, &cycle))
9075                 return -KVM_EOPNOTSUPP;
9076
9077         clock_pairing.sec = ts.tv_sec;
9078         clock_pairing.nsec = ts.tv_nsec;
9079         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
9080         clock_pairing.flags = 0;
9081         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
9082
9083         ret = 0;
9084         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
9085                             sizeof(struct kvm_clock_pairing)))
9086                 ret = -KVM_EFAULT;
9087
9088         return ret;
9089 }
9090 #endif
9091
9092 /*
9093  * kvm_pv_kick_cpu_op:  Kick a vcpu.
9094  *
9095  * @apicid - apicid of vcpu to be kicked.
9096  */
9097 static void kvm_pv_kick_cpu_op(struct kvm *kvm, int apicid)
9098 {
9099         struct kvm_lapic_irq lapic_irq;
9100
9101         lapic_irq.shorthand = APIC_DEST_NOSHORT;
9102         lapic_irq.dest_mode = APIC_DEST_PHYSICAL;
9103         lapic_irq.level = 0;
9104         lapic_irq.dest_id = apicid;
9105         lapic_irq.msi_redir_hint = false;
9106
9107         lapic_irq.delivery_mode = APIC_DM_REMRD;
9108         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
9109 }
9110
9111 bool kvm_apicv_activated(struct kvm *kvm)
9112 {
9113         return (READ_ONCE(kvm->arch.apicv_inhibit_reasons) == 0);
9114 }
9115 EXPORT_SYMBOL_GPL(kvm_apicv_activated);
9116
9117
9118 static void set_or_clear_apicv_inhibit(unsigned long *inhibits,
9119                                        enum kvm_apicv_inhibit reason, bool set)
9120 {
9121         if (set)
9122                 __set_bit(reason, inhibits);
9123         else
9124                 __clear_bit(reason, inhibits);
9125
9126         trace_kvm_apicv_inhibit_changed(reason, set, *inhibits);
9127 }
9128
9129 static void kvm_apicv_init(struct kvm *kvm)
9130 {
9131         unsigned long *inhibits = &kvm->arch.apicv_inhibit_reasons;
9132
9133         init_rwsem(&kvm->arch.apicv_update_lock);
9134
9135         set_or_clear_apicv_inhibit(inhibits, APICV_INHIBIT_REASON_ABSENT, true);
9136
9137         if (!enable_apicv)
9138                 set_or_clear_apicv_inhibit(inhibits,
9139                                            APICV_INHIBIT_REASON_ABSENT, true);
9140 }
9141
9142 static void kvm_sched_yield(struct kvm_vcpu *vcpu, unsigned long dest_id)
9143 {
9144         struct kvm_vcpu *target = NULL;
9145         struct kvm_apic_map *map;
9146
9147         vcpu->stat.directed_yield_attempted++;
9148
9149         if (single_task_running())
9150                 goto no_yield;
9151
9152         rcu_read_lock();
9153         map = rcu_dereference(vcpu->kvm->arch.apic_map);
9154
9155         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
9156                 target = map->phys_map[dest_id]->vcpu;
9157
9158         rcu_read_unlock();
9159
9160         if (!target || !READ_ONCE(target->ready))
9161                 goto no_yield;
9162
9163         /* Ignore requests to yield to self */
9164         if (vcpu == target)
9165                 goto no_yield;
9166
9167         if (kvm_vcpu_yield_to(target) <= 0)
9168                 goto no_yield;
9169
9170         vcpu->stat.directed_yield_successful++;
9171
9172 no_yield:
9173         return;
9174 }
9175
9176 static int complete_hypercall_exit(struct kvm_vcpu *vcpu)
9177 {
9178         u64 ret = vcpu->run->hypercall.ret;
9179
9180         if (!is_64_bit_mode(vcpu))
9181                 ret = (u32)ret;
9182         kvm_rax_write(vcpu, ret);
9183         ++vcpu->stat.hypercalls;
9184         return kvm_skip_emulated_instruction(vcpu);
9185 }
9186
9187 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
9188 {
9189         unsigned long nr, a0, a1, a2, a3, ret;
9190         int op_64_bit;
9191
9192         if (kvm_xen_hypercall_enabled(vcpu->kvm))
9193                 return kvm_xen_hypercall(vcpu);
9194
9195         if (kvm_hv_hypercall_enabled(vcpu))
9196                 return kvm_hv_hypercall(vcpu);
9197
9198         nr = kvm_rax_read(vcpu);
9199         a0 = kvm_rbx_read(vcpu);
9200         a1 = kvm_rcx_read(vcpu);
9201         a2 = kvm_rdx_read(vcpu);
9202         a3 = kvm_rsi_read(vcpu);
9203
9204         trace_kvm_hypercall(nr, a0, a1, a2, a3);
9205
9206         op_64_bit = is_64_bit_hypercall(vcpu);
9207         if (!op_64_bit) {
9208                 nr &= 0xFFFFFFFF;
9209                 a0 &= 0xFFFFFFFF;
9210                 a1 &= 0xFFFFFFFF;
9211                 a2 &= 0xFFFFFFFF;
9212                 a3 &= 0xFFFFFFFF;
9213         }
9214
9215         if (static_call(kvm_x86_get_cpl)(vcpu) != 0) {
9216                 ret = -KVM_EPERM;
9217                 goto out;
9218         }
9219
9220         ret = -KVM_ENOSYS;
9221
9222         switch (nr) {
9223         case KVM_HC_VAPIC_POLL_IRQ:
9224                 ret = 0;
9225                 break;
9226         case KVM_HC_KICK_CPU:
9227                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_UNHALT))
9228                         break;
9229
9230                 kvm_pv_kick_cpu_op(vcpu->kvm, a1);
9231                 kvm_sched_yield(vcpu, a1);
9232                 ret = 0;
9233                 break;
9234 #ifdef CONFIG_X86_64
9235         case KVM_HC_CLOCK_PAIRING:
9236                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
9237                 break;
9238 #endif
9239         case KVM_HC_SEND_IPI:
9240                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SEND_IPI))
9241                         break;
9242
9243                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
9244                 break;
9245         case KVM_HC_SCHED_YIELD:
9246                 if (!guest_pv_has(vcpu, KVM_FEATURE_PV_SCHED_YIELD))
9247                         break;
9248
9249                 kvm_sched_yield(vcpu, a0);
9250                 ret = 0;
9251                 break;
9252         case KVM_HC_MAP_GPA_RANGE: {
9253                 u64 gpa = a0, npages = a1, attrs = a2;
9254
9255                 ret = -KVM_ENOSYS;
9256                 if (!(vcpu->kvm->arch.hypercall_exit_enabled & (1 << KVM_HC_MAP_GPA_RANGE)))
9257                         break;
9258
9259                 if (!PAGE_ALIGNED(gpa) || !npages ||
9260                     gpa_to_gfn(gpa) + npages <= gpa_to_gfn(gpa)) {
9261                         ret = -KVM_EINVAL;
9262                         break;
9263                 }
9264
9265                 vcpu->run->exit_reason        = KVM_EXIT_HYPERCALL;
9266                 vcpu->run->hypercall.nr       = KVM_HC_MAP_GPA_RANGE;
9267                 vcpu->run->hypercall.args[0]  = gpa;
9268                 vcpu->run->hypercall.args[1]  = npages;
9269                 vcpu->run->hypercall.args[2]  = attrs;
9270                 vcpu->run->hypercall.longmode = op_64_bit;
9271                 vcpu->arch.complete_userspace_io = complete_hypercall_exit;
9272                 return 0;
9273         }
9274         default:
9275                 ret = -KVM_ENOSYS;
9276                 break;
9277         }
9278 out:
9279         if (!op_64_bit)
9280                 ret = (u32)ret;
9281         kvm_rax_write(vcpu, ret);
9282
9283         ++vcpu->stat.hypercalls;
9284         return kvm_skip_emulated_instruction(vcpu);
9285 }
9286 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
9287
9288 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
9289 {
9290         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
9291         char instruction[3];
9292         unsigned long rip = kvm_rip_read(vcpu);
9293
9294         /*
9295          * If the quirk is disabled, synthesize a #UD and let the guest pick up
9296          * the pieces.
9297          */
9298         if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_FIX_HYPERCALL_INSN)) {
9299                 ctxt->exception.error_code_valid = false;
9300                 ctxt->exception.vector = UD_VECTOR;
9301                 ctxt->have_exception = true;
9302                 return X86EMUL_PROPAGATE_FAULT;
9303         }
9304
9305         static_call(kvm_x86_patch_hypercall)(vcpu, instruction);
9306
9307         return emulator_write_emulated(ctxt, rip, instruction, 3,
9308                 &ctxt->exception);
9309 }
9310
9311 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
9312 {
9313         return vcpu->run->request_interrupt_window &&
9314                 likely(!pic_in_kernel(vcpu->kvm));
9315 }
9316
9317 /* Called within kvm->srcu read side.  */
9318 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
9319 {
9320         struct kvm_run *kvm_run = vcpu->run;
9321
9322         kvm_run->if_flag = static_call(kvm_x86_get_if_flag)(vcpu);
9323         kvm_run->cr8 = kvm_get_cr8(vcpu);
9324         kvm_run->apic_base = kvm_get_apic_base(vcpu);
9325
9326         kvm_run->ready_for_interrupt_injection =
9327                 pic_in_kernel(vcpu->kvm) ||
9328                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
9329
9330         if (is_smm(vcpu))
9331                 kvm_run->flags |= KVM_RUN_X86_SMM;
9332 }
9333
9334 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
9335 {
9336         int max_irr, tpr;
9337
9338         if (!kvm_x86_ops.update_cr8_intercept)
9339                 return;
9340
9341         if (!lapic_in_kernel(vcpu))
9342                 return;
9343
9344         if (vcpu->arch.apicv_active)
9345                 return;
9346
9347         if (!vcpu->arch.apic->vapic_addr)
9348                 max_irr = kvm_lapic_find_highest_irr(vcpu);
9349         else
9350                 max_irr = -1;
9351
9352         if (max_irr != -1)
9353                 max_irr >>= 4;
9354
9355         tpr = kvm_lapic_get_cr8(vcpu);
9356
9357         static_call(kvm_x86_update_cr8_intercept)(vcpu, tpr, max_irr);
9358 }
9359
9360
9361 int kvm_check_nested_events(struct kvm_vcpu *vcpu)
9362 {
9363         if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
9364                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
9365                 return 1;
9366         }
9367
9368         return kvm_x86_ops.nested_ops->check_events(vcpu);
9369 }
9370
9371 static void kvm_inject_exception(struct kvm_vcpu *vcpu)
9372 {
9373         if (vcpu->arch.exception.error_code && !is_protmode(vcpu))
9374                 vcpu->arch.exception.error_code = false;
9375         static_call(kvm_x86_queue_exception)(vcpu);
9376 }
9377
9378 static int inject_pending_event(struct kvm_vcpu *vcpu, bool *req_immediate_exit)
9379 {
9380         int r;
9381         bool can_inject = true;
9382
9383         /* try to reinject previous events if any */
9384
9385         if (vcpu->arch.exception.injected) {
9386                 kvm_inject_exception(vcpu);
9387                 can_inject = false;
9388         }
9389         /*
9390          * Do not inject an NMI or interrupt if there is a pending
9391          * exception.  Exceptions and interrupts are recognized at
9392          * instruction boundaries, i.e. the start of an instruction.
9393          * Trap-like exceptions, e.g. #DB, have higher priority than
9394          * NMIs and interrupts, i.e. traps are recognized before an
9395          * NMI/interrupt that's pending on the same instruction.
9396          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
9397          * priority, but are only generated (pended) during instruction
9398          * execution, i.e. a pending fault-like exception means the
9399          * fault occurred on the *previous* instruction and must be
9400          * serviced prior to recognizing any new events in order to
9401          * fully complete the previous instruction.
9402          */
9403         else if (!vcpu->arch.exception.pending) {
9404                 if (vcpu->arch.nmi_injected) {
9405                         static_call(kvm_x86_inject_nmi)(vcpu);
9406                         can_inject = false;
9407                 } else if (vcpu->arch.interrupt.injected) {
9408                         static_call(kvm_x86_inject_irq)(vcpu);
9409                         can_inject = false;
9410                 }
9411         }
9412
9413         WARN_ON_ONCE(vcpu->arch.exception.injected &&
9414                      vcpu->arch.exception.pending);
9415
9416         /*
9417          * Call check_nested_events() even if we reinjected a previous event
9418          * in order for caller to determine if it should require immediate-exit
9419          * from L2 to L1 due to pending L1 events which require exit
9420          * from L2 to L1.
9421          */
9422         if (is_guest_mode(vcpu)) {
9423                 r = kvm_check_nested_events(vcpu);
9424                 if (r < 0)
9425                         goto out;
9426         }
9427
9428         /* try to inject new event if pending */
9429         if (vcpu->arch.exception.pending) {
9430                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
9431                                         vcpu->arch.exception.has_error_code,
9432                                         vcpu->arch.exception.error_code);
9433
9434                 vcpu->arch.exception.pending = false;
9435                 vcpu->arch.exception.injected = true;
9436
9437                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
9438                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
9439                                              X86_EFLAGS_RF);
9440
9441                 if (vcpu->arch.exception.nr == DB_VECTOR) {
9442                         kvm_deliver_exception_payload(vcpu);
9443                         if (vcpu->arch.dr7 & DR7_GD) {
9444                                 vcpu->arch.dr7 &= ~DR7_GD;
9445                                 kvm_update_dr7(vcpu);
9446                         }
9447                 }
9448
9449                 kvm_inject_exception(vcpu);
9450                 can_inject = false;
9451         }
9452
9453         /* Don't inject interrupts if the user asked to avoid doing so */
9454         if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ)
9455                 return 0;
9456
9457         /*
9458          * Finally, inject interrupt events.  If an event cannot be injected
9459          * due to architectural conditions (e.g. IF=0) a window-open exit
9460          * will re-request KVM_REQ_EVENT.  Sometimes however an event is pending
9461          * and can architecturally be injected, but we cannot do it right now:
9462          * an interrupt could have arrived just now and we have to inject it
9463          * as a vmexit, or there could already an event in the queue, which is
9464          * indicated by can_inject.  In that case we request an immediate exit
9465          * in order to make progress and get back here for another iteration.
9466          * The kvm_x86_ops hooks communicate this by returning -EBUSY.
9467          */
9468         if (vcpu->arch.smi_pending) {
9469                 r = can_inject ? static_call(kvm_x86_smi_allowed)(vcpu, true) : -EBUSY;
9470                 if (r < 0)
9471                         goto out;
9472                 if (r) {
9473                         vcpu->arch.smi_pending = false;
9474                         ++vcpu->arch.smi_count;
9475                         enter_smm(vcpu);
9476                         can_inject = false;
9477                 } else
9478                         static_call(kvm_x86_enable_smi_window)(vcpu);
9479         }
9480
9481         if (vcpu->arch.nmi_pending) {
9482                 r = can_inject ? static_call(kvm_x86_nmi_allowed)(vcpu, true) : -EBUSY;
9483                 if (r < 0)
9484                         goto out;
9485                 if (r) {
9486                         --vcpu->arch.nmi_pending;
9487                         vcpu->arch.nmi_injected = true;
9488                         static_call(kvm_x86_inject_nmi)(vcpu);
9489                         can_inject = false;
9490                         WARN_ON(static_call(kvm_x86_nmi_allowed)(vcpu, true) < 0);
9491                 }
9492                 if (vcpu->arch.nmi_pending)
9493                         static_call(kvm_x86_enable_nmi_window)(vcpu);
9494         }
9495
9496         if (kvm_cpu_has_injectable_intr(vcpu)) {
9497                 r = can_inject ? static_call(kvm_x86_interrupt_allowed)(vcpu, true) : -EBUSY;
9498                 if (r < 0)
9499                         goto out;
9500                 if (r) {
9501                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu), false);
9502                         static_call(kvm_x86_inject_irq)(vcpu);
9503                         WARN_ON(static_call(kvm_x86_interrupt_allowed)(vcpu, true) < 0);
9504                 }
9505                 if (kvm_cpu_has_injectable_intr(vcpu))
9506                         static_call(kvm_x86_enable_irq_window)(vcpu);
9507         }
9508
9509         if (is_guest_mode(vcpu) &&
9510             kvm_x86_ops.nested_ops->hv_timer_pending &&
9511             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
9512                 *req_immediate_exit = true;
9513
9514         WARN_ON(vcpu->arch.exception.pending);
9515         return 0;
9516
9517 out:
9518         if (r == -EBUSY) {
9519                 *req_immediate_exit = true;
9520                 r = 0;
9521         }
9522         return r;
9523 }
9524
9525 static void process_nmi(struct kvm_vcpu *vcpu)
9526 {
9527         unsigned limit = 2;
9528
9529         /*
9530          * x86 is limited to one NMI running, and one NMI pending after it.
9531          * If an NMI is already in progress, limit further NMIs to just one.
9532          * Otherwise, allow two (and we'll inject the first one immediately).
9533          */
9534         if (static_call(kvm_x86_get_nmi_mask)(vcpu) || vcpu->arch.nmi_injected)
9535                 limit = 1;
9536
9537         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
9538         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
9539         kvm_make_request(KVM_REQ_EVENT, vcpu);
9540 }
9541
9542 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
9543 {
9544         u32 flags = 0;
9545         flags |= seg->g       << 23;
9546         flags |= seg->db      << 22;
9547         flags |= seg->l       << 21;
9548         flags |= seg->avl     << 20;
9549         flags |= seg->present << 15;
9550         flags |= seg->dpl     << 13;
9551         flags |= seg->s       << 12;
9552         flags |= seg->type    << 8;
9553         return flags;
9554 }
9555
9556 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
9557 {
9558         struct kvm_segment seg;
9559         int offset;
9560
9561         kvm_get_segment(vcpu, &seg, n);
9562         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
9563
9564         if (n < 3)
9565                 offset = 0x7f84 + n * 12;
9566         else
9567                 offset = 0x7f2c + (n - 3) * 12;
9568
9569         put_smstate(u32, buf, offset + 8, seg.base);
9570         put_smstate(u32, buf, offset + 4, seg.limit);
9571         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
9572 }
9573
9574 #ifdef CONFIG_X86_64
9575 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
9576 {
9577         struct kvm_segment seg;
9578         int offset;
9579         u16 flags;
9580
9581         kvm_get_segment(vcpu, &seg, n);
9582         offset = 0x7e00 + n * 16;
9583
9584         flags = enter_smm_get_segment_flags(&seg) >> 8;
9585         put_smstate(u16, buf, offset, seg.selector);
9586         put_smstate(u16, buf, offset + 2, flags);
9587         put_smstate(u32, buf, offset + 4, seg.limit);
9588         put_smstate(u64, buf, offset + 8, seg.base);
9589 }
9590 #endif
9591
9592 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
9593 {
9594         struct desc_ptr dt;
9595         struct kvm_segment seg;
9596         unsigned long val;
9597         int i;
9598
9599         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
9600         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
9601         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
9602         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
9603
9604         for (i = 0; i < 8; i++)
9605                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read_raw(vcpu, i));
9606
9607         kvm_get_dr(vcpu, 6, &val);
9608         put_smstate(u32, buf, 0x7fcc, (u32)val);
9609         kvm_get_dr(vcpu, 7, &val);
9610         put_smstate(u32, buf, 0x7fc8, (u32)val);
9611
9612         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9613         put_smstate(u32, buf, 0x7fc4, seg.selector);
9614         put_smstate(u32, buf, 0x7f64, seg.base);
9615         put_smstate(u32, buf, 0x7f60, seg.limit);
9616         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
9617
9618         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9619         put_smstate(u32, buf, 0x7fc0, seg.selector);
9620         put_smstate(u32, buf, 0x7f80, seg.base);
9621         put_smstate(u32, buf, 0x7f7c, seg.limit);
9622         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
9623
9624         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9625         put_smstate(u32, buf, 0x7f74, dt.address);
9626         put_smstate(u32, buf, 0x7f70, dt.size);
9627
9628         static_call(kvm_x86_get_idt)(vcpu, &dt);
9629         put_smstate(u32, buf, 0x7f58, dt.address);
9630         put_smstate(u32, buf, 0x7f54, dt.size);
9631
9632         for (i = 0; i < 6; i++)
9633                 enter_smm_save_seg_32(vcpu, buf, i);
9634
9635         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
9636
9637         /* revision id */
9638         put_smstate(u32, buf, 0x7efc, 0x00020000);
9639         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
9640 }
9641
9642 #ifdef CONFIG_X86_64
9643 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
9644 {
9645         struct desc_ptr dt;
9646         struct kvm_segment seg;
9647         unsigned long val;
9648         int i;
9649
9650         for (i = 0; i < 16; i++)
9651                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read_raw(vcpu, i));
9652
9653         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
9654         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
9655
9656         kvm_get_dr(vcpu, 6, &val);
9657         put_smstate(u64, buf, 0x7f68, val);
9658         kvm_get_dr(vcpu, 7, &val);
9659         put_smstate(u64, buf, 0x7f60, val);
9660
9661         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
9662         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
9663         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
9664
9665         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
9666
9667         /* revision id */
9668         put_smstate(u32, buf, 0x7efc, 0x00020064);
9669
9670         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
9671
9672         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
9673         put_smstate(u16, buf, 0x7e90, seg.selector);
9674         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
9675         put_smstate(u32, buf, 0x7e94, seg.limit);
9676         put_smstate(u64, buf, 0x7e98, seg.base);
9677
9678         static_call(kvm_x86_get_idt)(vcpu, &dt);
9679         put_smstate(u32, buf, 0x7e84, dt.size);
9680         put_smstate(u64, buf, 0x7e88, dt.address);
9681
9682         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
9683         put_smstate(u16, buf, 0x7e70, seg.selector);
9684         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
9685         put_smstate(u32, buf, 0x7e74, seg.limit);
9686         put_smstate(u64, buf, 0x7e78, seg.base);
9687
9688         static_call(kvm_x86_get_gdt)(vcpu, &dt);
9689         put_smstate(u32, buf, 0x7e64, dt.size);
9690         put_smstate(u64, buf, 0x7e68, dt.address);
9691
9692         for (i = 0; i < 6; i++)
9693                 enter_smm_save_seg_64(vcpu, buf, i);
9694 }
9695 #endif
9696
9697 static void enter_smm(struct kvm_vcpu *vcpu)
9698 {
9699         struct kvm_segment cs, ds;
9700         struct desc_ptr dt;
9701         unsigned long cr0;
9702         char buf[512];
9703
9704         memset(buf, 0, 512);
9705 #ifdef CONFIG_X86_64
9706         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9707                 enter_smm_save_state_64(vcpu, buf);
9708         else
9709 #endif
9710                 enter_smm_save_state_32(vcpu, buf);
9711
9712         /*
9713          * Give enter_smm() a chance to make ISA-specific changes to the vCPU
9714          * state (e.g. leave guest mode) after we've saved the state into the
9715          * SMM state-save area.
9716          */
9717         static_call(kvm_x86_enter_smm)(vcpu, buf);
9718
9719         kvm_smm_changed(vcpu, true);
9720         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
9721
9722         if (static_call(kvm_x86_get_nmi_mask)(vcpu))
9723                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
9724         else
9725                 static_call(kvm_x86_set_nmi_mask)(vcpu, true);
9726
9727         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
9728         kvm_rip_write(vcpu, 0x8000);
9729
9730         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
9731         static_call(kvm_x86_set_cr0)(vcpu, cr0);
9732         vcpu->arch.cr0 = cr0;
9733
9734         static_call(kvm_x86_set_cr4)(vcpu, 0);
9735
9736         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
9737         dt.address = dt.size = 0;
9738         static_call(kvm_x86_set_idt)(vcpu, &dt);
9739
9740         kvm_set_dr(vcpu, 7, DR7_FIXED_1);
9741
9742         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
9743         cs.base = vcpu->arch.smbase;
9744
9745         ds.selector = 0;
9746         ds.base = 0;
9747
9748         cs.limit    = ds.limit = 0xffffffff;
9749         cs.type     = ds.type = 0x3;
9750         cs.dpl      = ds.dpl = 0;
9751         cs.db       = ds.db = 0;
9752         cs.s        = ds.s = 1;
9753         cs.l        = ds.l = 0;
9754         cs.g        = ds.g = 1;
9755         cs.avl      = ds.avl = 0;
9756         cs.present  = ds.present = 1;
9757         cs.unusable = ds.unusable = 0;
9758         cs.padding  = ds.padding = 0;
9759
9760         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9761         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
9762         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
9763         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
9764         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
9765         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
9766
9767 #ifdef CONFIG_X86_64
9768         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
9769                 static_call(kvm_x86_set_efer)(vcpu, 0);
9770 #endif
9771
9772         kvm_update_cpuid_runtime(vcpu);
9773         kvm_mmu_reset_context(vcpu);
9774 }
9775
9776 static void process_smi(struct kvm_vcpu *vcpu)
9777 {
9778         vcpu->arch.smi_pending = true;
9779         kvm_make_request(KVM_REQ_EVENT, vcpu);
9780 }
9781
9782 void kvm_make_scan_ioapic_request_mask(struct kvm *kvm,
9783                                        unsigned long *vcpu_bitmap)
9784 {
9785         kvm_make_vcpus_request_mask(kvm, KVM_REQ_SCAN_IOAPIC, vcpu_bitmap);
9786 }
9787
9788 void kvm_make_scan_ioapic_request(struct kvm *kvm)
9789 {
9790         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
9791 }
9792
9793 void kvm_vcpu_update_apicv(struct kvm_vcpu *vcpu)
9794 {
9795         bool activate;
9796
9797         if (!lapic_in_kernel(vcpu))
9798                 return;
9799
9800         down_read(&vcpu->kvm->arch.apicv_update_lock);
9801
9802         activate = kvm_apicv_activated(vcpu->kvm);
9803         if (vcpu->arch.apicv_active == activate)
9804                 goto out;
9805
9806         vcpu->arch.apicv_active = activate;
9807         kvm_apic_update_apicv(vcpu);
9808         static_call(kvm_x86_refresh_apicv_exec_ctrl)(vcpu);
9809
9810         /*
9811          * When APICv gets disabled, we may still have injected interrupts
9812          * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
9813          * still active when the interrupt got accepted. Make sure
9814          * inject_pending_event() is called to check for that.
9815          */
9816         if (!vcpu->arch.apicv_active)
9817                 kvm_make_request(KVM_REQ_EVENT, vcpu);
9818
9819 out:
9820         up_read(&vcpu->kvm->arch.apicv_update_lock);
9821 }
9822 EXPORT_SYMBOL_GPL(kvm_vcpu_update_apicv);
9823
9824 void __kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9825                                       enum kvm_apicv_inhibit reason, bool set)
9826 {
9827         unsigned long old, new;
9828
9829         lockdep_assert_held_write(&kvm->arch.apicv_update_lock);
9830
9831         if (!static_call(kvm_x86_check_apicv_inhibit_reasons)(reason))
9832                 return;
9833
9834         old = new = kvm->arch.apicv_inhibit_reasons;
9835
9836         set_or_clear_apicv_inhibit(&new, reason, set);
9837
9838         if (!!old != !!new) {
9839                 /*
9840                  * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
9841                  * false positives in the sanity check WARN in svm_vcpu_run().
9842                  * This task will wait for all vCPUs to ack the kick IRQ before
9843                  * updating apicv_inhibit_reasons, and all other vCPUs will
9844                  * block on acquiring apicv_update_lock so that vCPUs can't
9845                  * redo svm_vcpu_run() without seeing the new inhibit state.
9846                  *
9847                  * Note, holding apicv_update_lock and taking it in the read
9848                  * side (handling the request) also prevents other vCPUs from
9849                  * servicing the request with a stale apicv_inhibit_reasons.
9850                  */
9851                 kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
9852                 kvm->arch.apicv_inhibit_reasons = new;
9853                 if (new) {
9854                         unsigned long gfn = gpa_to_gfn(APIC_DEFAULT_PHYS_BASE);
9855                         kvm_zap_gfn_range(kvm, gfn, gfn+1);
9856                 }
9857         } else {
9858                 kvm->arch.apicv_inhibit_reasons = new;
9859         }
9860 }
9861
9862 void kvm_set_or_clear_apicv_inhibit(struct kvm *kvm,
9863                                     enum kvm_apicv_inhibit reason, bool set)
9864 {
9865         if (!enable_apicv)
9866                 return;
9867
9868         down_write(&kvm->arch.apicv_update_lock);
9869         __kvm_set_or_clear_apicv_inhibit(kvm, reason, set);
9870         up_write(&kvm->arch.apicv_update_lock);
9871 }
9872 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit);
9873
9874 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
9875 {
9876         if (!kvm_apic_present(vcpu))
9877                 return;
9878
9879         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
9880
9881         if (irqchip_split(vcpu->kvm))
9882                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
9883         else {
9884                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
9885                 if (ioapic_in_kernel(vcpu->kvm))
9886                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
9887         }
9888
9889         if (is_guest_mode(vcpu))
9890                 vcpu->arch.load_eoi_exitmap_pending = true;
9891         else
9892                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
9893 }
9894
9895 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
9896 {
9897         u64 eoi_exit_bitmap[4];
9898
9899         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
9900                 return;
9901
9902         if (to_hv_vcpu(vcpu)) {
9903                 bitmap_or((ulong *)eoi_exit_bitmap,
9904                           vcpu->arch.ioapic_handled_vectors,
9905                           to_hv_synic(vcpu)->vec_bitmap, 256);
9906                 static_call_cond(kvm_x86_load_eoi_exitmap)(vcpu, eoi_exit_bitmap);
9907                 return;
9908         }
9909
9910         static_call_cond(kvm_x86_load_eoi_exitmap)(
9911                 vcpu, (u64 *)vcpu->arch.ioapic_handled_vectors);
9912 }
9913
9914 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
9915                                             unsigned long start, unsigned long end)
9916 {
9917         unsigned long apic_address;
9918
9919         /*
9920          * The physical address of apic access page is stored in the VMCS.
9921          * Update it when it becomes invalid.
9922          */
9923         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
9924         if (start <= apic_address && apic_address < end)
9925                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
9926 }
9927
9928 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
9929 {
9930         if (!lapic_in_kernel(vcpu))
9931                 return;
9932
9933         static_call_cond(kvm_x86_set_apic_access_page_addr)(vcpu);
9934 }
9935
9936 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
9937 {
9938         smp_send_reschedule(vcpu->cpu);
9939 }
9940 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
9941
9942 /*
9943  * Called within kvm->srcu read side.
9944  * Returns 1 to let vcpu_run() continue the guest execution loop without
9945  * exiting to the userspace.  Otherwise, the value will be returned to the
9946  * userspace.
9947  */
9948 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
9949 {
9950         int r;
9951         bool req_int_win =
9952                 dm_request_for_irq_injection(vcpu) &&
9953                 kvm_cpu_accept_dm_intr(vcpu);
9954         fastpath_t exit_fastpath;
9955
9956         bool req_immediate_exit = false;
9957
9958         /* Forbid vmenter if vcpu dirty ring is soft-full */
9959         if (unlikely(vcpu->kvm->dirty_ring_size &&
9960                      kvm_dirty_ring_soft_full(&vcpu->dirty_ring))) {
9961                 vcpu->run->exit_reason = KVM_EXIT_DIRTY_RING_FULL;
9962                 trace_kvm_dirty_ring_exit(vcpu);
9963                 r = 0;
9964                 goto out;
9965         }
9966
9967         if (kvm_request_pending(vcpu)) {
9968                 if (kvm_check_request(KVM_REQ_VM_DEAD, vcpu)) {
9969                         r = -EIO;
9970                         goto out;
9971                 }
9972                 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES, vcpu)) {
9973                         if (unlikely(!kvm_x86_ops.nested_ops->get_nested_state_pages(vcpu))) {
9974                                 r = 0;
9975                                 goto out;
9976                         }
9977                 }
9978                 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS, vcpu))
9979                         kvm_mmu_free_obsolete_roots(vcpu);
9980                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
9981                         __kvm_migrate_timers(vcpu);
9982                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
9983                         kvm_update_masterclock(vcpu->kvm);
9984                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
9985                         kvm_gen_kvmclock_update(vcpu);
9986                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
9987                         r = kvm_guest_time_update(vcpu);
9988                         if (unlikely(r))
9989                                 goto out;
9990                 }
9991                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
9992                         kvm_mmu_sync_roots(vcpu);
9993                 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD, vcpu))
9994                         kvm_mmu_load_pgd(vcpu);
9995                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) {
9996                         kvm_vcpu_flush_tlb_all(vcpu);
9997
9998                         /* Flushing all ASIDs flushes the current ASID... */
9999                         kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu);
10000                 }
10001                 kvm_service_local_tlb_flush_requests(vcpu);
10002
10003                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
10004                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
10005                         r = 0;
10006                         goto out;
10007                 }
10008                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
10009                         if (is_guest_mode(vcpu)) {
10010                                 kvm_x86_ops.nested_ops->triple_fault(vcpu);
10011                         } else {
10012                                 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
10013                                 vcpu->mmio_needed = 0;
10014                                 r = 0;
10015                                 goto out;
10016                         }
10017                 }
10018                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
10019                         /* Page is swapped out. Do synthetic halt */
10020                         vcpu->arch.apf.halted = true;
10021                         r = 1;
10022                         goto out;
10023                 }
10024                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
10025                         record_steal_time(vcpu);
10026                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
10027                         process_smi(vcpu);
10028                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
10029                         process_nmi(vcpu);
10030                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
10031                         kvm_pmu_handle_event(vcpu);
10032                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
10033                         kvm_pmu_deliver_pmi(vcpu);
10034                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
10035                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
10036                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
10037                                      vcpu->arch.ioapic_handled_vectors)) {
10038                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
10039                                 vcpu->run->eoi.vector =
10040                                                 vcpu->arch.pending_ioapic_eoi;
10041                                 r = 0;
10042                                 goto out;
10043                         }
10044                 }
10045                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
10046                         vcpu_scan_ioapic(vcpu);
10047                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
10048                         vcpu_load_eoi_exitmap(vcpu);
10049                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
10050                         kvm_vcpu_reload_apic_access_page(vcpu);
10051                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
10052                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10053                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
10054                         r = 0;
10055                         goto out;
10056                 }
10057                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
10058                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
10059                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
10060                         r = 0;
10061                         goto out;
10062                 }
10063                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
10064                         struct kvm_vcpu_hv *hv_vcpu = to_hv_vcpu(vcpu);
10065
10066                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
10067                         vcpu->run->hyperv = hv_vcpu->exit;
10068                         r = 0;
10069                         goto out;
10070                 }
10071
10072                 /*
10073                  * KVM_REQ_HV_STIMER has to be processed after
10074                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10075                  * depend on the guest clock being up-to-date
10076                  */
10077                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
10078                         kvm_hv_process_stimers(vcpu);
10079                 if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu))
10080                         kvm_vcpu_update_apicv(vcpu);
10081                 if (kvm_check_request(KVM_REQ_APF_READY, vcpu))
10082                         kvm_check_async_pf_completion(vcpu);
10083                 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED, vcpu))
10084                         static_call(kvm_x86_msr_filter_changed)(vcpu);
10085
10086                 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING, vcpu))
10087                         static_call(kvm_x86_update_cpu_dirty_logging)(vcpu);
10088         }
10089
10090         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win ||
10091             kvm_xen_has_interrupt(vcpu)) {
10092                 ++vcpu->stat.req_event;
10093                 r = kvm_apic_accept_events(vcpu);
10094                 if (r < 0) {
10095                         r = 0;
10096                         goto out;
10097                 }
10098                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
10099                         r = 1;
10100                         goto out;
10101                 }
10102
10103                 r = inject_pending_event(vcpu, &req_immediate_exit);
10104                 if (r < 0) {
10105                         r = 0;
10106                         goto out;
10107                 }
10108                 if (req_int_win)
10109                         static_call(kvm_x86_enable_irq_window)(vcpu);
10110
10111                 if (kvm_lapic_enabled(vcpu)) {
10112                         update_cr8_intercept(vcpu);
10113                         kvm_lapic_sync_to_vapic(vcpu);
10114                 }
10115         }
10116
10117         r = kvm_mmu_reload(vcpu);
10118         if (unlikely(r)) {
10119                 goto cancel_injection;
10120         }
10121
10122         preempt_disable();
10123
10124         static_call(kvm_x86_prepare_switch_to_guest)(vcpu);
10125
10126         /*
10127          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
10128          * IPI are then delayed after guest entry, which ensures that they
10129          * result in virtual interrupt delivery.
10130          */
10131         local_irq_disable();
10132
10133         /* Store vcpu->apicv_active before vcpu->mode.  */
10134         smp_store_release(&vcpu->mode, IN_GUEST_MODE);
10135
10136         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10137
10138         /*
10139          * 1) We should set ->mode before checking ->requests.  Please see
10140          * the comment in kvm_vcpu_exiting_guest_mode().
10141          *
10142          * 2) For APICv, we should set ->mode before checking PID.ON. This
10143          * pairs with the memory barrier implicit in pi_test_and_set_on
10144          * (see vmx_deliver_posted_interrupt).
10145          *
10146          * 3) This also orders the write to mode from any reads to the page
10147          * tables done while the VCPU is running.  Please see the comment
10148          * in kvm_flush_remote_tlbs.
10149          */
10150         smp_mb__after_srcu_read_unlock();
10151
10152         /*
10153          * Process pending posted interrupts to handle the case where the
10154          * notification IRQ arrived in the host, or was never sent (because the
10155          * target vCPU wasn't running).  Do this regardless of the vCPU's APICv
10156          * status, KVM doesn't update assigned devices when APICv is inhibited,
10157          * i.e. they can post interrupts even if APICv is temporarily disabled.
10158          */
10159         if (kvm_lapic_enabled(vcpu))
10160                 static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10161
10162         if (kvm_vcpu_exit_request(vcpu)) {
10163                 vcpu->mode = OUTSIDE_GUEST_MODE;
10164                 smp_wmb();
10165                 local_irq_enable();
10166                 preempt_enable();
10167                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10168                 r = 1;
10169                 goto cancel_injection;
10170         }
10171
10172         if (req_immediate_exit) {
10173                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10174                 static_call(kvm_x86_request_immediate_exit)(vcpu);
10175         }
10176
10177         fpregs_assert_state_consistent();
10178         if (test_thread_flag(TIF_NEED_FPU_LOAD))
10179                 switch_fpu_return();
10180
10181         if (vcpu->arch.guest_fpu.xfd_err)
10182                 wrmsrl(MSR_IA32_XFD_ERR, vcpu->arch.guest_fpu.xfd_err);
10183
10184         if (unlikely(vcpu->arch.switch_db_regs)) {
10185                 set_debugreg(0, 7);
10186                 set_debugreg(vcpu->arch.eff_db[0], 0);
10187                 set_debugreg(vcpu->arch.eff_db[1], 1);
10188                 set_debugreg(vcpu->arch.eff_db[2], 2);
10189                 set_debugreg(vcpu->arch.eff_db[3], 3);
10190         } else if (unlikely(hw_breakpoint_active())) {
10191                 set_debugreg(0, 7);
10192         }
10193
10194         guest_timing_enter_irqoff();
10195
10196         for (;;) {
10197                 /*
10198                  * Assert that vCPU vs. VM APICv state is consistent.  An APICv
10199                  * update must kick and wait for all vCPUs before toggling the
10200                  * per-VM state, and responsing vCPUs must wait for the update
10201                  * to complete before servicing KVM_REQ_APICV_UPDATE.
10202                  */
10203                 WARN_ON_ONCE(kvm_apicv_activated(vcpu->kvm) != kvm_vcpu_apicv_active(vcpu));
10204
10205                 exit_fastpath = static_call(kvm_x86_vcpu_run)(vcpu);
10206                 if (likely(exit_fastpath != EXIT_FASTPATH_REENTER_GUEST))
10207                         break;
10208
10209                 if (kvm_lapic_enabled(vcpu))
10210                         static_call_cond(kvm_x86_sync_pir_to_irr)(vcpu);
10211
10212                 if (unlikely(kvm_vcpu_exit_request(vcpu))) {
10213                         exit_fastpath = EXIT_FASTPATH_EXIT_HANDLED;
10214                         break;
10215                 }
10216         }
10217
10218         /*
10219          * Do this here before restoring debug registers on the host.  And
10220          * since we do this before handling the vmexit, a DR access vmexit
10221          * can (a) read the correct value of the debug registers, (b) set
10222          * KVM_DEBUGREG_WONT_EXIT again.
10223          */
10224         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
10225                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
10226                 static_call(kvm_x86_sync_dirty_debug_regs)(vcpu);
10227                 kvm_update_dr0123(vcpu);
10228                 kvm_update_dr7(vcpu);
10229         }
10230
10231         /*
10232          * If the guest has used debug registers, at least dr7
10233          * will be disabled while returning to the host.
10234          * If we don't have active breakpoints in the host, we don't
10235          * care about the messed up debug address registers. But if
10236          * we have some of them active, restore the old state.
10237          */
10238         if (hw_breakpoint_active())
10239                 hw_breakpoint_restore();
10240
10241         vcpu->arch.last_vmentry_cpu = vcpu->cpu;
10242         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
10243
10244         vcpu->mode = OUTSIDE_GUEST_MODE;
10245         smp_wmb();
10246
10247         /*
10248          * Sync xfd before calling handle_exit_irqoff() which may
10249          * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10250          * in #NM irqoff handler).
10251          */
10252         if (vcpu->arch.xfd_no_write_intercept)
10253                 fpu_sync_guest_vmexit_xfd_state();
10254
10255         static_call(kvm_x86_handle_exit_irqoff)(vcpu);
10256
10257         if (vcpu->arch.guest_fpu.xfd_err)
10258                 wrmsrl(MSR_IA32_XFD_ERR, 0);
10259
10260         /*
10261          * Consume any pending interrupts, including the possible source of
10262          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10263          * An instruction is required after local_irq_enable() to fully unblock
10264          * interrupts on processors that implement an interrupt shadow, the
10265          * stat.exits increment will do nicely.
10266          */
10267         kvm_before_interrupt(vcpu, KVM_HANDLING_IRQ);
10268         local_irq_enable();
10269         ++vcpu->stat.exits;
10270         local_irq_disable();
10271         kvm_after_interrupt(vcpu);
10272
10273         /*
10274          * Wait until after servicing IRQs to account guest time so that any
10275          * ticks that occurred while running the guest are properly accounted
10276          * to the guest.  Waiting until IRQs are enabled degrades the accuracy
10277          * of accounting via context tracking, but the loss of accuracy is
10278          * acceptable for all known use cases.
10279          */
10280         guest_timing_exit_irqoff();
10281
10282         if (lapic_in_kernel(vcpu)) {
10283                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
10284                 if (delta != S64_MIN) {
10285                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
10286                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
10287                 }
10288         }
10289
10290         local_irq_enable();
10291         preempt_enable();
10292
10293         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10294
10295         /*
10296          * Profile KVM exit RIPs:
10297          */
10298         if (unlikely(prof_on == KVM_PROFILING)) {
10299                 unsigned long rip = kvm_rip_read(vcpu);
10300                 profile_hit(KVM_PROFILING, (void *)rip);
10301         }
10302
10303         if (unlikely(vcpu->arch.tsc_always_catchup))
10304                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
10305
10306         if (vcpu->arch.apic_attention)
10307                 kvm_lapic_sync_from_vapic(vcpu);
10308
10309         r = static_call(kvm_x86_handle_exit)(vcpu, exit_fastpath);
10310         return r;
10311
10312 cancel_injection:
10313         if (req_immediate_exit)
10314                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10315         static_call(kvm_x86_cancel_injection)(vcpu);
10316         if (unlikely(vcpu->arch.apic_attention))
10317                 kvm_lapic_sync_from_vapic(vcpu);
10318 out:
10319         return r;
10320 }
10321
10322 /* Called within kvm->srcu read side.  */
10323 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
10324 {
10325         bool hv_timer;
10326
10327         if (!kvm_arch_vcpu_runnable(vcpu)) {
10328                 /*
10329                  * Switch to the software timer before halt-polling/blocking as
10330                  * the guest's timer may be a break event for the vCPU, and the
10331                  * hypervisor timer runs only when the CPU is in guest mode.
10332                  * Switch before halt-polling so that KVM recognizes an expired
10333                  * timer before blocking.
10334                  */
10335                 hv_timer = kvm_lapic_hv_timer_in_use(vcpu);
10336                 if (hv_timer)
10337                         kvm_lapic_switch_to_sw_timer(vcpu);
10338
10339                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10340                 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
10341                         kvm_vcpu_halt(vcpu);
10342                 else
10343                         kvm_vcpu_block(vcpu);
10344                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10345
10346                 if (hv_timer)
10347                         kvm_lapic_switch_to_hv_timer(vcpu);
10348
10349                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
10350                         return 1;
10351         }
10352
10353         if (kvm_apic_accept_events(vcpu) < 0)
10354                 return 0;
10355         switch(vcpu->arch.mp_state) {
10356         case KVM_MP_STATE_HALTED:
10357         case KVM_MP_STATE_AP_RESET_HOLD:
10358                 vcpu->arch.pv.pv_unhalted = false;
10359                 vcpu->arch.mp_state =
10360                         KVM_MP_STATE_RUNNABLE;
10361                 fallthrough;
10362         case KVM_MP_STATE_RUNNABLE:
10363                 vcpu->arch.apf.halted = false;
10364                 break;
10365         case KVM_MP_STATE_INIT_RECEIVED:
10366                 break;
10367         default:
10368                 return -EINTR;
10369         }
10370         return 1;
10371 }
10372
10373 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
10374 {
10375         if (is_guest_mode(vcpu))
10376                 kvm_check_nested_events(vcpu);
10377
10378         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
10379                 !vcpu->arch.apf.halted);
10380 }
10381
10382 /* Called within kvm->srcu read side.  */
10383 static int vcpu_run(struct kvm_vcpu *vcpu)
10384 {
10385         int r;
10386         struct kvm *kvm = vcpu->kvm;
10387
10388         vcpu->arch.l1tf_flush_l1d = true;
10389
10390         for (;;) {
10391                 if (kvm_vcpu_running(vcpu)) {
10392                         r = vcpu_enter_guest(vcpu);
10393                 } else {
10394                         r = vcpu_block(kvm, vcpu);
10395                 }
10396
10397                 if (r <= 0)
10398                         break;
10399
10400                 kvm_clear_request(KVM_REQ_UNBLOCK, vcpu);
10401                 if (kvm_xen_has_pending_events(vcpu))
10402                         kvm_xen_inject_pending_events(vcpu);
10403
10404                 if (kvm_cpu_has_pending_timer(vcpu))
10405                         kvm_inject_pending_timer_irqs(vcpu);
10406
10407                 if (dm_request_for_irq_injection(vcpu) &&
10408                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
10409                         r = 0;
10410                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
10411                         ++vcpu->stat.request_irq_exits;
10412                         break;
10413                 }
10414
10415                 if (__xfer_to_guest_mode_work_pending()) {
10416                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10417                         r = xfer_to_guest_mode_handle_work(vcpu);
10418                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10419                         if (r)
10420                                 return r;
10421                 }
10422         }
10423
10424         return r;
10425 }
10426
10427 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
10428 {
10429         int r;
10430
10431         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10432         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
10433         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
10434         return r;
10435 }
10436
10437 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
10438 {
10439         BUG_ON(!vcpu->arch.pio.count);
10440
10441         return complete_emulated_io(vcpu);
10442 }
10443
10444 /*
10445  * Implements the following, as a state machine:
10446  *
10447  * read:
10448  *   for each fragment
10449  *     for each mmio piece in the fragment
10450  *       write gpa, len
10451  *       exit
10452  *       copy data
10453  *   execute insn
10454  *
10455  * write:
10456  *   for each fragment
10457  *     for each mmio piece in the fragment
10458  *       write gpa, len
10459  *       copy data
10460  *       exit
10461  */
10462 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
10463 {
10464         struct kvm_run *run = vcpu->run;
10465         struct kvm_mmio_fragment *frag;
10466         unsigned len;
10467
10468         BUG_ON(!vcpu->mmio_needed);
10469
10470         /* Complete previous fragment */
10471         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
10472         len = min(8u, frag->len);
10473         if (!vcpu->mmio_is_write)
10474                 memcpy(frag->data, run->mmio.data, len);
10475
10476         if (frag->len <= 8) {
10477                 /* Switch to the next fragment. */
10478                 frag++;
10479                 vcpu->mmio_cur_fragment++;
10480         } else {
10481                 /* Go forward to the next mmio piece. */
10482                 frag->data += len;
10483                 frag->gpa += len;
10484                 frag->len -= len;
10485         }
10486
10487         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
10488                 vcpu->mmio_needed = 0;
10489
10490                 /* FIXME: return into emulator if single-stepping.  */
10491                 if (vcpu->mmio_is_write)
10492                         return 1;
10493                 vcpu->mmio_read_completed = 1;
10494                 return complete_emulated_io(vcpu);
10495         }
10496
10497         run->exit_reason = KVM_EXIT_MMIO;
10498         run->mmio.phys_addr = frag->gpa;
10499         if (vcpu->mmio_is_write)
10500                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
10501         run->mmio.len = min(8u, frag->len);
10502         run->mmio.is_write = vcpu->mmio_is_write;
10503         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
10504         return 0;
10505 }
10506
10507 /* Swap (qemu) user FPU context for the guest FPU context. */
10508 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
10509 {
10510         /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
10511         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, true);
10512         trace_kvm_fpu(1);
10513 }
10514
10515 /* When vcpu_run ends, restore user space FPU context. */
10516 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
10517 {
10518         fpu_swap_kvm_fpstate(&vcpu->arch.guest_fpu, false);
10519         ++vcpu->stat.fpu_reload;
10520         trace_kvm_fpu(0);
10521 }
10522
10523 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
10524 {
10525         struct kvm_run *kvm_run = vcpu->run;
10526         struct kvm *kvm = vcpu->kvm;
10527         int r;
10528
10529         vcpu_load(vcpu);
10530         kvm_sigset_activate(vcpu);
10531         kvm_run->flags = 0;
10532         kvm_load_guest_fpu(vcpu);
10533
10534         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
10535         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
10536                 if (kvm_run->immediate_exit) {
10537                         r = -EINTR;
10538                         goto out;
10539                 }
10540                 /*
10541                  * It should be impossible for the hypervisor timer to be in
10542                  * use before KVM has ever run the vCPU.
10543                  */
10544                 WARN_ON_ONCE(kvm_lapic_hv_timer_in_use(vcpu));
10545
10546                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10547                 kvm_vcpu_block(vcpu);
10548                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
10549
10550                 if (kvm_apic_accept_events(vcpu) < 0) {
10551                         r = 0;
10552                         goto out;
10553                 }
10554                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
10555                 r = -EAGAIN;
10556                 if (signal_pending(current)) {
10557                         r = -EINTR;
10558                         kvm_run->exit_reason = KVM_EXIT_INTR;
10559                         ++vcpu->stat.signal_exits;
10560                 }
10561                 goto out;
10562         }
10563
10564         if ((kvm_run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) ||
10565             (kvm_run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)) {
10566                 r = -EINVAL;
10567                 goto out;
10568         }
10569
10570         if (kvm_run->kvm_dirty_regs) {
10571                 r = sync_regs(vcpu);
10572                 if (r != 0)
10573                         goto out;
10574         }
10575
10576         /* re-sync apic's tpr */
10577         if (!lapic_in_kernel(vcpu)) {
10578                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
10579                         r = -EINVAL;
10580                         goto out;
10581                 }
10582         }
10583
10584         if (unlikely(vcpu->arch.complete_userspace_io)) {
10585                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
10586                 vcpu->arch.complete_userspace_io = NULL;
10587                 r = cui(vcpu);
10588                 if (r <= 0)
10589                         goto out;
10590         } else
10591                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
10592
10593         if (kvm_run->immediate_exit) {
10594                 r = -EINTR;
10595                 goto out;
10596         }
10597
10598         r = static_call(kvm_x86_vcpu_pre_run)(vcpu);
10599         if (r <= 0)
10600                 goto out;
10601
10602         r = vcpu_run(vcpu);
10603
10604 out:
10605         kvm_put_guest_fpu(vcpu);
10606         if (kvm_run->kvm_valid_regs)
10607                 store_regs(vcpu);
10608         post_kvm_run_save(vcpu);
10609         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
10610
10611         kvm_sigset_deactivate(vcpu);
10612         vcpu_put(vcpu);
10613         return r;
10614 }
10615
10616 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10617 {
10618         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
10619                 /*
10620                  * We are here if userspace calls get_regs() in the middle of
10621                  * instruction emulation. Registers state needs to be copied
10622                  * back from emulation context to vcpu. Userspace shouldn't do
10623                  * that usually, but some bad designed PV devices (vmware
10624                  * backdoor interface) need this to work
10625                  */
10626                 emulator_writeback_register_cache(vcpu->arch.emulate_ctxt);
10627                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10628         }
10629         regs->rax = kvm_rax_read(vcpu);
10630         regs->rbx = kvm_rbx_read(vcpu);
10631         regs->rcx = kvm_rcx_read(vcpu);
10632         regs->rdx = kvm_rdx_read(vcpu);
10633         regs->rsi = kvm_rsi_read(vcpu);
10634         regs->rdi = kvm_rdi_read(vcpu);
10635         regs->rsp = kvm_rsp_read(vcpu);
10636         regs->rbp = kvm_rbp_read(vcpu);
10637 #ifdef CONFIG_X86_64
10638         regs->r8 = kvm_r8_read(vcpu);
10639         regs->r9 = kvm_r9_read(vcpu);
10640         regs->r10 = kvm_r10_read(vcpu);
10641         regs->r11 = kvm_r11_read(vcpu);
10642         regs->r12 = kvm_r12_read(vcpu);
10643         regs->r13 = kvm_r13_read(vcpu);
10644         regs->r14 = kvm_r14_read(vcpu);
10645         regs->r15 = kvm_r15_read(vcpu);
10646 #endif
10647
10648         regs->rip = kvm_rip_read(vcpu);
10649         regs->rflags = kvm_get_rflags(vcpu);
10650 }
10651
10652 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10653 {
10654         vcpu_load(vcpu);
10655         __get_regs(vcpu, regs);
10656         vcpu_put(vcpu);
10657         return 0;
10658 }
10659
10660 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10661 {
10662         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
10663         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
10664
10665         kvm_rax_write(vcpu, regs->rax);
10666         kvm_rbx_write(vcpu, regs->rbx);
10667         kvm_rcx_write(vcpu, regs->rcx);
10668         kvm_rdx_write(vcpu, regs->rdx);
10669         kvm_rsi_write(vcpu, regs->rsi);
10670         kvm_rdi_write(vcpu, regs->rdi);
10671         kvm_rsp_write(vcpu, regs->rsp);
10672         kvm_rbp_write(vcpu, regs->rbp);
10673 #ifdef CONFIG_X86_64
10674         kvm_r8_write(vcpu, regs->r8);
10675         kvm_r9_write(vcpu, regs->r9);
10676         kvm_r10_write(vcpu, regs->r10);
10677         kvm_r11_write(vcpu, regs->r11);
10678         kvm_r12_write(vcpu, regs->r12);
10679         kvm_r13_write(vcpu, regs->r13);
10680         kvm_r14_write(vcpu, regs->r14);
10681         kvm_r15_write(vcpu, regs->r15);
10682 #endif
10683
10684         kvm_rip_write(vcpu, regs->rip);
10685         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
10686
10687         vcpu->arch.exception.pending = false;
10688
10689         kvm_make_request(KVM_REQ_EVENT, vcpu);
10690 }
10691
10692 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
10693 {
10694         vcpu_load(vcpu);
10695         __set_regs(vcpu, regs);
10696         vcpu_put(vcpu);
10697         return 0;
10698 }
10699
10700 static void __get_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10701 {
10702         struct desc_ptr dt;
10703
10704         if (vcpu->arch.guest_state_protected)
10705                 goto skip_protected_regs;
10706
10707         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10708         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10709         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10710         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10711         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10712         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10713
10714         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10715         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10716
10717         static_call(kvm_x86_get_idt)(vcpu, &dt);
10718         sregs->idt.limit = dt.size;
10719         sregs->idt.base = dt.address;
10720         static_call(kvm_x86_get_gdt)(vcpu, &dt);
10721         sregs->gdt.limit = dt.size;
10722         sregs->gdt.base = dt.address;
10723
10724         sregs->cr2 = vcpu->arch.cr2;
10725         sregs->cr3 = kvm_read_cr3(vcpu);
10726
10727 skip_protected_regs:
10728         sregs->cr0 = kvm_read_cr0(vcpu);
10729         sregs->cr4 = kvm_read_cr4(vcpu);
10730         sregs->cr8 = kvm_get_cr8(vcpu);
10731         sregs->efer = vcpu->arch.efer;
10732         sregs->apic_base = kvm_get_apic_base(vcpu);
10733 }
10734
10735 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10736 {
10737         __get_sregs_common(vcpu, sregs);
10738
10739         if (vcpu->arch.guest_state_protected)
10740                 return;
10741
10742         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
10743                 set_bit(vcpu->arch.interrupt.nr,
10744                         (unsigned long *)sregs->interrupt_bitmap);
10745 }
10746
10747 static void __get_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10748 {
10749         int i;
10750
10751         __get_sregs_common(vcpu, (struct kvm_sregs *)sregs2);
10752
10753         if (vcpu->arch.guest_state_protected)
10754                 return;
10755
10756         if (is_pae_paging(vcpu)) {
10757                 for (i = 0 ; i < 4 ; i++)
10758                         sregs2->pdptrs[i] = kvm_pdptr_read(vcpu, i);
10759                 sregs2->flags |= KVM_SREGS2_FLAGS_PDPTRS_VALID;
10760         }
10761 }
10762
10763 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
10764                                   struct kvm_sregs *sregs)
10765 {
10766         vcpu_load(vcpu);
10767         __get_sregs(vcpu, sregs);
10768         vcpu_put(vcpu);
10769         return 0;
10770 }
10771
10772 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
10773                                     struct kvm_mp_state *mp_state)
10774 {
10775         int r;
10776
10777         vcpu_load(vcpu);
10778         if (kvm_mpx_supported())
10779                 kvm_load_guest_fpu(vcpu);
10780
10781         r = kvm_apic_accept_events(vcpu);
10782         if (r < 0)
10783                 goto out;
10784         r = 0;
10785
10786         if ((vcpu->arch.mp_state == KVM_MP_STATE_HALTED ||
10787              vcpu->arch.mp_state == KVM_MP_STATE_AP_RESET_HOLD) &&
10788             vcpu->arch.pv.pv_unhalted)
10789                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
10790         else
10791                 mp_state->mp_state = vcpu->arch.mp_state;
10792
10793 out:
10794         if (kvm_mpx_supported())
10795                 kvm_put_guest_fpu(vcpu);
10796         vcpu_put(vcpu);
10797         return r;
10798 }
10799
10800 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
10801                                     struct kvm_mp_state *mp_state)
10802 {
10803         int ret = -EINVAL;
10804
10805         vcpu_load(vcpu);
10806
10807         if (!lapic_in_kernel(vcpu) &&
10808             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
10809                 goto out;
10810
10811         /*
10812          * KVM_MP_STATE_INIT_RECEIVED means the processor is in
10813          * INIT state; latched init should be reported using
10814          * KVM_SET_VCPU_EVENTS, so reject it here.
10815          */
10816         if ((kvm_vcpu_latch_init(vcpu) || vcpu->arch.smi_pending) &&
10817             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
10818              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
10819                 goto out;
10820
10821         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
10822                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
10823                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
10824         } else
10825                 vcpu->arch.mp_state = mp_state->mp_state;
10826         kvm_make_request(KVM_REQ_EVENT, vcpu);
10827
10828         ret = 0;
10829 out:
10830         vcpu_put(vcpu);
10831         return ret;
10832 }
10833
10834 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
10835                     int reason, bool has_error_code, u32 error_code)
10836 {
10837         struct x86_emulate_ctxt *ctxt = vcpu->arch.emulate_ctxt;
10838         int ret;
10839
10840         init_emulate_ctxt(vcpu);
10841
10842         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
10843                                    has_error_code, error_code);
10844         if (ret) {
10845                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
10846                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
10847                 vcpu->run->internal.ndata = 0;
10848                 return 0;
10849         }
10850
10851         kvm_rip_write(vcpu, ctxt->eip);
10852         kvm_set_rflags(vcpu, ctxt->eflags);
10853         return 1;
10854 }
10855 EXPORT_SYMBOL_GPL(kvm_task_switch);
10856
10857 static bool kvm_is_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10858 {
10859         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
10860                 /*
10861                  * When EFER.LME and CR0.PG are set, the processor is in
10862                  * 64-bit mode (though maybe in a 32-bit code segment).
10863                  * CR4.PAE and EFER.LMA must be set.
10864                  */
10865                 if (!(sregs->cr4 & X86_CR4_PAE) || !(sregs->efer & EFER_LMA))
10866                         return false;
10867                 if (kvm_vcpu_is_illegal_gpa(vcpu, sregs->cr3))
10868                         return false;
10869         } else {
10870                 /*
10871                  * Not in 64-bit mode: EFER.LMA is clear and the code
10872                  * segment cannot be 64-bit.
10873                  */
10874                 if (sregs->efer & EFER_LMA || sregs->cs.l)
10875                         return false;
10876         }
10877
10878         return kvm_is_valid_cr4(vcpu, sregs->cr4);
10879 }
10880
10881 static int __set_sregs_common(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs,
10882                 int *mmu_reset_needed, bool update_pdptrs)
10883 {
10884         struct msr_data apic_base_msr;
10885         int idx;
10886         struct desc_ptr dt;
10887
10888         if (!kvm_is_valid_sregs(vcpu, sregs))
10889                 return -EINVAL;
10890
10891         apic_base_msr.data = sregs->apic_base;
10892         apic_base_msr.host_initiated = true;
10893         if (kvm_set_apic_base(vcpu, &apic_base_msr))
10894                 return -EINVAL;
10895
10896         if (vcpu->arch.guest_state_protected)
10897                 return 0;
10898
10899         dt.size = sregs->idt.limit;
10900         dt.address = sregs->idt.base;
10901         static_call(kvm_x86_set_idt)(vcpu, &dt);
10902         dt.size = sregs->gdt.limit;
10903         dt.address = sregs->gdt.base;
10904         static_call(kvm_x86_set_gdt)(vcpu, &dt);
10905
10906         vcpu->arch.cr2 = sregs->cr2;
10907         *mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
10908         vcpu->arch.cr3 = sregs->cr3;
10909         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
10910         static_call_cond(kvm_x86_post_set_cr3)(vcpu, sregs->cr3);
10911
10912         kvm_set_cr8(vcpu, sregs->cr8);
10913
10914         *mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
10915         static_call(kvm_x86_set_efer)(vcpu, sregs->efer);
10916
10917         *mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
10918         static_call(kvm_x86_set_cr0)(vcpu, sregs->cr0);
10919         vcpu->arch.cr0 = sregs->cr0;
10920
10921         *mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
10922         static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4);
10923
10924         if (update_pdptrs) {
10925                 idx = srcu_read_lock(&vcpu->kvm->srcu);
10926                 if (is_pae_paging(vcpu)) {
10927                         load_pdptrs(vcpu, kvm_read_cr3(vcpu));
10928                         *mmu_reset_needed = 1;
10929                 }
10930                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
10931         }
10932
10933         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
10934         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
10935         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
10936         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
10937         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
10938         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
10939
10940         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
10941         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
10942
10943         update_cr8_intercept(vcpu);
10944
10945         /* Older userspace won't unhalt the vcpu on reset. */
10946         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
10947             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
10948             !is_protmode(vcpu))
10949                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10950
10951         return 0;
10952 }
10953
10954 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
10955 {
10956         int pending_vec, max_bits;
10957         int mmu_reset_needed = 0;
10958         int ret = __set_sregs_common(vcpu, sregs, &mmu_reset_needed, true);
10959
10960         if (ret)
10961                 return ret;
10962
10963         if (mmu_reset_needed)
10964                 kvm_mmu_reset_context(vcpu);
10965
10966         max_bits = KVM_NR_INTERRUPTS;
10967         pending_vec = find_first_bit(
10968                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
10969
10970         if (pending_vec < max_bits) {
10971                 kvm_queue_interrupt(vcpu, pending_vec, false);
10972                 pr_debug("Set back pending irq %d\n", pending_vec);
10973                 kvm_make_request(KVM_REQ_EVENT, vcpu);
10974         }
10975         return 0;
10976 }
10977
10978 static int __set_sregs2(struct kvm_vcpu *vcpu, struct kvm_sregs2 *sregs2)
10979 {
10980         int mmu_reset_needed = 0;
10981         bool valid_pdptrs = sregs2->flags & KVM_SREGS2_FLAGS_PDPTRS_VALID;
10982         bool pae = (sregs2->cr0 & X86_CR0_PG) && (sregs2->cr4 & X86_CR4_PAE) &&
10983                 !(sregs2->efer & EFER_LMA);
10984         int i, ret;
10985
10986         if (sregs2->flags & ~KVM_SREGS2_FLAGS_PDPTRS_VALID)
10987                 return -EINVAL;
10988
10989         if (valid_pdptrs && (!pae || vcpu->arch.guest_state_protected))
10990                 return -EINVAL;
10991
10992         ret = __set_sregs_common(vcpu, (struct kvm_sregs *)sregs2,
10993                                  &mmu_reset_needed, !valid_pdptrs);
10994         if (ret)
10995                 return ret;
10996
10997         if (valid_pdptrs) {
10998                 for (i = 0; i < 4 ; i++)
10999                         kvm_pdptr_write(vcpu, i, sregs2->pdptrs[i]);
11000
11001                 kvm_register_mark_dirty(vcpu, VCPU_EXREG_PDPTR);
11002                 mmu_reset_needed = 1;
11003                 vcpu->arch.pdptrs_from_userspace = true;
11004         }
11005         if (mmu_reset_needed)
11006                 kvm_mmu_reset_context(vcpu);
11007         return 0;
11008 }
11009
11010 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
11011                                   struct kvm_sregs *sregs)
11012 {
11013         int ret;
11014
11015         vcpu_load(vcpu);
11016         ret = __set_sregs(vcpu, sregs);
11017         vcpu_put(vcpu);
11018         return ret;
11019 }
11020
11021 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm *kvm)
11022 {
11023         bool set = false;
11024         struct kvm_vcpu *vcpu;
11025         unsigned long i;
11026
11027         down_write(&kvm->arch.apicv_update_lock);
11028
11029         kvm_for_each_vcpu(i, vcpu, kvm) {
11030                 if (vcpu->guest_debug & KVM_GUESTDBG_BLOCKIRQ) {
11031                         set = true;
11032                         break;
11033                 }
11034         }
11035         __kvm_set_or_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_BLOCKIRQ, set);
11036         up_write(&kvm->arch.apicv_update_lock);
11037 }
11038
11039 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
11040                                         struct kvm_guest_debug *dbg)
11041 {
11042         unsigned long rflags;
11043         int i, r;
11044
11045         if (vcpu->arch.guest_state_protected)
11046                 return -EINVAL;
11047
11048         vcpu_load(vcpu);
11049
11050         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
11051                 r = -EBUSY;
11052                 if (vcpu->arch.exception.pending)
11053                         goto out;
11054                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
11055                         kvm_queue_exception(vcpu, DB_VECTOR);
11056                 else
11057                         kvm_queue_exception(vcpu, BP_VECTOR);
11058         }
11059
11060         /*
11061          * Read rflags as long as potentially injected trace flags are still
11062          * filtered out.
11063          */
11064         rflags = kvm_get_rflags(vcpu);
11065
11066         vcpu->guest_debug = dbg->control;
11067         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
11068                 vcpu->guest_debug = 0;
11069
11070         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
11071                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
11072                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
11073                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
11074         } else {
11075                 for (i = 0; i < KVM_NR_DB_REGS; i++)
11076                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
11077         }
11078         kvm_update_dr7(vcpu);
11079
11080         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
11081                 vcpu->arch.singlestep_rip = kvm_get_linear_rip(vcpu);
11082
11083         /*
11084          * Trigger an rflags update that will inject or remove the trace
11085          * flags.
11086          */
11087         kvm_set_rflags(vcpu, rflags);
11088
11089         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11090
11091         kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu->kvm);
11092
11093         r = 0;
11094
11095 out:
11096         vcpu_put(vcpu);
11097         return r;
11098 }
11099
11100 /*
11101  * Translate a guest virtual address to a guest physical address.
11102  */
11103 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
11104                                     struct kvm_translation *tr)
11105 {
11106         unsigned long vaddr = tr->linear_address;
11107         gpa_t gpa;
11108         int idx;
11109
11110         vcpu_load(vcpu);
11111
11112         idx = srcu_read_lock(&vcpu->kvm->srcu);
11113         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
11114         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11115         tr->physical_address = gpa;
11116         tr->valid = gpa != UNMAPPED_GVA;
11117         tr->writeable = 1;
11118         tr->usermode = 0;
11119
11120         vcpu_put(vcpu);
11121         return 0;
11122 }
11123
11124 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11125 {
11126         struct fxregs_state *fxsave;
11127
11128         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11129                 return 0;
11130
11131         vcpu_load(vcpu);
11132
11133         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11134         memcpy(fpu->fpr, fxsave->st_space, 128);
11135         fpu->fcw = fxsave->cwd;
11136         fpu->fsw = fxsave->swd;
11137         fpu->ftwx = fxsave->twd;
11138         fpu->last_opcode = fxsave->fop;
11139         fpu->last_ip = fxsave->rip;
11140         fpu->last_dp = fxsave->rdp;
11141         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
11142
11143         vcpu_put(vcpu);
11144         return 0;
11145 }
11146
11147 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
11148 {
11149         struct fxregs_state *fxsave;
11150
11151         if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
11152                 return 0;
11153
11154         vcpu_load(vcpu);
11155
11156         fxsave = &vcpu->arch.guest_fpu.fpstate->regs.fxsave;
11157
11158         memcpy(fxsave->st_space, fpu->fpr, 128);
11159         fxsave->cwd = fpu->fcw;
11160         fxsave->swd = fpu->fsw;
11161         fxsave->twd = fpu->ftwx;
11162         fxsave->fop = fpu->last_opcode;
11163         fxsave->rip = fpu->last_ip;
11164         fxsave->rdp = fpu->last_dp;
11165         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
11166
11167         vcpu_put(vcpu);
11168         return 0;
11169 }
11170
11171 static void store_regs(struct kvm_vcpu *vcpu)
11172 {
11173         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
11174
11175         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
11176                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
11177
11178         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
11179                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
11180
11181         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
11182                 kvm_vcpu_ioctl_x86_get_vcpu_events(
11183                                 vcpu, &vcpu->run->s.regs.events);
11184 }
11185
11186 static int sync_regs(struct kvm_vcpu *vcpu)
11187 {
11188         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
11189                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
11190                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
11191         }
11192         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
11193                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
11194                         return -EINVAL;
11195                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
11196         }
11197         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
11198                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
11199                                 vcpu, &vcpu->run->s.regs.events))
11200                         return -EINVAL;
11201                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
11202         }
11203
11204         return 0;
11205 }
11206
11207 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
11208 {
11209         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
11210                 pr_warn_once("kvm: SMP vm created on host with unstable TSC; "
11211                              "guest TSC will not be reliable\n");
11212
11213         return 0;
11214 }
11215
11216 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
11217 {
11218         struct page *page;
11219         int r;
11220
11221         vcpu->arch.last_vmentry_cpu = -1;
11222         vcpu->arch.regs_avail = ~0;
11223         vcpu->arch.regs_dirty = ~0;
11224
11225         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
11226                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
11227         else
11228                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
11229
11230         r = kvm_mmu_create(vcpu);
11231         if (r < 0)
11232                 return r;
11233
11234         if (irqchip_in_kernel(vcpu->kvm)) {
11235                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
11236                 if (r < 0)
11237                         goto fail_mmu_destroy;
11238                 if (kvm_apicv_activated(vcpu->kvm))
11239                         vcpu->arch.apicv_active = true;
11240         } else
11241                 static_branch_inc(&kvm_has_noapic_vcpu);
11242
11243         r = -ENOMEM;
11244
11245         page = alloc_page(GFP_KERNEL_ACCOUNT | __GFP_ZERO);
11246         if (!page)
11247                 goto fail_free_lapic;
11248         vcpu->arch.pio_data = page_address(page);
11249
11250         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
11251                                        GFP_KERNEL_ACCOUNT);
11252         if (!vcpu->arch.mce_banks)
11253                 goto fail_free_pio_data;
11254         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
11255
11256         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
11257                                 GFP_KERNEL_ACCOUNT))
11258                 goto fail_free_mce_banks;
11259
11260         if (!alloc_emulate_ctxt(vcpu))
11261                 goto free_wbinvd_dirty_mask;
11262
11263         if (!fpu_alloc_guest_fpstate(&vcpu->arch.guest_fpu)) {
11264                 pr_err("kvm: failed to allocate vcpu's fpu\n");
11265                 goto free_emulate_ctxt;
11266         }
11267
11268         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
11269         vcpu->arch.reserved_gpa_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu);
11270
11271         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
11272
11273         kvm_async_pf_hash_reset(vcpu);
11274         kvm_pmu_init(vcpu);
11275
11276         vcpu->arch.pending_external_vector = -1;
11277         vcpu->arch.preempted_in_kernel = false;
11278
11279 #if IS_ENABLED(CONFIG_HYPERV)
11280         vcpu->arch.hv_root_tdp = INVALID_PAGE;
11281 #endif
11282
11283         r = static_call(kvm_x86_vcpu_create)(vcpu);
11284         if (r)
11285                 goto free_guest_fpu;
11286
11287         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
11288         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
11289         kvm_xen_init_vcpu(vcpu);
11290         kvm_vcpu_mtrr_init(vcpu);
11291         vcpu_load(vcpu);
11292         kvm_set_tsc_khz(vcpu, vcpu->kvm->arch.default_tsc_khz);
11293         kvm_vcpu_reset(vcpu, false);
11294         kvm_init_mmu(vcpu);
11295         vcpu_put(vcpu);
11296         return 0;
11297
11298 free_guest_fpu:
11299         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11300 free_emulate_ctxt:
11301         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11302 free_wbinvd_dirty_mask:
11303         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11304 fail_free_mce_banks:
11305         kfree(vcpu->arch.mce_banks);
11306 fail_free_pio_data:
11307         free_page((unsigned long)vcpu->arch.pio_data);
11308 fail_free_lapic:
11309         kvm_free_lapic(vcpu);
11310 fail_mmu_destroy:
11311         kvm_mmu_destroy(vcpu);
11312         return r;
11313 }
11314
11315 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
11316 {
11317         struct kvm *kvm = vcpu->kvm;
11318
11319         if (mutex_lock_killable(&vcpu->mutex))
11320                 return;
11321         vcpu_load(vcpu);
11322         kvm_synchronize_tsc(vcpu, 0);
11323         vcpu_put(vcpu);
11324
11325         /* poll control enabled by default */
11326         vcpu->arch.msr_kvm_poll_control = 1;
11327
11328         mutex_unlock(&vcpu->mutex);
11329
11330         if (kvmclock_periodic_sync && vcpu->vcpu_idx == 0)
11331                 schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
11332                                                 KVMCLOCK_SYNC_PERIOD);
11333 }
11334
11335 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
11336 {
11337         int idx;
11338
11339         kvmclock_reset(vcpu);
11340
11341         static_call(kvm_x86_vcpu_free)(vcpu);
11342
11343         kmem_cache_free(x86_emulator_cache, vcpu->arch.emulate_ctxt);
11344         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
11345         fpu_free_guest_fpstate(&vcpu->arch.guest_fpu);
11346
11347         kvm_xen_destroy_vcpu(vcpu);
11348         kvm_hv_vcpu_uninit(vcpu);
11349         kvm_pmu_destroy(vcpu);
11350         kfree(vcpu->arch.mce_banks);
11351         kvm_free_lapic(vcpu);
11352         idx = srcu_read_lock(&vcpu->kvm->srcu);
11353         kvm_mmu_destroy(vcpu);
11354         srcu_read_unlock(&vcpu->kvm->srcu, idx);
11355         free_page((unsigned long)vcpu->arch.pio_data);
11356         kvfree(vcpu->arch.cpuid_entries);
11357         if (!lapic_in_kernel(vcpu))
11358                 static_branch_dec(&kvm_has_noapic_vcpu);
11359 }
11360
11361 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
11362 {
11363         struct kvm_cpuid_entry2 *cpuid_0x1;
11364         unsigned long old_cr0 = kvm_read_cr0(vcpu);
11365         unsigned long new_cr0;
11366
11367         /*
11368          * Several of the "set" flows, e.g. ->set_cr0(), read other registers
11369          * to handle side effects.  RESET emulation hits those flows and relies
11370          * on emulated/virtualized registers, including those that are loaded
11371          * into hardware, to be zeroed at vCPU creation.  Use CRs as a sentinel
11372          * to detect improper or missing initialization.
11373          */
11374         WARN_ON_ONCE(!init_event &&
11375                      (old_cr0 || kvm_read_cr3(vcpu) || kvm_read_cr4(vcpu)));
11376
11377         kvm_lapic_reset(vcpu, init_event);
11378
11379         vcpu->arch.hflags = 0;
11380
11381         vcpu->arch.smi_pending = 0;
11382         vcpu->arch.smi_count = 0;
11383         atomic_set(&vcpu->arch.nmi_queued, 0);
11384         vcpu->arch.nmi_pending = 0;
11385         vcpu->arch.nmi_injected = false;
11386         kvm_clear_interrupt_queue(vcpu);
11387         kvm_clear_exception_queue(vcpu);
11388
11389         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
11390         kvm_update_dr0123(vcpu);
11391         vcpu->arch.dr6 = DR6_ACTIVE_LOW;
11392         vcpu->arch.dr7 = DR7_FIXED_1;
11393         kvm_update_dr7(vcpu);
11394
11395         vcpu->arch.cr2 = 0;
11396
11397         kvm_make_request(KVM_REQ_EVENT, vcpu);
11398         vcpu->arch.apf.msr_en_val = 0;
11399         vcpu->arch.apf.msr_int_val = 0;
11400         vcpu->arch.st.msr_val = 0;
11401
11402         kvmclock_reset(vcpu);
11403
11404         kvm_clear_async_pf_completion_queue(vcpu);
11405         kvm_async_pf_hash_reset(vcpu);
11406         vcpu->arch.apf.halted = false;
11407
11408         if (vcpu->arch.guest_fpu.fpstate && kvm_mpx_supported()) {
11409                 struct fpstate *fpstate = vcpu->arch.guest_fpu.fpstate;
11410
11411                 /*
11412                  * To avoid have the INIT path from kvm_apic_has_events() that be
11413                  * called with loaded FPU and does not let userspace fix the state.
11414                  */
11415                 if (init_event)
11416                         kvm_put_guest_fpu(vcpu);
11417
11418                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDREGS);
11419                 fpstate_clear_xstate_component(fpstate, XFEATURE_BNDCSR);
11420
11421                 if (init_event)
11422                         kvm_load_guest_fpu(vcpu);
11423         }
11424
11425         if (!init_event) {
11426                 kvm_pmu_reset(vcpu);
11427                 vcpu->arch.smbase = 0x30000;
11428
11429                 vcpu->arch.msr_misc_features_enables = 0;
11430
11431                 __kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
11432                 __kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
11433         }
11434
11435         /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
11436         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
11437         kvm_register_mark_dirty(vcpu, VCPU_REGS_RSP);
11438
11439         /*
11440          * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
11441          * if no CPUID match is found.  Note, it's impossible to get a match at
11442          * RESET since KVM emulates RESET before exposing the vCPU to userspace,
11443          * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
11444          * on RESET.  But, go through the motions in case that's ever remedied.
11445          */
11446         cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
11447         kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
11448
11449         static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
11450
11451         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
11452         kvm_rip_write(vcpu, 0xfff0);
11453
11454         vcpu->arch.cr3 = 0;
11455         kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3);
11456
11457         /*
11458          * CR0.CD/NW are set on RESET, preserved on INIT.  Note, some versions
11459          * of Intel's SDM list CD/NW as being set on INIT, but they contradict
11460          * (or qualify) that with a footnote stating that CD/NW are preserved.
11461          */
11462         new_cr0 = X86_CR0_ET;
11463         if (init_event)
11464                 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD));
11465         else
11466                 new_cr0 |= X86_CR0_NW | X86_CR0_CD;
11467
11468         static_call(kvm_x86_set_cr0)(vcpu, new_cr0);
11469         static_call(kvm_x86_set_cr4)(vcpu, 0);
11470         static_call(kvm_x86_set_efer)(vcpu, 0);
11471         static_call(kvm_x86_update_exception_bitmap)(vcpu);
11472
11473         /*
11474          * On the standard CR0/CR4/EFER modification paths, there are several
11475          * complex conditions determining whether the MMU has to be reset and/or
11476          * which PCIDs have to be flushed.  However, CR0.WP and the paging-related
11477          * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
11478          * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
11479          * CR0 will be '0' prior to RESET).  So we only need to check CR0.PG here.
11480          */
11481         if (old_cr0 & X86_CR0_PG) {
11482                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11483                 kvm_mmu_reset_context(vcpu);
11484         }
11485
11486         /*
11487          * Intel's SDM states that all TLB entries are flushed on INIT.  AMD's
11488          * APM states the TLBs are untouched by INIT, but it also states that
11489          * the TLBs are flushed on "External initialization of the processor."
11490          * Flush the guest TLB regardless of vendor, there is no meaningful
11491          * benefit in relying on the guest to flush the TLB immediately after
11492          * INIT.  A spurious TLB flush is benign and likely negligible from a
11493          * performance perspective.
11494          */
11495         if (init_event)
11496                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
11497 }
11498 EXPORT_SYMBOL_GPL(kvm_vcpu_reset);
11499
11500 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
11501 {
11502         struct kvm_segment cs;
11503
11504         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
11505         cs.selector = vector << 8;
11506         cs.base = vector << 12;
11507         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
11508         kvm_rip_write(vcpu, 0);
11509 }
11510 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector);
11511
11512 int kvm_arch_hardware_enable(void)
11513 {
11514         struct kvm *kvm;
11515         struct kvm_vcpu *vcpu;
11516         unsigned long i;
11517         int ret;
11518         u64 local_tsc;
11519         u64 max_tsc = 0;
11520         bool stable, backwards_tsc = false;
11521
11522         kvm_user_return_msr_cpu_online();
11523         ret = static_call(kvm_x86_hardware_enable)();
11524         if (ret != 0)
11525                 return ret;
11526
11527         local_tsc = rdtsc();
11528         stable = !kvm_check_tsc_unstable();
11529         list_for_each_entry(kvm, &vm_list, vm_list) {
11530                 kvm_for_each_vcpu(i, vcpu, kvm) {
11531                         if (!stable && vcpu->cpu == smp_processor_id())
11532                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
11533                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
11534                                 backwards_tsc = true;
11535                                 if (vcpu->arch.last_host_tsc > max_tsc)
11536                                         max_tsc = vcpu->arch.last_host_tsc;
11537                         }
11538                 }
11539         }
11540
11541         /*
11542          * Sometimes, even reliable TSCs go backwards.  This happens on
11543          * platforms that reset TSC during suspend or hibernate actions, but
11544          * maintain synchronization.  We must compensate.  Fortunately, we can
11545          * detect that condition here, which happens early in CPU bringup,
11546          * before any KVM threads can be running.  Unfortunately, we can't
11547          * bring the TSCs fully up to date with real time, as we aren't yet far
11548          * enough into CPU bringup that we know how much real time has actually
11549          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
11550          * variables that haven't been updated yet.
11551          *
11552          * So we simply find the maximum observed TSC above, then record the
11553          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
11554          * the adjustment will be applied.  Note that we accumulate
11555          * adjustments, in case multiple suspend cycles happen before some VCPU
11556          * gets a chance to run again.  In the event that no KVM threads get a
11557          * chance to run, we will miss the entire elapsed period, as we'll have
11558          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
11559          * loose cycle time.  This isn't too big a deal, since the loss will be
11560          * uniform across all VCPUs (not to mention the scenario is extremely
11561          * unlikely). It is possible that a second hibernate recovery happens
11562          * much faster than a first, causing the observed TSC here to be
11563          * smaller; this would require additional padding adjustment, which is
11564          * why we set last_host_tsc to the local tsc observed here.
11565          *
11566          * N.B. - this code below runs only on platforms with reliable TSC,
11567          * as that is the only way backwards_tsc is set above.  Also note
11568          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
11569          * have the same delta_cyc adjustment applied if backwards_tsc
11570          * is detected.  Note further, this adjustment is only done once,
11571          * as we reset last_host_tsc on all VCPUs to stop this from being
11572          * called multiple times (one for each physical CPU bringup).
11573          *
11574          * Platforms with unreliable TSCs don't have to deal with this, they
11575          * will be compensated by the logic in vcpu_load, which sets the TSC to
11576          * catchup mode.  This will catchup all VCPUs to real time, but cannot
11577          * guarantee that they stay in perfect synchronization.
11578          */
11579         if (backwards_tsc) {
11580                 u64 delta_cyc = max_tsc - local_tsc;
11581                 list_for_each_entry(kvm, &vm_list, vm_list) {
11582                         kvm->arch.backwards_tsc_observed = true;
11583                         kvm_for_each_vcpu(i, vcpu, kvm) {
11584                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
11585                                 vcpu->arch.last_host_tsc = local_tsc;
11586                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
11587                         }
11588
11589                         /*
11590                          * We have to disable TSC offset matching.. if you were
11591                          * booting a VM while issuing an S4 host suspend....
11592                          * you may have some problem.  Solving this issue is
11593                          * left as an exercise to the reader.
11594                          */
11595                         kvm->arch.last_tsc_nsec = 0;
11596                         kvm->arch.last_tsc_write = 0;
11597                 }
11598
11599         }
11600         return 0;
11601 }
11602
11603 void kvm_arch_hardware_disable(void)
11604 {
11605         static_call(kvm_x86_hardware_disable)();
11606         drop_user_return_notifiers();
11607 }
11608
11609 int kvm_arch_hardware_setup(void *opaque)
11610 {
11611         struct kvm_x86_init_ops *ops = opaque;
11612         int r;
11613
11614         rdmsrl_safe(MSR_EFER, &host_efer);
11615
11616         if (boot_cpu_has(X86_FEATURE_XSAVES))
11617                 rdmsrl(MSR_IA32_XSS, host_xss);
11618
11619         r = ops->hardware_setup();
11620         if (r != 0)
11621                 return r;
11622
11623         memcpy(&kvm_x86_ops, ops->runtime_ops, sizeof(kvm_x86_ops));
11624         kvm_ops_static_call_update();
11625
11626         kvm_register_perf_callbacks(ops->handle_intel_pt_intr);
11627
11628         if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES))
11629                 supported_xss = 0;
11630
11631 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
11632         cr4_reserved_bits = __cr4_reserved_bits(__kvm_cpu_cap_has, UNUSED_);
11633 #undef __kvm_cpu_cap_has
11634
11635         if (kvm_has_tsc_control) {
11636                 /*
11637                  * Make sure the user can only configure tsc_khz values that
11638                  * fit into a signed integer.
11639                  * A min value is not calculated because it will always
11640                  * be 1 on all machines.
11641                  */
11642                 u64 max = min(0x7fffffffULL,
11643                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
11644                 kvm_max_guest_tsc_khz = max;
11645         }
11646         kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
11647         kvm_init_msr_list();
11648         return 0;
11649 }
11650
11651 void kvm_arch_hardware_unsetup(void)
11652 {
11653         kvm_unregister_perf_callbacks();
11654
11655         static_call(kvm_x86_hardware_unsetup)();
11656 }
11657
11658 int kvm_arch_check_processor_compat(void *opaque)
11659 {
11660         struct cpuinfo_x86 *c = &cpu_data(smp_processor_id());
11661         struct kvm_x86_init_ops *ops = opaque;
11662
11663         WARN_ON(!irqs_disabled());
11664
11665         if (__cr4_reserved_bits(cpu_has, c) !=
11666             __cr4_reserved_bits(cpu_has, &boot_cpu_data))
11667                 return -EIO;
11668
11669         return ops->check_processor_compatibility();
11670 }
11671
11672 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
11673 {
11674         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
11675 }
11676 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
11677
11678 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
11679 {
11680         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
11681 }
11682
11683 __read_mostly DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu);
11684 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu);
11685
11686 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
11687 {
11688         struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
11689
11690         vcpu->arch.l1tf_flush_l1d = true;
11691         if (pmu->version && unlikely(pmu->event_count)) {
11692                 pmu->need_cleanup = true;
11693                 kvm_make_request(KVM_REQ_PMU, vcpu);
11694         }
11695         static_call(kvm_x86_sched_in)(vcpu, cpu);
11696 }
11697
11698 void kvm_arch_free_vm(struct kvm *kvm)
11699 {
11700         kfree(to_kvm_hv(kvm)->hv_pa_pg);
11701         __kvm_arch_free_vm(kvm);
11702 }
11703
11704
11705 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
11706 {
11707         int ret;
11708         unsigned long flags;
11709
11710         if (type)
11711                 return -EINVAL;
11712
11713         ret = kvm_page_track_init(kvm);
11714         if (ret)
11715                 goto out;
11716
11717         ret = kvm_mmu_init_vm(kvm);
11718         if (ret)
11719                 goto out_page_track;
11720
11721         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
11722         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
11723         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
11724
11725         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
11726         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
11727         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
11728         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
11729                 &kvm->arch.irq_sources_bitmap);
11730
11731         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
11732         mutex_init(&kvm->arch.apic_map_lock);
11733         seqcount_raw_spinlock_init(&kvm->arch.pvclock_sc, &kvm->arch.tsc_write_lock);
11734         kvm->arch.kvmclock_offset = -get_kvmclock_base_ns();
11735
11736         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
11737         pvclock_update_vm_gtod_copy(kvm);
11738         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
11739
11740         kvm->arch.default_tsc_khz = max_tsc_khz;
11741         kvm->arch.guest_can_read_msr_platform_info = true;
11742         kvm->arch.enable_pmu = enable_pmu;
11743
11744 #if IS_ENABLED(CONFIG_HYPERV)
11745         spin_lock_init(&kvm->arch.hv_root_tdp_lock);
11746         kvm->arch.hv_root_tdp = INVALID_PAGE;
11747 #endif
11748
11749         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
11750         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
11751
11752         kvm_apicv_init(kvm);
11753         kvm_hv_init_vm(kvm);
11754         kvm_xen_init_vm(kvm);
11755
11756         return static_call(kvm_x86_vm_init)(kvm);
11757
11758 out_page_track:
11759         kvm_page_track_cleanup(kvm);
11760 out:
11761         return ret;
11762 }
11763
11764 int kvm_arch_post_init_vm(struct kvm *kvm)
11765 {
11766         return kvm_mmu_post_init_vm(kvm);
11767 }
11768
11769 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
11770 {
11771         vcpu_load(vcpu);
11772         kvm_mmu_unload(vcpu);
11773         vcpu_put(vcpu);
11774 }
11775
11776 static void kvm_free_vcpus(struct kvm *kvm)
11777 {
11778         unsigned long i;
11779         struct kvm_vcpu *vcpu;
11780
11781         /*
11782          * Unpin any mmu pages first.
11783          */
11784         kvm_for_each_vcpu(i, vcpu, kvm) {
11785                 kvm_clear_async_pf_completion_queue(vcpu);
11786                 kvm_unload_vcpu_mmu(vcpu);
11787         }
11788
11789         kvm_destroy_vcpus(kvm);
11790 }
11791
11792 void kvm_arch_sync_events(struct kvm *kvm)
11793 {
11794         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
11795         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
11796         kvm_free_pit(kvm);
11797 }
11798
11799 /**
11800  * __x86_set_memory_region: Setup KVM internal memory slot
11801  *
11802  * @kvm: the kvm pointer to the VM.
11803  * @id: the slot ID to setup.
11804  * @gpa: the GPA to install the slot (unused when @size == 0).
11805  * @size: the size of the slot. Set to zero to uninstall a slot.
11806  *
11807  * This function helps to setup a KVM internal memory slot.  Specify
11808  * @size > 0 to install a new slot, while @size == 0 to uninstall a
11809  * slot.  The return code can be one of the following:
11810  *
11811  *   HVA:           on success (uninstall will return a bogus HVA)
11812  *   -errno:        on error
11813  *
11814  * The caller should always use IS_ERR() to check the return value
11815  * before use.  Note, the KVM internal memory slots are guaranteed to
11816  * remain valid and unchanged until the VM is destroyed, i.e., the
11817  * GPA->HVA translation will not change.  However, the HVA is a user
11818  * address, i.e. its accessibility is not guaranteed, and must be
11819  * accessed via __copy_{to,from}_user().
11820  */
11821 void __user * __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa,
11822                                       u32 size)
11823 {
11824         int i, r;
11825         unsigned long hva, old_npages;
11826         struct kvm_memslots *slots = kvm_memslots(kvm);
11827         struct kvm_memory_slot *slot;
11828
11829         /* Called with kvm->slots_lock held.  */
11830         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
11831                 return ERR_PTR_USR(-EINVAL);
11832
11833         slot = id_to_memslot(slots, id);
11834         if (size) {
11835                 if (slot && slot->npages)
11836                         return ERR_PTR_USR(-EEXIST);
11837
11838                 /*
11839                  * MAP_SHARED to prevent internal slot pages from being moved
11840                  * by fork()/COW.
11841                  */
11842                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
11843                               MAP_SHARED | MAP_ANONYMOUS, 0);
11844                 if (IS_ERR((void *)hva))
11845                         return (void __user *)hva;
11846         } else {
11847                 if (!slot || !slot->npages)
11848                         return NULL;
11849
11850                 old_npages = slot->npages;
11851                 hva = slot->userspace_addr;
11852         }
11853
11854         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
11855                 struct kvm_userspace_memory_region m;
11856
11857                 m.slot = id | (i << 16);
11858                 m.flags = 0;
11859                 m.guest_phys_addr = gpa;
11860                 m.userspace_addr = hva;
11861                 m.memory_size = size;
11862                 r = __kvm_set_memory_region(kvm, &m);
11863                 if (r < 0)
11864                         return ERR_PTR_USR(r);
11865         }
11866
11867         if (!size)
11868                 vm_munmap(hva, old_npages * PAGE_SIZE);
11869
11870         return (void __user *)hva;
11871 }
11872 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
11873
11874 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
11875 {
11876         kvm_mmu_pre_destroy_vm(kvm);
11877 }
11878
11879 void kvm_arch_destroy_vm(struct kvm *kvm)
11880 {
11881         if (current->mm == kvm->mm) {
11882                 /*
11883                  * Free memory regions allocated on behalf of userspace,
11884                  * unless the the memory map has changed due to process exit
11885                  * or fd copying.
11886                  */
11887                 mutex_lock(&kvm->slots_lock);
11888                 __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
11889                                         0, 0);
11890                 __x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT,
11891                                         0, 0);
11892                 __x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
11893                 mutex_unlock(&kvm->slots_lock);
11894         }
11895         static_call_cond(kvm_x86_vm_destroy)(kvm);
11896         kvm_free_msr_filter(srcu_dereference_check(kvm->arch.msr_filter, &kvm->srcu, 1));
11897         kvm_pic_destroy(kvm);
11898         kvm_ioapic_destroy(kvm);
11899         kvm_free_vcpus(kvm);
11900         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
11901         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
11902         kvm_mmu_uninit_vm(kvm);
11903         kvm_page_track_cleanup(kvm);
11904         kvm_xen_destroy_vm(kvm);
11905         kvm_hv_destroy_vm(kvm);
11906 }
11907
11908 static void memslot_rmap_free(struct kvm_memory_slot *slot)
11909 {
11910         int i;
11911
11912         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11913                 kvfree(slot->arch.rmap[i]);
11914                 slot->arch.rmap[i] = NULL;
11915         }
11916 }
11917
11918 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot)
11919 {
11920         int i;
11921
11922         memslot_rmap_free(slot);
11923
11924         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11925                 kvfree(slot->arch.lpage_info[i - 1]);
11926                 slot->arch.lpage_info[i - 1] = NULL;
11927         }
11928
11929         kvm_page_track_free_memslot(slot);
11930 }
11931
11932 int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages)
11933 {
11934         const int sz = sizeof(*slot->arch.rmap[0]);
11935         int i;
11936
11937         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
11938                 int level = i + 1;
11939                 int lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11940
11941                 if (slot->arch.rmap[i])
11942                         continue;
11943
11944                 slot->arch.rmap[i] = __vcalloc(lpages, sz, GFP_KERNEL_ACCOUNT);
11945                 if (!slot->arch.rmap[i]) {
11946                         memslot_rmap_free(slot);
11947                         return -ENOMEM;
11948                 }
11949         }
11950
11951         return 0;
11952 }
11953
11954 static int kvm_alloc_memslot_metadata(struct kvm *kvm,
11955                                       struct kvm_memory_slot *slot)
11956 {
11957         unsigned long npages = slot->npages;
11958         int i, r;
11959
11960         /*
11961          * Clear out the previous array pointers for the KVM_MR_MOVE case.  The
11962          * old arrays will be freed by __kvm_set_memory_region() if installing
11963          * the new memslot is successful.
11964          */
11965         memset(&slot->arch, 0, sizeof(slot->arch));
11966
11967         if (kvm_memslots_have_rmaps(kvm)) {
11968                 r = memslot_rmap_alloc(slot, npages);
11969                 if (r)
11970                         return r;
11971         }
11972
11973         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
11974                 struct kvm_lpage_info *linfo;
11975                 unsigned long ugfn;
11976                 int lpages;
11977                 int level = i + 1;
11978
11979                 lpages = __kvm_mmu_slot_lpages(slot, npages, level);
11980
11981                 linfo = __vcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
11982                 if (!linfo)
11983                         goto out_free;
11984
11985                 slot->arch.lpage_info[i - 1] = linfo;
11986
11987                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
11988                         linfo[0].disallow_lpage = 1;
11989                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
11990                         linfo[lpages - 1].disallow_lpage = 1;
11991                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
11992                 /*
11993                  * If the gfn and userspace address are not aligned wrt each
11994                  * other, disable large page support for this slot.
11995                  */
11996                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1)) {
11997                         unsigned long j;
11998
11999                         for (j = 0; j < lpages; ++j)
12000                                 linfo[j].disallow_lpage = 1;
12001                 }
12002         }
12003
12004         if (kvm_page_track_create_memslot(kvm, slot, npages))
12005                 goto out_free;
12006
12007         return 0;
12008
12009 out_free:
12010         memslot_rmap_free(slot);
12011
12012         for (i = 1; i < KVM_NR_PAGE_SIZES; ++i) {
12013                 kvfree(slot->arch.lpage_info[i - 1]);
12014                 slot->arch.lpage_info[i - 1] = NULL;
12015         }
12016         return -ENOMEM;
12017 }
12018
12019 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
12020 {
12021         struct kvm_vcpu *vcpu;
12022         unsigned long i;
12023
12024         /*
12025          * memslots->generation has been incremented.
12026          * mmio generation may have reached its maximum value.
12027          */
12028         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
12029
12030         /* Force re-initialization of steal_time cache */
12031         kvm_for_each_vcpu(i, vcpu, kvm)
12032                 kvm_vcpu_kick(vcpu);
12033 }
12034
12035 int kvm_arch_prepare_memory_region(struct kvm *kvm,
12036                                    const struct kvm_memory_slot *old,
12037                                    struct kvm_memory_slot *new,
12038                                    enum kvm_mr_change change)
12039 {
12040         if (change == KVM_MR_CREATE || change == KVM_MR_MOVE)
12041                 return kvm_alloc_memslot_metadata(kvm, new);
12042
12043         if (change == KVM_MR_FLAGS_ONLY)
12044                 memcpy(&new->arch, &old->arch, sizeof(old->arch));
12045         else if (WARN_ON_ONCE(change != KVM_MR_DELETE))
12046                 return -EIO;
12047
12048         return 0;
12049 }
12050
12051
12052 static void kvm_mmu_update_cpu_dirty_logging(struct kvm *kvm, bool enable)
12053 {
12054         struct kvm_arch *ka = &kvm->arch;
12055
12056         if (!kvm_x86_ops.cpu_dirty_log_size)
12057                 return;
12058
12059         if ((enable && ++ka->cpu_dirty_logging_count == 1) ||
12060             (!enable && --ka->cpu_dirty_logging_count == 0))
12061                 kvm_make_all_cpus_request(kvm, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING);
12062
12063         WARN_ON_ONCE(ka->cpu_dirty_logging_count < 0);
12064 }
12065
12066 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
12067                                      struct kvm_memory_slot *old,
12068                                      const struct kvm_memory_slot *new,
12069                                      enum kvm_mr_change change)
12070 {
12071         u32 old_flags = old ? old->flags : 0;
12072         u32 new_flags = new ? new->flags : 0;
12073         bool log_dirty_pages = new_flags & KVM_MEM_LOG_DIRTY_PAGES;
12074
12075         /*
12076          * Update CPU dirty logging if dirty logging is being toggled.  This
12077          * applies to all operations.
12078          */
12079         if ((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)
12080                 kvm_mmu_update_cpu_dirty_logging(kvm, log_dirty_pages);
12081
12082         /*
12083          * Nothing more to do for RO slots (which can't be dirtied and can't be
12084          * made writable) or CREATE/MOVE/DELETE of a slot.
12085          *
12086          * For a memslot with dirty logging disabled:
12087          * CREATE:      No dirty mappings will already exist.
12088          * MOVE/DELETE: The old mappings will already have been cleaned up by
12089          *              kvm_arch_flush_shadow_memslot()
12090          *
12091          * For a memslot with dirty logging enabled:
12092          * CREATE:      No shadow pages exist, thus nothing to write-protect
12093          *              and no dirty bits to clear.
12094          * MOVE/DELETE: The old mappings will already have been cleaned up by
12095          *              kvm_arch_flush_shadow_memslot().
12096          */
12097         if ((change != KVM_MR_FLAGS_ONLY) || (new_flags & KVM_MEM_READONLY))
12098                 return;
12099
12100         /*
12101          * READONLY and non-flags changes were filtered out above, and the only
12102          * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12103          * logging isn't being toggled on or off.
12104          */
12105         if (WARN_ON_ONCE(!((old_flags ^ new_flags) & KVM_MEM_LOG_DIRTY_PAGES)))
12106                 return;
12107
12108         if (!log_dirty_pages) {
12109                 /*
12110                  * Dirty logging tracks sptes in 4k granularity, meaning that
12111                  * large sptes have to be split.  If live migration succeeds,
12112                  * the guest in the source machine will be destroyed and large
12113                  * sptes will be created in the destination.  However, if the
12114                  * guest continues to run in the source machine (for example if
12115                  * live migration fails), small sptes will remain around and
12116                  * cause bad performance.
12117                  *
12118                  * Scan sptes if dirty logging has been stopped, dropping those
12119                  * which can be collapsed into a single large-page spte.  Later
12120                  * page faults will create the large-page sptes.
12121                  */
12122                 kvm_mmu_zap_collapsible_sptes(kvm, new);
12123         } else {
12124                 /*
12125                  * Initially-all-set does not require write protecting any page,
12126                  * because they're all assumed to be dirty.
12127                  */
12128                 if (kvm_dirty_log_manual_protect_and_init_set(kvm))
12129                         return;
12130
12131                 if (READ_ONCE(eager_page_split))
12132                         kvm_mmu_slot_try_split_huge_pages(kvm, new, PG_LEVEL_4K);
12133
12134                 if (kvm_x86_ops.cpu_dirty_log_size) {
12135                         kvm_mmu_slot_leaf_clear_dirty(kvm, new);
12136                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_2M);
12137                 } else {
12138                         kvm_mmu_slot_remove_write_access(kvm, new, PG_LEVEL_4K);
12139                 }
12140         }
12141 }
12142
12143 void kvm_arch_commit_memory_region(struct kvm *kvm,
12144                                 struct kvm_memory_slot *old,
12145                                 const struct kvm_memory_slot *new,
12146                                 enum kvm_mr_change change)
12147 {
12148         if (!kvm->arch.n_requested_mmu_pages &&
12149             (change == KVM_MR_CREATE || change == KVM_MR_DELETE)) {
12150                 unsigned long nr_mmu_pages;
12151
12152                 nr_mmu_pages = kvm->nr_memslot_pages / KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO;
12153                 nr_mmu_pages = max(nr_mmu_pages, KVM_MIN_ALLOC_MMU_PAGES);
12154                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
12155         }
12156
12157         kvm_mmu_slot_apply_flags(kvm, old, new, change);
12158
12159         /* Free the arrays associated with the old memslot. */
12160         if (change == KVM_MR_MOVE)
12161                 kvm_arch_free_memslot(kvm, old);
12162 }
12163
12164 void kvm_arch_flush_shadow_all(struct kvm *kvm)
12165 {
12166         kvm_mmu_zap_all(kvm);
12167 }
12168
12169 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
12170                                    struct kvm_memory_slot *slot)
12171 {
12172         kvm_page_track_flush_slot(kvm, slot);
12173 }
12174
12175 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
12176 {
12177         return (is_guest_mode(vcpu) &&
12178                 static_call(kvm_x86_guest_apic_has_interrupt)(vcpu));
12179 }
12180
12181 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
12182 {
12183         if (!list_empty_careful(&vcpu->async_pf.done))
12184                 return true;
12185
12186         if (kvm_apic_has_events(vcpu))
12187                 return true;
12188
12189         if (vcpu->arch.pv.pv_unhalted)
12190                 return true;
12191
12192         if (vcpu->arch.exception.pending)
12193                 return true;
12194
12195         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12196             (vcpu->arch.nmi_pending &&
12197              static_call(kvm_x86_nmi_allowed)(vcpu, false)))
12198                 return true;
12199
12200         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
12201             (vcpu->arch.smi_pending &&
12202              static_call(kvm_x86_smi_allowed)(vcpu, false)))
12203                 return true;
12204
12205         if (kvm_arch_interrupt_allowed(vcpu) &&
12206             (kvm_cpu_has_interrupt(vcpu) ||
12207             kvm_guest_apic_has_interrupt(vcpu)))
12208                 return true;
12209
12210         if (kvm_hv_has_stimer_pending(vcpu))
12211                 return true;
12212
12213         if (is_guest_mode(vcpu) &&
12214             kvm_x86_ops.nested_ops->hv_timer_pending &&
12215             kvm_x86_ops.nested_ops->hv_timer_pending(vcpu))
12216                 return true;
12217
12218         if (kvm_xen_has_pending_events(vcpu))
12219                 return true;
12220
12221         return false;
12222 }
12223
12224 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
12225 {
12226         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
12227 }
12228
12229 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu *vcpu)
12230 {
12231         if (vcpu->arch.apicv_active && static_call(kvm_x86_dy_apicv_has_pending_interrupt)(vcpu))
12232                 return true;
12233
12234         return false;
12235 }
12236
12237 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
12238 {
12239         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
12240                 return true;
12241
12242         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
12243                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
12244                  kvm_test_request(KVM_REQ_EVENT, vcpu))
12245                 return true;
12246
12247         return kvm_arch_dy_has_pending_interrupt(vcpu);
12248 }
12249
12250 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
12251 {
12252         if (vcpu->arch.guest_state_protected)
12253                 return true;
12254
12255         return vcpu->arch.preempted_in_kernel;
12256 }
12257
12258 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
12259 {
12260         return kvm_rip_read(vcpu);
12261 }
12262
12263 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
12264 {
12265         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
12266 }
12267
12268 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
12269 {
12270         return static_call(kvm_x86_interrupt_allowed)(vcpu, false);
12271 }
12272
12273 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
12274 {
12275         /* Can't read the RIP when guest state is protected, just return 0 */
12276         if (vcpu->arch.guest_state_protected)
12277                 return 0;
12278
12279         if (is_64_bit_mode(vcpu))
12280                 return kvm_rip_read(vcpu);
12281         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
12282                      kvm_rip_read(vcpu));
12283 }
12284 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
12285
12286 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
12287 {
12288         return kvm_get_linear_rip(vcpu) == linear_rip;
12289 }
12290 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
12291
12292 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
12293 {
12294         unsigned long rflags;
12295
12296         rflags = static_call(kvm_x86_get_rflags)(vcpu);
12297         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
12298                 rflags &= ~X86_EFLAGS_TF;
12299         return rflags;
12300 }
12301 EXPORT_SYMBOL_GPL(kvm_get_rflags);
12302
12303 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12304 {
12305         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
12306             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
12307                 rflags |= X86_EFLAGS_TF;
12308         static_call(kvm_x86_set_rflags)(vcpu, rflags);
12309 }
12310
12311 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
12312 {
12313         __kvm_set_rflags(vcpu, rflags);
12314         kvm_make_request(KVM_REQ_EVENT, vcpu);
12315 }
12316 EXPORT_SYMBOL_GPL(kvm_set_rflags);
12317
12318 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
12319 {
12320         int r;
12321
12322         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
12323               work->wakeup_all)
12324                 return;
12325
12326         r = kvm_mmu_reload(vcpu);
12327         if (unlikely(r))
12328                 return;
12329
12330         if (!vcpu->arch.mmu->direct_map &&
12331               work->arch.cr3 != vcpu->arch.mmu->get_guest_pgd(vcpu))
12332                 return;
12333
12334         kvm_mmu_do_page_fault(vcpu, work->cr2_or_gpa, 0, true);
12335 }
12336
12337 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
12338 {
12339         BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU));
12340
12341         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
12342 }
12343
12344 static inline u32 kvm_async_pf_next_probe(u32 key)
12345 {
12346         return (key + 1) & (ASYNC_PF_PER_VCPU - 1);
12347 }
12348
12349 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12350 {
12351         u32 key = kvm_async_pf_hash_fn(gfn);
12352
12353         while (vcpu->arch.apf.gfns[key] != ~0)
12354                 key = kvm_async_pf_next_probe(key);
12355
12356         vcpu->arch.apf.gfns[key] = gfn;
12357 }
12358
12359 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
12360 {
12361         int i;
12362         u32 key = kvm_async_pf_hash_fn(gfn);
12363
12364         for (i = 0; i < ASYNC_PF_PER_VCPU &&
12365                      (vcpu->arch.apf.gfns[key] != gfn &&
12366                       vcpu->arch.apf.gfns[key] != ~0); i++)
12367                 key = kvm_async_pf_next_probe(key);
12368
12369         return key;
12370 }
12371
12372 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12373 {
12374         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
12375 }
12376
12377 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
12378 {
12379         u32 i, j, k;
12380
12381         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
12382
12383         if (WARN_ON_ONCE(vcpu->arch.apf.gfns[i] != gfn))
12384                 return;
12385
12386         while (true) {
12387                 vcpu->arch.apf.gfns[i] = ~0;
12388                 do {
12389                         j = kvm_async_pf_next_probe(j);
12390                         if (vcpu->arch.apf.gfns[j] == ~0)
12391                                 return;
12392                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
12393                         /*
12394                          * k lies cyclically in ]i,j]
12395                          * |    i.k.j |
12396                          * |....j i.k.| or  |.k..j i...|
12397                          */
12398                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
12399                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
12400                 i = j;
12401         }
12402 }
12403
12404 static inline int apf_put_user_notpresent(struct kvm_vcpu *vcpu)
12405 {
12406         u32 reason = KVM_PV_REASON_PAGE_NOT_PRESENT;
12407
12408         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &reason,
12409                                       sizeof(reason));
12410 }
12411
12412 static inline int apf_put_user_ready(struct kvm_vcpu *vcpu, u32 token)
12413 {
12414         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12415
12416         return kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12417                                              &token, offset, sizeof(token));
12418 }
12419
12420 static inline bool apf_pageready_slot_free(struct kvm_vcpu *vcpu)
12421 {
12422         unsigned int offset = offsetof(struct kvm_vcpu_pv_apf_data, token);
12423         u32 val;
12424
12425         if (kvm_read_guest_offset_cached(vcpu->kvm, &vcpu->arch.apf.data,
12426                                          &val, offset, sizeof(val)))
12427                 return false;
12428
12429         return !val;
12430 }
12431
12432 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
12433 {
12434
12435         if (!kvm_pv_async_pf_enabled(vcpu))
12436                 return false;
12437
12438         if (vcpu->arch.apf.send_user_only &&
12439             static_call(kvm_x86_get_cpl)(vcpu) == 0)
12440                 return false;
12441
12442         if (is_guest_mode(vcpu)) {
12443                 /*
12444                  * L1 needs to opt into the special #PF vmexits that are
12445                  * used to deliver async page faults.
12446                  */
12447                 return vcpu->arch.apf.delivery_as_pf_vmexit;
12448         } else {
12449                 /*
12450                  * Play it safe in case the guest temporarily disables paging.
12451                  * The real mode IDT in particular is unlikely to have a #PF
12452                  * exception setup.
12453                  */
12454                 return is_paging(vcpu);
12455         }
12456 }
12457
12458 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
12459 {
12460         if (unlikely(!lapic_in_kernel(vcpu) ||
12461                      kvm_event_needs_reinjection(vcpu) ||
12462                      vcpu->arch.exception.pending))
12463                 return false;
12464
12465         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
12466                 return false;
12467
12468         /*
12469          * If interrupts are off we cannot even use an artificial
12470          * halt state.
12471          */
12472         return kvm_arch_interrupt_allowed(vcpu);
12473 }
12474
12475 bool kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
12476                                      struct kvm_async_pf *work)
12477 {
12478         struct x86_exception fault;
12479
12480         trace_kvm_async_pf_not_present(work->arch.token, work->cr2_or_gpa);
12481         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
12482
12483         if (kvm_can_deliver_async_pf(vcpu) &&
12484             !apf_put_user_notpresent(vcpu)) {
12485                 fault.vector = PF_VECTOR;
12486                 fault.error_code_valid = true;
12487                 fault.error_code = 0;
12488                 fault.nested_page_fault = false;
12489                 fault.address = work->arch.token;
12490                 fault.async_page_fault = true;
12491                 kvm_inject_page_fault(vcpu, &fault);
12492                 return true;
12493         } else {
12494                 /*
12495                  * It is not possible to deliver a paravirtualized asynchronous
12496                  * page fault, but putting the guest in an artificial halt state
12497                  * can be beneficial nevertheless: if an interrupt arrives, we
12498                  * can deliver it timely and perhaps the guest will schedule
12499                  * another process.  When the instruction that triggered a page
12500                  * fault is retried, hopefully the page will be ready in the host.
12501                  */
12502                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
12503                 return false;
12504         }
12505 }
12506
12507 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
12508                                  struct kvm_async_pf *work)
12509 {
12510         struct kvm_lapic_irq irq = {
12511                 .delivery_mode = APIC_DM_FIXED,
12512                 .vector = vcpu->arch.apf.vec
12513         };
12514
12515         if (work->wakeup_all)
12516                 work->arch.token = ~0; /* broadcast wakeup */
12517         else
12518                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
12519         trace_kvm_async_pf_ready(work->arch.token, work->cr2_or_gpa);
12520
12521         if ((work->wakeup_all || work->notpresent_injected) &&
12522             kvm_pv_async_pf_enabled(vcpu) &&
12523             !apf_put_user_ready(vcpu, work->arch.token)) {
12524                 vcpu->arch.apf.pageready_pending = true;
12525                 kvm_apic_set_irq(vcpu, &irq, NULL);
12526         }
12527
12528         vcpu->arch.apf.halted = false;
12529         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
12530 }
12531
12532 void kvm_arch_async_page_present_queued(struct kvm_vcpu *vcpu)
12533 {
12534         kvm_make_request(KVM_REQ_APF_READY, vcpu);
12535         if (!vcpu->arch.apf.pageready_pending)
12536                 kvm_vcpu_kick(vcpu);
12537 }
12538
12539 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu *vcpu)
12540 {
12541         if (!kvm_pv_async_pf_enabled(vcpu))
12542                 return true;
12543         else
12544                 return kvm_lapic_enabled(vcpu) && apf_pageready_slot_free(vcpu);
12545 }
12546
12547 void kvm_arch_start_assignment(struct kvm *kvm)
12548 {
12549         if (atomic_inc_return(&kvm->arch.assigned_device_count) == 1)
12550                 static_call_cond(kvm_x86_pi_start_assignment)(kvm);
12551 }
12552 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
12553
12554 void kvm_arch_end_assignment(struct kvm *kvm)
12555 {
12556         atomic_dec(&kvm->arch.assigned_device_count);
12557 }
12558 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
12559
12560 bool kvm_arch_has_assigned_device(struct kvm *kvm)
12561 {
12562         return atomic_read(&kvm->arch.assigned_device_count);
12563 }
12564 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
12565
12566 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
12567 {
12568         atomic_inc(&kvm->arch.noncoherent_dma_count);
12569 }
12570 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
12571
12572 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
12573 {
12574         atomic_dec(&kvm->arch.noncoherent_dma_count);
12575 }
12576 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
12577
12578 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
12579 {
12580         return atomic_read(&kvm->arch.noncoherent_dma_count);
12581 }
12582 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
12583
12584 bool kvm_arch_has_irq_bypass(void)
12585 {
12586         return true;
12587 }
12588
12589 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
12590                                       struct irq_bypass_producer *prod)
12591 {
12592         struct kvm_kernel_irqfd *irqfd =
12593                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12594         int ret;
12595
12596         irqfd->producer = prod;
12597         kvm_arch_start_assignment(irqfd->kvm);
12598         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm,
12599                                          prod->irq, irqfd->gsi, 1);
12600
12601         if (ret)
12602                 kvm_arch_end_assignment(irqfd->kvm);
12603
12604         return ret;
12605 }
12606
12607 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
12608                                       struct irq_bypass_producer *prod)
12609 {
12610         int ret;
12611         struct kvm_kernel_irqfd *irqfd =
12612                 container_of(cons, struct kvm_kernel_irqfd, consumer);
12613
12614         WARN_ON(irqfd->producer != prod);
12615         irqfd->producer = NULL;
12616
12617         /*
12618          * When producer of consumer is unregistered, we change back to
12619          * remapped mode, so we can re-use the current implementation
12620          * when the irq is masked/disabled or the consumer side (KVM
12621          * int this case doesn't want to receive the interrupts.
12622         */
12623         ret = static_call(kvm_x86_pi_update_irte)(irqfd->kvm, prod->irq, irqfd->gsi, 0);
12624         if (ret)
12625                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
12626                        " fails: %d\n", irqfd->consumer.token, ret);
12627
12628         kvm_arch_end_assignment(irqfd->kvm);
12629 }
12630
12631 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
12632                                    uint32_t guest_irq, bool set)
12633 {
12634         return static_call(kvm_x86_pi_update_irte)(kvm, host_irq, guest_irq, set);
12635 }
12636
12637 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry *old,
12638                                   struct kvm_kernel_irq_routing_entry *new)
12639 {
12640         if (new->type != KVM_IRQ_ROUTING_MSI)
12641                 return true;
12642
12643         return !!memcmp(&old->msi, &new->msi, sizeof(new->msi));
12644 }
12645
12646 bool kvm_vector_hashing_enabled(void)
12647 {
12648         return vector_hashing;
12649 }
12650
12651 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
12652 {
12653         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
12654 }
12655 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
12656
12657
12658 int kvm_spec_ctrl_test_value(u64 value)
12659 {
12660         /*
12661          * test that setting IA32_SPEC_CTRL to given value
12662          * is allowed by the host processor
12663          */
12664
12665         u64 saved_value;
12666         unsigned long flags;
12667         int ret = 0;
12668
12669         local_irq_save(flags);
12670
12671         if (rdmsrl_safe(MSR_IA32_SPEC_CTRL, &saved_value))
12672                 ret = 1;
12673         else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL, value))
12674                 ret = 1;
12675         else
12676                 wrmsrl(MSR_IA32_SPEC_CTRL, saved_value);
12677
12678         local_irq_restore(flags);
12679
12680         return ret;
12681 }
12682 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value);
12683
12684 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu *vcpu, gva_t gva, u16 error_code)
12685 {
12686         struct kvm_mmu *mmu = vcpu->arch.walk_mmu;
12687         struct x86_exception fault;
12688         u64 access = error_code &
12689                 (PFERR_WRITE_MASK | PFERR_FETCH_MASK | PFERR_USER_MASK);
12690
12691         if (!(error_code & PFERR_PRESENT_MASK) ||
12692             mmu->gva_to_gpa(vcpu, mmu, gva, access, &fault) != UNMAPPED_GVA) {
12693                 /*
12694                  * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
12695                  * tables probably do not match the TLB.  Just proceed
12696                  * with the error code that the processor gave.
12697                  */
12698                 fault.vector = PF_VECTOR;
12699                 fault.error_code_valid = true;
12700                 fault.error_code = error_code;
12701                 fault.nested_page_fault = false;
12702                 fault.address = gva;
12703         }
12704         vcpu->arch.walk_mmu->inject_page_fault(vcpu, &fault);
12705 }
12706 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error);
12707
12708 /*
12709  * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
12710  * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
12711  * indicates whether exit to userspace is needed.
12712  */
12713 int kvm_handle_memory_failure(struct kvm_vcpu *vcpu, int r,
12714                               struct x86_exception *e)
12715 {
12716         if (r == X86EMUL_PROPAGATE_FAULT) {
12717                 kvm_inject_emulated_page_fault(vcpu, e);
12718                 return 1;
12719         }
12720
12721         /*
12722          * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
12723          * while handling a VMX instruction KVM could've handled the request
12724          * correctly by exiting to userspace and performing I/O but there
12725          * doesn't seem to be a real use-case behind such requests, just return
12726          * KVM_EXIT_INTERNAL_ERROR for now.
12727          */
12728         kvm_prepare_emulation_failure_exit(vcpu);
12729
12730         return 0;
12731 }
12732 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure);
12733
12734 int kvm_handle_invpcid(struct kvm_vcpu *vcpu, unsigned long type, gva_t gva)
12735 {
12736         bool pcid_enabled;
12737         struct x86_exception e;
12738         struct {
12739                 u64 pcid;
12740                 u64 gla;
12741         } operand;
12742         int r;
12743
12744         r = kvm_read_guest_virt(vcpu, gva, &operand, sizeof(operand), &e);
12745         if (r != X86EMUL_CONTINUE)
12746                 return kvm_handle_memory_failure(vcpu, r, &e);
12747
12748         if (operand.pcid >> 12 != 0) {
12749                 kvm_inject_gp(vcpu, 0);
12750                 return 1;
12751         }
12752
12753         pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
12754
12755         switch (type) {
12756         case INVPCID_TYPE_INDIV_ADDR:
12757                 if ((!pcid_enabled && (operand.pcid != 0)) ||
12758                     is_noncanonical_address(operand.gla, vcpu)) {
12759                         kvm_inject_gp(vcpu, 0);
12760                         return 1;
12761                 }
12762                 kvm_mmu_invpcid_gva(vcpu, operand.gla, operand.pcid);
12763                 return kvm_skip_emulated_instruction(vcpu);
12764
12765         case INVPCID_TYPE_SINGLE_CTXT:
12766                 if (!pcid_enabled && (operand.pcid != 0)) {
12767                         kvm_inject_gp(vcpu, 0);
12768                         return 1;
12769                 }
12770
12771                 kvm_invalidate_pcid(vcpu, operand.pcid);
12772                 return kvm_skip_emulated_instruction(vcpu);
12773
12774         case INVPCID_TYPE_ALL_NON_GLOBAL:
12775                 /*
12776                  * Currently, KVM doesn't mark global entries in the shadow
12777                  * page tables, so a non-global flush just degenerates to a
12778                  * global flush. If needed, we could optimize this later by
12779                  * keeping track of global entries in shadow page tables.
12780                  */
12781
12782                 fallthrough;
12783         case INVPCID_TYPE_ALL_INCL_GLOBAL:
12784                 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu);
12785                 return kvm_skip_emulated_instruction(vcpu);
12786
12787         default:
12788                 kvm_inject_gp(vcpu, 0);
12789                 return 1;
12790         }
12791 }
12792 EXPORT_SYMBOL_GPL(kvm_handle_invpcid);
12793
12794 static int complete_sev_es_emulated_mmio(struct kvm_vcpu *vcpu)
12795 {
12796         struct kvm_run *run = vcpu->run;
12797         struct kvm_mmio_fragment *frag;
12798         unsigned int len;
12799
12800         BUG_ON(!vcpu->mmio_needed);
12801
12802         /* Complete previous fragment */
12803         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
12804         len = min(8u, frag->len);
12805         if (!vcpu->mmio_is_write)
12806                 memcpy(frag->data, run->mmio.data, len);
12807
12808         if (frag->len <= 8) {
12809                 /* Switch to the next fragment. */
12810                 frag++;
12811                 vcpu->mmio_cur_fragment++;
12812         } else {
12813                 /* Go forward to the next mmio piece. */
12814                 frag->data += len;
12815                 frag->gpa += len;
12816                 frag->len -= len;
12817         }
12818
12819         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
12820                 vcpu->mmio_needed = 0;
12821
12822                 // VMG change, at this point, we're always done
12823                 // RIP has already been advanced
12824                 return 1;
12825         }
12826
12827         // More MMIO is needed
12828         run->mmio.phys_addr = frag->gpa;
12829         run->mmio.len = min(8u, frag->len);
12830         run->mmio.is_write = vcpu->mmio_is_write;
12831         if (run->mmio.is_write)
12832                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
12833         run->exit_reason = KVM_EXIT_MMIO;
12834
12835         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12836
12837         return 0;
12838 }
12839
12840 int kvm_sev_es_mmio_write(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12841                           void *data)
12842 {
12843         int handled;
12844         struct kvm_mmio_fragment *frag;
12845
12846         if (!data)
12847                 return -EINVAL;
12848
12849         handled = write_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12850         if (handled == bytes)
12851                 return 1;
12852
12853         bytes -= handled;
12854         gpa += handled;
12855         data += handled;
12856
12857         /*TODO: Check if need to increment number of frags */
12858         frag = vcpu->mmio_fragments;
12859         vcpu->mmio_nr_fragments = 1;
12860         frag->len = bytes;
12861         frag->gpa = gpa;
12862         frag->data = data;
12863
12864         vcpu->mmio_needed = 1;
12865         vcpu->mmio_cur_fragment = 0;
12866
12867         vcpu->run->mmio.phys_addr = gpa;
12868         vcpu->run->mmio.len = min(8u, frag->len);
12869         vcpu->run->mmio.is_write = 1;
12870         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
12871         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12872
12873         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12874
12875         return 0;
12876 }
12877 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write);
12878
12879 int kvm_sev_es_mmio_read(struct kvm_vcpu *vcpu, gpa_t gpa, unsigned int bytes,
12880                          void *data)
12881 {
12882         int handled;
12883         struct kvm_mmio_fragment *frag;
12884
12885         if (!data)
12886                 return -EINVAL;
12887
12888         handled = read_emultor.read_write_mmio(vcpu, gpa, bytes, data);
12889         if (handled == bytes)
12890                 return 1;
12891
12892         bytes -= handled;
12893         gpa += handled;
12894         data += handled;
12895
12896         /*TODO: Check if need to increment number of frags */
12897         frag = vcpu->mmio_fragments;
12898         vcpu->mmio_nr_fragments = 1;
12899         frag->len = bytes;
12900         frag->gpa = gpa;
12901         frag->data = data;
12902
12903         vcpu->mmio_needed = 1;
12904         vcpu->mmio_cur_fragment = 0;
12905
12906         vcpu->run->mmio.phys_addr = gpa;
12907         vcpu->run->mmio.len = min(8u, frag->len);
12908         vcpu->run->mmio.is_write = 0;
12909         vcpu->run->exit_reason = KVM_EXIT_MMIO;
12910
12911         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_mmio;
12912
12913         return 0;
12914 }
12915 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read);
12916
12917 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12918                            unsigned int port);
12919
12920 static int complete_sev_es_emulated_outs(struct kvm_vcpu *vcpu)
12921 {
12922         int size = vcpu->arch.pio.size;
12923         int port = vcpu->arch.pio.port;
12924
12925         vcpu->arch.pio.count = 0;
12926         if (vcpu->arch.sev_pio_count)
12927                 return kvm_sev_es_outs(vcpu, size, port);
12928         return 1;
12929 }
12930
12931 static int kvm_sev_es_outs(struct kvm_vcpu *vcpu, unsigned int size,
12932                            unsigned int port)
12933 {
12934         for (;;) {
12935                 unsigned int count =
12936                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12937                 int ret = emulator_pio_out(vcpu, size, port, vcpu->arch.sev_pio_data, count);
12938
12939                 /* memcpy done already by emulator_pio_out.  */
12940                 vcpu->arch.sev_pio_count -= count;
12941                 vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12942                 if (!ret)
12943                         break;
12944
12945                 /* Emulation done by the kernel.  */
12946                 if (!vcpu->arch.sev_pio_count)
12947                         return 1;
12948         }
12949
12950         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_outs;
12951         return 0;
12952 }
12953
12954 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12955                           unsigned int port);
12956
12957 static void advance_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12958 {
12959         unsigned count = vcpu->arch.pio.count;
12960         complete_emulator_pio_in(vcpu, vcpu->arch.sev_pio_data);
12961         vcpu->arch.sev_pio_count -= count;
12962         vcpu->arch.sev_pio_data += count * vcpu->arch.pio.size;
12963 }
12964
12965 static int complete_sev_es_emulated_ins(struct kvm_vcpu *vcpu)
12966 {
12967         int size = vcpu->arch.pio.size;
12968         int port = vcpu->arch.pio.port;
12969
12970         advance_sev_es_emulated_ins(vcpu);
12971         if (vcpu->arch.sev_pio_count)
12972                 return kvm_sev_es_ins(vcpu, size, port);
12973         return 1;
12974 }
12975
12976 static int kvm_sev_es_ins(struct kvm_vcpu *vcpu, unsigned int size,
12977                           unsigned int port)
12978 {
12979         for (;;) {
12980                 unsigned int count =
12981                         min_t(unsigned int, PAGE_SIZE / size, vcpu->arch.sev_pio_count);
12982                 if (!__emulator_pio_in(vcpu, size, port, count))
12983                         break;
12984
12985                 /* Emulation done by the kernel.  */
12986                 advance_sev_es_emulated_ins(vcpu);
12987                 if (!vcpu->arch.sev_pio_count)
12988                         return 1;
12989         }
12990
12991         vcpu->arch.complete_userspace_io = complete_sev_es_emulated_ins;
12992         return 0;
12993 }
12994
12995 int kvm_sev_es_string_io(struct kvm_vcpu *vcpu, unsigned int size,
12996                          unsigned int port, void *data,  unsigned int count,
12997                          int in)
12998 {
12999         vcpu->arch.sev_pio_data = data;
13000         vcpu->arch.sev_pio_count = count;
13001         return in ? kvm_sev_es_ins(vcpu, size, port)
13002                   : kvm_sev_es_outs(vcpu, size, port);
13003 }
13004 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io);
13005
13006 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry);
13007 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
13008 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
13009 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
13010 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
13011 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
13012 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
13013 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
13014 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
13015 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
13016 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
13017 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
13018 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
13019 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
13020 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
13021 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
13022 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
13023 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
13024 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
13025 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
13026 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);
13027 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log);
13028 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq);
13029 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter);
13030 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit);
13031 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter);
13032 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit);