1 /* cnic.c: Broadcom CNIC core network driver.
3 * Copyright (c) 2006-2012 Broadcom Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #include <linux/prefetch.h>
31 #include <linux/random.h>
32 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
37 #include <net/route.h>
39 #include <net/ip6_route.h>
40 #include <net/ip6_checksum.h>
41 #include <scsi/iscsi_if.h>
45 #include "bnx2x/bnx2x_reg.h"
46 #include "bnx2x/bnx2x_fw_defs.h"
47 #include "bnx2x/bnx2x_hsi.h"
48 #include "../../../scsi/bnx2i/57xx_iscsi_constants.h"
49 #include "../../../scsi/bnx2i/57xx_iscsi_hsi.h"
51 #include "cnic_defs.h"
53 #define DRV_MODULE_NAME "cnic"
55 static char version[] __devinitdata =
56 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
60 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
61 MODULE_LICENSE("GPL");
62 MODULE_VERSION(CNIC_MODULE_VERSION);
64 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
65 static LIST_HEAD(cnic_dev_list);
66 static LIST_HEAD(cnic_udev_list);
67 static DEFINE_RWLOCK(cnic_dev_lock);
68 static DEFINE_MUTEX(cnic_lock);
70 static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
72 /* helper function, assuming cnic_lock is held */
73 static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
75 return rcu_dereference_protected(cnic_ulp_tbl[type],
76 lockdep_is_held(&cnic_lock));
79 static int cnic_service_bnx2(void *, void *);
80 static int cnic_service_bnx2x(void *, void *);
81 static int cnic_ctl(void *, struct cnic_ctl_info *);
83 static struct cnic_ops cnic_bnx2_ops = {
84 .cnic_owner = THIS_MODULE,
85 .cnic_handler = cnic_service_bnx2,
89 static struct cnic_ops cnic_bnx2x_ops = {
90 .cnic_owner = THIS_MODULE,
91 .cnic_handler = cnic_service_bnx2x,
95 static struct workqueue_struct *cnic_wq;
97 static void cnic_shutdown_rings(struct cnic_dev *);
98 static void cnic_init_rings(struct cnic_dev *);
99 static int cnic_cm_set_pg(struct cnic_sock *);
101 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
103 struct cnic_uio_dev *udev = uinfo->priv;
104 struct cnic_dev *dev;
106 if (!capable(CAP_NET_ADMIN))
109 if (udev->uio_dev != -1)
115 if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
120 udev->uio_dev = iminor(inode);
122 cnic_shutdown_rings(dev);
123 cnic_init_rings(dev);
129 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
131 struct cnic_uio_dev *udev = uinfo->priv;
137 static inline void cnic_hold(struct cnic_dev *dev)
139 atomic_inc(&dev->ref_count);
142 static inline void cnic_put(struct cnic_dev *dev)
144 atomic_dec(&dev->ref_count);
147 static inline void csk_hold(struct cnic_sock *csk)
149 atomic_inc(&csk->ref_count);
152 static inline void csk_put(struct cnic_sock *csk)
154 atomic_dec(&csk->ref_count);
157 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
159 struct cnic_dev *cdev;
161 read_lock(&cnic_dev_lock);
162 list_for_each_entry(cdev, &cnic_dev_list, list) {
163 if (netdev == cdev->netdev) {
165 read_unlock(&cnic_dev_lock);
169 read_unlock(&cnic_dev_lock);
173 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
175 atomic_inc(&ulp_ops->ref_count);
178 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
180 atomic_dec(&ulp_ops->ref_count);
183 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
185 struct cnic_local *cp = dev->cnic_priv;
186 struct cnic_eth_dev *ethdev = cp->ethdev;
187 struct drv_ctl_info info;
188 struct drv_ctl_io *io = &info.data.io;
190 info.cmd = DRV_CTL_CTX_WR_CMD;
191 io->cid_addr = cid_addr;
194 ethdev->drv_ctl(dev->netdev, &info);
197 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
199 struct cnic_local *cp = dev->cnic_priv;
200 struct cnic_eth_dev *ethdev = cp->ethdev;
201 struct drv_ctl_info info;
202 struct drv_ctl_io *io = &info.data.io;
204 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
207 ethdev->drv_ctl(dev->netdev, &info);
210 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
212 struct cnic_local *cp = dev->cnic_priv;
213 struct cnic_eth_dev *ethdev = cp->ethdev;
214 struct drv_ctl_info info;
215 struct drv_ctl_l2_ring *ring = &info.data.ring;
218 info.cmd = DRV_CTL_START_L2_CMD;
220 info.cmd = DRV_CTL_STOP_L2_CMD;
223 ring->client_id = cl_id;
224 ethdev->drv_ctl(dev->netdev, &info);
227 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
229 struct cnic_local *cp = dev->cnic_priv;
230 struct cnic_eth_dev *ethdev = cp->ethdev;
231 struct drv_ctl_info info;
232 struct drv_ctl_io *io = &info.data.io;
234 info.cmd = DRV_CTL_IO_WR_CMD;
237 ethdev->drv_ctl(dev->netdev, &info);
240 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
242 struct cnic_local *cp = dev->cnic_priv;
243 struct cnic_eth_dev *ethdev = cp->ethdev;
244 struct drv_ctl_info info;
245 struct drv_ctl_io *io = &info.data.io;
247 info.cmd = DRV_CTL_IO_RD_CMD;
249 ethdev->drv_ctl(dev->netdev, &info);
253 static void cnic_ulp_ctl(struct cnic_dev *dev, int ulp_type, bool reg)
255 struct cnic_local *cp = dev->cnic_priv;
256 struct cnic_eth_dev *ethdev = cp->ethdev;
257 struct drv_ctl_info info;
260 info.cmd = DRV_CTL_ULP_REGISTER_CMD;
262 info.cmd = DRV_CTL_ULP_UNREGISTER_CMD;
264 info.data.ulp_type = ulp_type;
265 ethdev->drv_ctl(dev->netdev, &info);
268 static int cnic_in_use(struct cnic_sock *csk)
270 return test_bit(SK_F_INUSE, &csk->flags);
273 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
275 struct cnic_local *cp = dev->cnic_priv;
276 struct cnic_eth_dev *ethdev = cp->ethdev;
277 struct drv_ctl_info info;
280 info.data.credit.credit_count = count;
281 ethdev->drv_ctl(dev->netdev, &info);
284 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
288 for (i = 0; i < cp->max_cid_space; i++) {
289 if (cp->ctx_tbl[i].cid == cid) {
297 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
298 struct cnic_sock *csk)
300 struct iscsi_path path_req;
303 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
304 struct cnic_ulp_ops *ulp_ops;
305 struct cnic_uio_dev *udev = cp->udev;
306 int rc = 0, retry = 0;
308 if (!udev || udev->uio_dev == -1)
312 len = sizeof(path_req);
313 buf = (char *) &path_req;
314 memset(&path_req, 0, len);
316 msg_type = ISCSI_KEVENT_PATH_REQ;
317 path_req.handle = (u64) csk->l5_cid;
318 if (test_bit(SK_F_IPV6, &csk->flags)) {
319 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
320 sizeof(struct in6_addr));
321 path_req.ip_addr_len = 16;
323 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
324 sizeof(struct in_addr));
325 path_req.ip_addr_len = 4;
327 path_req.vlan_id = csk->vlan_id;
328 path_req.pmtu = csk->mtu;
334 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
336 rc = ulp_ops->iscsi_nl_send_msg(
337 cp->ulp_handle[CNIC_ULP_ISCSI],
340 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
349 static void cnic_cm_upcall(struct cnic_local *, struct cnic_sock *, u8);
351 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
357 case ISCSI_UEVENT_PATH_UPDATE: {
358 struct cnic_local *cp;
360 struct cnic_sock *csk;
361 struct iscsi_path *path_resp;
363 if (len < sizeof(*path_resp))
366 path_resp = (struct iscsi_path *) buf;
368 l5_cid = (u32) path_resp->handle;
369 if (l5_cid >= MAX_CM_SK_TBL_SZ)
373 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
378 csk = &cp->csk_tbl[l5_cid];
380 if (cnic_in_use(csk) &&
381 test_bit(SK_F_CONNECT_START, &csk->flags)) {
383 csk->vlan_id = path_resp->vlan_id;
385 memcpy(csk->ha, path_resp->mac_addr, 6);
386 if (test_bit(SK_F_IPV6, &csk->flags))
387 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
388 sizeof(struct in6_addr));
390 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
391 sizeof(struct in_addr));
393 if (is_valid_ether_addr(csk->ha)) {
395 } else if (!test_bit(SK_F_OFFLD_SCHED, &csk->flags) &&
396 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
398 cnic_cm_upcall(cp, csk,
399 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
400 clear_bit(SK_F_CONNECT_START, &csk->flags);
412 static int cnic_offld_prep(struct cnic_sock *csk)
414 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
417 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
418 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
425 static int cnic_close_prep(struct cnic_sock *csk)
427 clear_bit(SK_F_CONNECT_START, &csk->flags);
428 smp_mb__after_clear_bit();
430 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
431 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
439 static int cnic_abort_prep(struct cnic_sock *csk)
441 clear_bit(SK_F_CONNECT_START, &csk->flags);
442 smp_mb__after_clear_bit();
444 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
447 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
448 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
455 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
457 struct cnic_dev *dev;
459 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
460 pr_err("%s: Bad type %d\n", __func__, ulp_type);
463 mutex_lock(&cnic_lock);
464 if (cnic_ulp_tbl_prot(ulp_type)) {
465 pr_err("%s: Type %d has already been registered\n",
467 mutex_unlock(&cnic_lock);
471 read_lock(&cnic_dev_lock);
472 list_for_each_entry(dev, &cnic_dev_list, list) {
473 struct cnic_local *cp = dev->cnic_priv;
475 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
477 read_unlock(&cnic_dev_lock);
479 atomic_set(&ulp_ops->ref_count, 0);
480 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
481 mutex_unlock(&cnic_lock);
483 /* Prevent race conditions with netdev_event */
485 list_for_each_entry(dev, &cnic_dev_list, list) {
486 struct cnic_local *cp = dev->cnic_priv;
488 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
489 ulp_ops->cnic_init(dev);
496 int cnic_unregister_driver(int ulp_type)
498 struct cnic_dev *dev;
499 struct cnic_ulp_ops *ulp_ops;
502 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
503 pr_err("%s: Bad type %d\n", __func__, ulp_type);
506 mutex_lock(&cnic_lock);
507 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
509 pr_err("%s: Type %d has not been registered\n",
513 read_lock(&cnic_dev_lock);
514 list_for_each_entry(dev, &cnic_dev_list, list) {
515 struct cnic_local *cp = dev->cnic_priv;
517 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
518 pr_err("%s: Type %d still has devices registered\n",
520 read_unlock(&cnic_dev_lock);
524 read_unlock(&cnic_dev_lock);
526 RCU_INIT_POINTER(cnic_ulp_tbl[ulp_type], NULL);
528 mutex_unlock(&cnic_lock);
530 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
535 if (atomic_read(&ulp_ops->ref_count) != 0)
536 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
540 mutex_unlock(&cnic_lock);
544 static int cnic_start_hw(struct cnic_dev *);
545 static void cnic_stop_hw(struct cnic_dev *);
547 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
550 struct cnic_local *cp = dev->cnic_priv;
551 struct cnic_ulp_ops *ulp_ops;
553 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
554 pr_err("%s: Bad type %d\n", __func__, ulp_type);
557 mutex_lock(&cnic_lock);
558 if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
559 pr_err("%s: Driver with type %d has not been registered\n",
561 mutex_unlock(&cnic_lock);
564 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
565 pr_err("%s: Type %d has already been registered to this device\n",
567 mutex_unlock(&cnic_lock);
571 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
572 cp->ulp_handle[ulp_type] = ulp_ctx;
573 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
574 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
577 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
578 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
579 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
581 mutex_unlock(&cnic_lock);
583 cnic_ulp_ctl(dev, ulp_type, true);
588 EXPORT_SYMBOL(cnic_register_driver);
590 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
592 struct cnic_local *cp = dev->cnic_priv;
595 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
596 pr_err("%s: Bad type %d\n", __func__, ulp_type);
599 mutex_lock(&cnic_lock);
600 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
601 RCU_INIT_POINTER(cp->ulp_ops[ulp_type], NULL);
604 pr_err("%s: device not registered to this ulp type %d\n",
606 mutex_unlock(&cnic_lock);
609 mutex_unlock(&cnic_lock);
611 if (ulp_type == CNIC_ULP_ISCSI)
612 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
616 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
621 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
622 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
624 cnic_ulp_ctl(dev, ulp_type, false);
628 EXPORT_SYMBOL(cnic_unregister_driver);
630 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id,
633 id_tbl->start = start_id;
636 spin_lock_init(&id_tbl->lock);
637 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
644 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
646 kfree(id_tbl->table);
647 id_tbl->table = NULL;
650 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
655 if (id >= id_tbl->max)
658 spin_lock(&id_tbl->lock);
659 if (!test_bit(id, id_tbl->table)) {
660 set_bit(id, id_tbl->table);
663 spin_unlock(&id_tbl->lock);
667 /* Returns -1 if not successful */
668 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
672 spin_lock(&id_tbl->lock);
673 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
674 if (id >= id_tbl->max) {
676 if (id_tbl->next != 0) {
677 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
678 if (id >= id_tbl->next)
683 if (id < id_tbl->max) {
684 set_bit(id, id_tbl->table);
685 id_tbl->next = (id + 1) & (id_tbl->max - 1);
689 spin_unlock(&id_tbl->lock);
694 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
700 if (id >= id_tbl->max)
703 clear_bit(id, id_tbl->table);
706 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
713 for (i = 0; i < dma->num_pages; i++) {
714 if (dma->pg_arr[i]) {
715 dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
716 dma->pg_arr[i], dma->pg_map_arr[i]);
717 dma->pg_arr[i] = NULL;
721 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
722 dma->pgtbl, dma->pgtbl_map);
730 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
733 __le32 *page_table = (__le32 *) dma->pgtbl;
735 for (i = 0; i < dma->num_pages; i++) {
736 /* Each entry needs to be in big endian format. */
737 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
739 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
744 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
747 __le32 *page_table = (__le32 *) dma->pgtbl;
749 for (i = 0; i < dma->num_pages; i++) {
750 /* Each entry needs to be in little endian format. */
751 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
753 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
758 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
759 int pages, int use_pg_tbl)
762 struct cnic_local *cp = dev->cnic_priv;
764 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
765 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
766 if (dma->pg_arr == NULL)
769 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
770 dma->num_pages = pages;
772 for (i = 0; i < pages; i++) {
773 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
777 if (dma->pg_arr[i] == NULL)
783 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
784 ~(BCM_PAGE_SIZE - 1);
785 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
786 &dma->pgtbl_map, GFP_ATOMIC);
787 if (dma->pgtbl == NULL)
790 cp->setup_pgtbl(dev, dma);
795 cnic_free_dma(dev, dma);
799 static void cnic_free_context(struct cnic_dev *dev)
801 struct cnic_local *cp = dev->cnic_priv;
804 for (i = 0; i < cp->ctx_blks; i++) {
805 if (cp->ctx_arr[i].ctx) {
806 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
808 cp->ctx_arr[i].mapping);
809 cp->ctx_arr[i].ctx = NULL;
814 static void __cnic_free_uio(struct cnic_uio_dev *udev)
816 uio_unregister_device(&udev->cnic_uinfo);
819 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
820 udev->l2_buf, udev->l2_buf_map);
825 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
826 udev->l2_ring, udev->l2_ring_map);
827 udev->l2_ring = NULL;
830 pci_dev_put(udev->pdev);
834 static void cnic_free_uio(struct cnic_uio_dev *udev)
839 write_lock(&cnic_dev_lock);
840 list_del_init(&udev->list);
841 write_unlock(&cnic_dev_lock);
842 __cnic_free_uio(udev);
845 static void cnic_free_resc(struct cnic_dev *dev)
847 struct cnic_local *cp = dev->cnic_priv;
848 struct cnic_uio_dev *udev = cp->udev;
855 cnic_free_context(dev);
860 cnic_free_dma(dev, &cp->gbl_buf_info);
861 cnic_free_dma(dev, &cp->kwq_info);
862 cnic_free_dma(dev, &cp->kwq_16_data_info);
863 cnic_free_dma(dev, &cp->kcq2.dma);
864 cnic_free_dma(dev, &cp->kcq1.dma);
865 kfree(cp->iscsi_tbl);
866 cp->iscsi_tbl = NULL;
870 cnic_free_id_tbl(&cp->fcoe_cid_tbl);
871 cnic_free_id_tbl(&cp->cid_tbl);
874 static int cnic_alloc_context(struct cnic_dev *dev)
876 struct cnic_local *cp = dev->cnic_priv;
878 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
881 cp->ctx_blk_size = BCM_PAGE_SIZE;
882 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
883 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
884 sizeof(struct cnic_ctx);
885 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
886 if (cp->ctx_arr == NULL)
890 for (i = 0; i < 2; i++) {
891 u32 j, reg, off, lo, hi;
894 off = BNX2_PG_CTX_MAP;
896 off = BNX2_ISCSI_CTX_MAP;
898 reg = cnic_reg_rd_ind(dev, off);
901 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
902 cp->ctx_arr[k].cid = j;
906 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
911 for (i = 0; i < cp->ctx_blks; i++) {
913 dma_alloc_coherent(&dev->pcidev->dev,
915 &cp->ctx_arr[i].mapping,
917 if (cp->ctx_arr[i].ctx == NULL)
924 static u16 cnic_bnx2_next_idx(u16 idx)
929 static u16 cnic_bnx2_hw_idx(u16 idx)
934 static u16 cnic_bnx2x_next_idx(u16 idx)
937 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
943 static u16 cnic_bnx2x_hw_idx(u16 idx)
945 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
950 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info,
953 int err, i, use_page_tbl = 0;
959 err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, use_page_tbl);
963 kcq = (struct kcqe **) info->dma.pg_arr;
966 info->next_idx = cnic_bnx2_next_idx;
967 info->hw_idx = cnic_bnx2_hw_idx;
971 info->next_idx = cnic_bnx2x_next_idx;
972 info->hw_idx = cnic_bnx2x_hw_idx;
974 for (i = 0; i < KCQ_PAGE_CNT; i++) {
975 struct bnx2x_bd_chain_next *next =
976 (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
979 if (j >= KCQ_PAGE_CNT)
981 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
982 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
987 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
989 struct cnic_local *cp = dev->cnic_priv;
990 struct cnic_uio_dev *udev;
992 read_lock(&cnic_dev_lock);
993 list_for_each_entry(udev, &cnic_udev_list, list) {
994 if (udev->pdev == dev->pcidev) {
997 read_unlock(&cnic_dev_lock);
1001 read_unlock(&cnic_dev_lock);
1003 udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
1010 udev->pdev = dev->pcidev;
1011 udev->l2_ring_size = pages * BCM_PAGE_SIZE;
1012 udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
1014 GFP_KERNEL | __GFP_COMP);
1018 udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
1019 udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
1020 udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
1022 GFP_KERNEL | __GFP_COMP);
1026 write_lock(&cnic_dev_lock);
1027 list_add(&udev->list, &cnic_udev_list);
1028 write_unlock(&cnic_dev_lock);
1030 pci_dev_get(udev->pdev);
1036 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
1037 udev->l2_ring, udev->l2_ring_map);
1043 static int cnic_init_uio(struct cnic_dev *dev)
1045 struct cnic_local *cp = dev->cnic_priv;
1046 struct cnic_uio_dev *udev = cp->udev;
1047 struct uio_info *uinfo;
1053 uinfo = &udev->cnic_uinfo;
1055 uinfo->mem[0].addr = dev->netdev->base_addr;
1056 uinfo->mem[0].internal_addr = dev->regview;
1057 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
1058 uinfo->mem[0].memtype = UIO_MEM_PHYS;
1060 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
1061 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
1063 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
1064 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
1066 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
1068 uinfo->name = "bnx2_cnic";
1069 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1070 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1072 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1074 uinfo->name = "bnx2x_cnic";
1077 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1079 uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1080 uinfo->mem[2].size = udev->l2_ring_size;
1081 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1083 uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1084 uinfo->mem[3].size = udev->l2_buf_size;
1085 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1087 uinfo->version = CNIC_MODULE_VERSION;
1088 uinfo->irq = UIO_IRQ_CUSTOM;
1090 uinfo->open = cnic_uio_open;
1091 uinfo->release = cnic_uio_close;
1093 if (udev->uio_dev == -1) {
1097 ret = uio_register_device(&udev->pdev->dev, uinfo);
1100 cnic_init_rings(dev);
1106 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1108 struct cnic_local *cp = dev->cnic_priv;
1111 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1114 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1116 ret = cnic_alloc_kcq(dev, &cp->kcq1, true);
1120 ret = cnic_alloc_context(dev);
1124 ret = cnic_alloc_uio_rings(dev, 2);
1128 ret = cnic_init_uio(dev);
1135 cnic_free_resc(dev);
1139 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1141 struct cnic_local *cp = dev->cnic_priv;
1142 int ctx_blk_size = cp->ethdev->ctx_blk_size;
1143 int total_mem, blks, i;
1145 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1146 blks = total_mem / ctx_blk_size;
1147 if (total_mem % ctx_blk_size)
1150 if (blks > cp->ethdev->ctx_tbl_len)
1153 cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1154 if (cp->ctx_arr == NULL)
1157 cp->ctx_blks = blks;
1158 cp->ctx_blk_size = ctx_blk_size;
1159 if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1162 cp->ctx_align = ctx_blk_size;
1164 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1166 for (i = 0; i < blks; i++) {
1167 cp->ctx_arr[i].ctx =
1168 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1169 &cp->ctx_arr[i].mapping,
1171 if (cp->ctx_arr[i].ctx == NULL)
1174 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1175 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1176 cnic_free_context(dev);
1177 cp->ctx_blk_size += cp->ctx_align;
1186 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1188 struct cnic_local *cp = dev->cnic_priv;
1189 struct cnic_eth_dev *ethdev = cp->ethdev;
1190 u32 start_cid = ethdev->starting_cid;
1191 int i, j, n, ret, pages;
1192 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1194 cp->iro_arr = ethdev->iro_arr;
1196 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1197 cp->iscsi_start_cid = start_cid;
1198 cp->fcoe_start_cid = start_cid + MAX_ISCSI_TBL_SZ;
1200 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
1201 cp->max_cid_space += dev->max_fcoe_conn;
1202 cp->fcoe_init_cid = ethdev->fcoe_init_cid;
1203 if (!cp->fcoe_init_cid)
1204 cp->fcoe_init_cid = 0x10;
1207 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1212 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1213 cp->max_cid_space, GFP_KERNEL);
1217 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1218 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1219 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1222 for (i = MAX_ISCSI_TBL_SZ; i < cp->max_cid_space; i++)
1223 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_FCOE;
1225 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1228 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1232 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1233 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1234 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1236 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1237 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1240 if ((i % n) == (n - 1))
1244 ret = cnic_alloc_kcq(dev, &cp->kcq1, false);
1248 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
1249 ret = cnic_alloc_kcq(dev, &cp->kcq2, true);
1254 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1255 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1259 ret = cnic_alloc_bnx2x_context(dev);
1263 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1265 cp->l2_rx_ring_size = 15;
1267 ret = cnic_alloc_uio_rings(dev, 4);
1271 ret = cnic_init_uio(dev);
1278 cnic_free_resc(dev);
1282 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1284 return cp->max_kwq_idx -
1285 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1288 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1291 struct cnic_local *cp = dev->cnic_priv;
1292 struct kwqe *prod_qe;
1293 u16 prod, sw_prod, i;
1295 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1296 return -EAGAIN; /* bnx2 is down */
1298 spin_lock_bh(&cp->cnic_ulp_lock);
1299 if (num_wqes > cnic_kwq_avail(cp) &&
1300 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1301 spin_unlock_bh(&cp->cnic_ulp_lock);
1305 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1307 prod = cp->kwq_prod_idx;
1308 sw_prod = prod & MAX_KWQ_IDX;
1309 for (i = 0; i < num_wqes; i++) {
1310 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1311 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1313 sw_prod = prod & MAX_KWQ_IDX;
1315 cp->kwq_prod_idx = prod;
1317 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1319 spin_unlock_bh(&cp->cnic_ulp_lock);
1323 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1324 union l5cm_specific_data *l5_data)
1326 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1329 map = ctx->kwqe_data_mapping;
1330 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1331 l5_data->phy_address.hi = (u64) map >> 32;
1332 return ctx->kwqe_data;
1335 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1336 u32 type, union l5cm_specific_data *l5_data)
1338 struct cnic_local *cp = dev->cnic_priv;
1339 struct l5cm_spe kwqe;
1340 struct kwqe_16 *kwq[1];
1344 kwqe.hdr.conn_and_cmd_data =
1345 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1346 BNX2X_HW_CID(cp, cid)));
1348 type_16 = (type << SPE_HDR_CONN_TYPE_SHIFT) & SPE_HDR_CONN_TYPE;
1349 type_16 |= (cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1350 SPE_HDR_FUNCTION_ID;
1352 kwqe.hdr.type = cpu_to_le16(type_16);
1353 kwqe.hdr.reserved1 = 0;
1354 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1355 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1357 kwq[0] = (struct kwqe_16 *) &kwqe;
1359 spin_lock_bh(&cp->cnic_ulp_lock);
1360 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1361 spin_unlock_bh(&cp->cnic_ulp_lock);
1369 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1370 struct kcqe *cqes[], u32 num_cqes)
1372 struct cnic_local *cp = dev->cnic_priv;
1373 struct cnic_ulp_ops *ulp_ops;
1376 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1377 if (likely(ulp_ops)) {
1378 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1384 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1386 struct cnic_local *cp = dev->cnic_priv;
1387 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1389 u32 pfid = cp->pfid;
1391 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1392 cp->num_ccells = req1->num_ccells_per_conn;
1393 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1394 cp->num_iscsi_tasks;
1395 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1396 BNX2X_ISCSI_R2TQE_SIZE;
1397 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1398 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1399 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1400 cp->num_cqs = req1->num_cqs;
1402 if (!dev->max_iscsi_conn)
1405 /* init Tstorm RAM */
1406 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1408 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1410 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1411 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1412 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1413 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1414 req1->num_tasks_per_conn);
1416 /* init Ustorm RAM */
1417 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1418 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1419 req1->rq_buffer_size);
1420 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1422 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1423 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1424 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1425 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1426 req1->num_tasks_per_conn);
1427 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1429 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1431 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1432 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1434 /* init Xstorm RAM */
1435 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1437 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1438 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1439 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1440 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1441 req1->num_tasks_per_conn);
1442 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1444 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1445 req1->num_tasks_per_conn);
1446 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1447 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1449 /* init Cstorm RAM */
1450 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1452 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1453 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1454 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1455 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1456 req1->num_tasks_per_conn);
1457 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1459 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1465 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1467 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1468 struct cnic_local *cp = dev->cnic_priv;
1469 u32 pfid = cp->pfid;
1470 struct iscsi_kcqe kcqe;
1471 struct kcqe *cqes[1];
1473 memset(&kcqe, 0, sizeof(kcqe));
1474 if (!dev->max_iscsi_conn) {
1475 kcqe.completion_status =
1476 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1480 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1481 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1482 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1483 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1484 req2->error_bit_map[1]);
1486 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1487 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1488 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1489 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1490 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1491 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1492 req2->error_bit_map[1]);
1494 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1495 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1497 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1500 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1501 cqes[0] = (struct kcqe *) &kcqe;
1502 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1507 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1509 struct cnic_local *cp = dev->cnic_priv;
1510 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1512 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1513 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1515 cnic_free_dma(dev, &iscsi->hq_info);
1516 cnic_free_dma(dev, &iscsi->r2tq_info);
1517 cnic_free_dma(dev, &iscsi->task_array_info);
1518 cnic_free_id(&cp->cid_tbl, ctx->cid);
1520 cnic_free_id(&cp->fcoe_cid_tbl, ctx->cid);
1526 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1530 struct cnic_local *cp = dev->cnic_priv;
1531 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1532 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1534 if (ctx->ulp_proto_id == CNIC_ULP_FCOE) {
1535 cid = cnic_alloc_new_id(&cp->fcoe_cid_tbl);
1544 cid = cnic_alloc_new_id(&cp->cid_tbl);
1551 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1553 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1557 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1558 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1562 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1563 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1570 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1574 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1575 struct regpair *ctx_addr)
1577 struct cnic_local *cp = dev->cnic_priv;
1578 struct cnic_eth_dev *ethdev = cp->ethdev;
1579 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1580 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1581 unsigned long align_off = 0;
1585 if (cp->ctx_align) {
1586 unsigned long mask = cp->ctx_align - 1;
1588 if (cp->ctx_arr[blk].mapping & mask)
1589 align_off = cp->ctx_align -
1590 (cp->ctx_arr[blk].mapping & mask);
1592 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1593 (off * BNX2X_CONTEXT_MEM_SIZE);
1594 ctx = cp->ctx_arr[blk].ctx + align_off +
1595 (off * BNX2X_CONTEXT_MEM_SIZE);
1597 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1599 ctx_addr->lo = ctx_map & 0xffffffff;
1600 ctx_addr->hi = (u64) ctx_map >> 32;
1604 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1607 struct cnic_local *cp = dev->cnic_priv;
1608 struct iscsi_kwqe_conn_offload1 *req1 =
1609 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1610 struct iscsi_kwqe_conn_offload2 *req2 =
1611 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1612 struct iscsi_kwqe_conn_offload3 *req3;
1613 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1614 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1616 u32 hw_cid = BNX2X_HW_CID(cp, cid);
1617 struct iscsi_context *ictx;
1618 struct regpair context_addr;
1619 int i, j, n = 2, n_max;
1620 u8 port = CNIC_PORT(cp);
1623 if (!req2->num_additional_wqes)
1626 n_max = req2->num_additional_wqes + 2;
1628 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1632 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1634 ictx->xstorm_ag_context.hq_prod = 1;
1636 ictx->xstorm_st_context.iscsi.first_burst_length =
1637 ISCSI_DEF_FIRST_BURST_LEN;
1638 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1639 ISCSI_DEF_MAX_RECV_SEG_LEN;
1640 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1641 req1->sq_page_table_addr_lo;
1642 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1643 req1->sq_page_table_addr_hi;
1644 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1645 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1646 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1647 iscsi->hq_info.pgtbl_map & 0xffffffff;
1648 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1649 (u64) iscsi->hq_info.pgtbl_map >> 32;
1650 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1651 iscsi->hq_info.pgtbl[0];
1652 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1653 iscsi->hq_info.pgtbl[1];
1654 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1655 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1656 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1657 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1658 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1659 iscsi->r2tq_info.pgtbl[0];
1660 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1661 iscsi->r2tq_info.pgtbl[1];
1662 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1663 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1664 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1665 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1666 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1667 BNX2X_ISCSI_PBL_NOT_CACHED;
1668 ictx->xstorm_st_context.iscsi.flags.flags |=
1669 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1670 ictx->xstorm_st_context.iscsi.flags.flags |=
1671 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1672 ictx->xstorm_st_context.common.ethernet.reserved_vlan_type =
1674 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) &&
1675 cp->port_mode == CHIP_2_PORT_MODE) {
1679 ictx->xstorm_st_context.common.flags =
1680 1 << XSTORM_COMMON_CONTEXT_SECTION_PHYSQ_INITIALIZED_SHIFT;
1681 ictx->xstorm_st_context.common.flags =
1682 port << XSTORM_COMMON_CONTEXT_SECTION_PBF_PORT_SHIFT;
1684 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1685 /* TSTORM requires the base address of RQ DB & not PTE */
1686 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1687 req2->rq_page_table_addr_lo & PAGE_MASK;
1688 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1689 req2->rq_page_table_addr_hi;
1690 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1691 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1692 ictx->tstorm_st_context.tcp.flags2 |=
1693 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1694 ictx->tstorm_st_context.tcp.ooo_support_mode =
1695 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1697 ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1699 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1700 req2->rq_page_table_addr_lo;
1701 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1702 req2->rq_page_table_addr_hi;
1703 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1704 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1705 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1706 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1707 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1708 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1709 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1710 iscsi->r2tq_info.pgtbl[0];
1711 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1712 iscsi->r2tq_info.pgtbl[1];
1713 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1714 req1->cq_page_table_addr_lo;
1715 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1716 req1->cq_page_table_addr_hi;
1717 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1718 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1719 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1720 ictx->ustorm_st_context.task_pbe_cache_index =
1721 BNX2X_ISCSI_PBL_NOT_CACHED;
1722 ictx->ustorm_st_context.task_pdu_cache_index =
1723 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1725 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1729 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1732 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1733 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1734 req3->qp_first_pte[j].hi;
1735 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1736 req3->qp_first_pte[j].lo;
1739 ictx->ustorm_st_context.task_pbl_base.lo =
1740 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1741 ictx->ustorm_st_context.task_pbl_base.hi =
1742 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1743 ictx->ustorm_st_context.tce_phy_addr.lo =
1744 iscsi->task_array_info.pgtbl[0];
1745 ictx->ustorm_st_context.tce_phy_addr.hi =
1746 iscsi->task_array_info.pgtbl[1];
1747 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1748 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1749 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1750 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1751 ISCSI_DEF_MAX_BURST_LEN;
1752 ictx->ustorm_st_context.negotiated_rx |=
1753 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1754 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1756 ictx->cstorm_st_context.hq_pbl_base.lo =
1757 iscsi->hq_info.pgtbl_map & 0xffffffff;
1758 ictx->cstorm_st_context.hq_pbl_base.hi =
1759 (u64) iscsi->hq_info.pgtbl_map >> 32;
1760 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1761 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1762 ictx->cstorm_st_context.task_pbl_base.lo =
1763 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1764 ictx->cstorm_st_context.task_pbl_base.hi =
1765 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1766 /* CSTORM and USTORM initialization is different, CSTORM requires
1767 * CQ DB base & not PTE addr */
1768 ictx->cstorm_st_context.cq_db_base.lo =
1769 req1->cq_page_table_addr_lo & PAGE_MASK;
1770 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1771 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1772 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1773 for (i = 0; i < cp->num_cqs; i++) {
1774 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1776 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1780 ictx->xstorm_ag_context.cdu_reserved =
1781 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1782 ISCSI_CONNECTION_TYPE);
1783 ictx->ustorm_ag_context.cdu_usage =
1784 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1785 ISCSI_CONNECTION_TYPE);
1790 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1793 struct iscsi_kwqe_conn_offload1 *req1;
1794 struct iscsi_kwqe_conn_offload2 *req2;
1795 struct cnic_local *cp = dev->cnic_priv;
1796 struct cnic_context *ctx;
1797 struct iscsi_kcqe kcqe;
1798 struct kcqe *cqes[1];
1807 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1808 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1809 if ((num - 2) < req2->num_additional_wqes) {
1813 *work = 2 + req2->num_additional_wqes;
1815 l5_cid = req1->iscsi_conn_id;
1816 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1819 memset(&kcqe, 0, sizeof(kcqe));
1820 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1821 kcqe.iscsi_conn_id = l5_cid;
1822 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1824 ctx = &cp->ctx_tbl[l5_cid];
1825 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1826 kcqe.completion_status =
1827 ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1831 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1832 atomic_dec(&cp->iscsi_conn);
1835 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1837 atomic_dec(&cp->iscsi_conn);
1841 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1843 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1844 atomic_dec(&cp->iscsi_conn);
1848 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1849 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1852 cqes[0] = (struct kcqe *) &kcqe;
1853 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1858 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1860 struct cnic_local *cp = dev->cnic_priv;
1861 struct iscsi_kwqe_conn_update *req =
1862 (struct iscsi_kwqe_conn_update *) kwqe;
1864 union l5cm_specific_data l5_data;
1865 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1868 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1871 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1875 memcpy(data, kwqe, sizeof(struct kwqe));
1877 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1878 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1882 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1884 struct cnic_local *cp = dev->cnic_priv;
1885 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1886 union l5cm_specific_data l5_data;
1890 init_waitqueue_head(&ctx->waitq);
1892 memset(&l5_data, 0, sizeof(l5_data));
1893 hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1895 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1896 hw_cid, NONE_CONNECTION_TYPE, &l5_data);
1899 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
1900 if (unlikely(test_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags)))
1907 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1909 struct cnic_local *cp = dev->cnic_priv;
1910 struct iscsi_kwqe_conn_destroy *req =
1911 (struct iscsi_kwqe_conn_destroy *) kwqe;
1912 u32 l5_cid = req->reserved0;
1913 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1915 struct iscsi_kcqe kcqe;
1916 struct kcqe *cqes[1];
1918 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1919 goto skip_cfc_delete;
1921 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1922 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1924 if (delta > (2 * HZ))
1927 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
1928 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
1932 ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
1935 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1938 atomic_dec(&cp->iscsi_conn);
1939 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
1943 memset(&kcqe, 0, sizeof(kcqe));
1944 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1945 kcqe.iscsi_conn_id = l5_cid;
1946 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1947 kcqe.iscsi_conn_context_id = req->context_id;
1949 cqes[0] = (struct kcqe *) &kcqe;
1950 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1955 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1956 struct l4_kwq_connect_req1 *kwqe1,
1957 struct l4_kwq_connect_req3 *kwqe3,
1958 struct l5cm_active_conn_buffer *conn_buf)
1960 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1961 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1962 &conn_buf->xstorm_conn_buffer;
1963 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1964 &conn_buf->tstorm_conn_buffer;
1965 struct regpair context_addr;
1966 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1967 struct in6_addr src_ip, dst_ip;
1971 addrp = (u32 *) &conn_addr->local_ip_addr;
1972 for (i = 0; i < 4; i++, addrp++)
1973 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1975 addrp = (u32 *) &conn_addr->remote_ip_addr;
1976 for (i = 0; i < 4; i++, addrp++)
1977 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1979 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1981 xstorm_buf->context_addr.hi = context_addr.hi;
1982 xstorm_buf->context_addr.lo = context_addr.lo;
1983 xstorm_buf->mss = 0xffff;
1984 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1985 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1986 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1987 xstorm_buf->pseudo_header_checksum =
1988 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1990 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1991 tstorm_buf->params |=
1992 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1993 if (kwqe3->ka_timeout) {
1994 tstorm_buf->ka_enable = 1;
1995 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1996 tstorm_buf->ka_interval = kwqe3->ka_interval;
1997 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1999 tstorm_buf->max_rt_time = 0xffffffff;
2002 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
2004 struct cnic_local *cp = dev->cnic_priv;
2005 u32 pfid = cp->pfid;
2006 u8 *mac = dev->mac_addr;
2008 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2009 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
2010 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2011 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
2012 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2013 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
2014 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2015 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
2016 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2017 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
2018 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2019 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
2021 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2022 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
2023 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2024 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2026 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2027 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
2028 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2029 TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2031 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2032 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[1]);
2033 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
2034 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
2038 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
2040 struct cnic_local *cp = dev->cnic_priv;
2041 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
2042 u16 tstorm_flags = 0;
2045 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
2046 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
2049 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
2050 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
2052 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
2053 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
2056 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
2059 struct cnic_local *cp = dev->cnic_priv;
2060 struct l4_kwq_connect_req1 *kwqe1 =
2061 (struct l4_kwq_connect_req1 *) wqes[0];
2062 struct l4_kwq_connect_req3 *kwqe3;
2063 struct l5cm_active_conn_buffer *conn_buf;
2064 struct l5cm_conn_addr_params *conn_addr;
2065 union l5cm_specific_data l5_data;
2066 u32 l5_cid = kwqe1->pg_cid;
2067 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
2068 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2076 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
2086 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
2087 netdev_err(dev->netdev, "conn_buf size too big\n");
2090 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2094 memset(conn_buf, 0, sizeof(*conn_buf));
2096 conn_addr = &conn_buf->conn_addr_buf;
2097 conn_addr->remote_addr_0 = csk->ha[0];
2098 conn_addr->remote_addr_1 = csk->ha[1];
2099 conn_addr->remote_addr_2 = csk->ha[2];
2100 conn_addr->remote_addr_3 = csk->ha[3];
2101 conn_addr->remote_addr_4 = csk->ha[4];
2102 conn_addr->remote_addr_5 = csk->ha[5];
2104 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2105 struct l4_kwq_connect_req2 *kwqe2 =
2106 (struct l4_kwq_connect_req2 *) wqes[1];
2108 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2109 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2110 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2112 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2113 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2114 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2115 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2117 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2119 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2120 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2121 conn_addr->local_tcp_port = kwqe1->src_port;
2122 conn_addr->remote_tcp_port = kwqe1->dst_port;
2124 conn_addr->pmtu = kwqe3->pmtu;
2125 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2127 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2128 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2130 cnic_bnx2x_set_tcp_timestamp(dev,
2131 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
2133 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2134 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2136 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2141 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2143 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2144 union l5cm_specific_data l5_data;
2147 memset(&l5_data, 0, sizeof(l5_data));
2148 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2149 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2153 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2155 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2156 union l5cm_specific_data l5_data;
2159 memset(&l5_data, 0, sizeof(l5_data));
2160 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2161 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2164 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2166 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2168 struct kcqe *cqes[1];
2170 memset(&kcqe, 0, sizeof(kcqe));
2171 kcqe.pg_host_opaque = req->host_opaque;
2172 kcqe.pg_cid = req->host_opaque;
2173 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2174 cqes[0] = (struct kcqe *) &kcqe;
2175 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2179 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2181 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2183 struct kcqe *cqes[1];
2185 memset(&kcqe, 0, sizeof(kcqe));
2186 kcqe.pg_host_opaque = req->pg_host_opaque;
2187 kcqe.pg_cid = req->pg_cid;
2188 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2189 cqes[0] = (struct kcqe *) &kcqe;
2190 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2194 static int cnic_bnx2x_fcoe_stat(struct cnic_dev *dev, struct kwqe *kwqe)
2196 struct fcoe_kwqe_stat *req;
2197 struct fcoe_stat_ramrod_params *fcoe_stat;
2198 union l5cm_specific_data l5_data;
2199 struct cnic_local *cp = dev->cnic_priv;
2203 req = (struct fcoe_kwqe_stat *) kwqe;
2204 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2206 fcoe_stat = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2210 memset(fcoe_stat, 0, sizeof(*fcoe_stat));
2211 memcpy(&fcoe_stat->stat_kwqe, req, sizeof(*req));
2213 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_STAT_FUNC, cid,
2214 FCOE_CONNECTION_TYPE, &l5_data);
2218 static int cnic_bnx2x_fcoe_init1(struct cnic_dev *dev, struct kwqe *wqes[],
2222 struct cnic_local *cp = dev->cnic_priv;
2224 struct fcoe_init_ramrod_params *fcoe_init;
2225 struct fcoe_kwqe_init1 *req1;
2226 struct fcoe_kwqe_init2 *req2;
2227 struct fcoe_kwqe_init3 *req3;
2228 union l5cm_specific_data l5_data;
2234 req1 = (struct fcoe_kwqe_init1 *) wqes[0];
2235 req2 = (struct fcoe_kwqe_init2 *) wqes[1];
2236 req3 = (struct fcoe_kwqe_init3 *) wqes[2];
2237 if (req2->hdr.op_code != FCOE_KWQE_OPCODE_INIT2) {
2241 if (req3->hdr.op_code != FCOE_KWQE_OPCODE_INIT3) {
2246 if (sizeof(*fcoe_init) > CNIC_KWQ16_DATA_SIZE) {
2247 netdev_err(dev->netdev, "fcoe_init size too big\n");
2250 fcoe_init = cnic_get_kwqe_16_data(cp, BNX2X_FCOE_L5_CID_BASE, &l5_data);
2254 memset(fcoe_init, 0, sizeof(*fcoe_init));
2255 memcpy(&fcoe_init->init_kwqe1, req1, sizeof(*req1));
2256 memcpy(&fcoe_init->init_kwqe2, req2, sizeof(*req2));
2257 memcpy(&fcoe_init->init_kwqe3, req3, sizeof(*req3));
2258 fcoe_init->eq_pbl_base.lo = cp->kcq2.dma.pgtbl_map & 0xffffffff;
2259 fcoe_init->eq_pbl_base.hi = (u64) cp->kcq2.dma.pgtbl_map >> 32;
2260 fcoe_init->eq_pbl_size = cp->kcq2.dma.num_pages;
2262 fcoe_init->sb_num = cp->status_blk_num;
2263 fcoe_init->eq_prod = MAX_KCQ_IDX;
2264 fcoe_init->sb_id = HC_INDEX_FCOE_EQ_CONS;
2265 cp->kcq2.sw_prod_idx = 0;
2267 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2268 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_INIT_FUNC, cid,
2269 FCOE_CONNECTION_TYPE, &l5_data);
2274 static int cnic_bnx2x_fcoe_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
2278 u32 cid = -1, l5_cid;
2279 struct cnic_local *cp = dev->cnic_priv;
2280 struct fcoe_kwqe_conn_offload1 *req1;
2281 struct fcoe_kwqe_conn_offload2 *req2;
2282 struct fcoe_kwqe_conn_offload3 *req3;
2283 struct fcoe_kwqe_conn_offload4 *req4;
2284 struct fcoe_conn_offload_ramrod_params *fcoe_offload;
2285 struct cnic_context *ctx;
2286 struct fcoe_context *fctx;
2287 struct regpair ctx_addr;
2288 union l5cm_specific_data l5_data;
2289 struct fcoe_kcqe kcqe;
2290 struct kcqe *cqes[1];
2296 req1 = (struct fcoe_kwqe_conn_offload1 *) wqes[0];
2297 req2 = (struct fcoe_kwqe_conn_offload2 *) wqes[1];
2298 req3 = (struct fcoe_kwqe_conn_offload3 *) wqes[2];
2299 req4 = (struct fcoe_kwqe_conn_offload4 *) wqes[3];
2303 l5_cid = req1->fcoe_conn_id;
2304 if (l5_cid >= dev->max_fcoe_conn)
2307 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2309 ctx = &cp->ctx_tbl[l5_cid];
2310 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2313 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
2320 fctx = cnic_get_bnx2x_ctx(dev, cid, 1, &ctx_addr);
2322 u32 hw_cid = BNX2X_HW_CID(cp, cid);
2325 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
2326 FCOE_CONNECTION_TYPE);
2327 fctx->xstorm_ag_context.cdu_reserved = val;
2328 val = CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
2329 FCOE_CONNECTION_TYPE);
2330 fctx->ustorm_ag_context.cdu_usage = val;
2332 if (sizeof(*fcoe_offload) > CNIC_KWQ16_DATA_SIZE) {
2333 netdev_err(dev->netdev, "fcoe_offload size too big\n");
2336 fcoe_offload = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2340 memset(fcoe_offload, 0, sizeof(*fcoe_offload));
2341 memcpy(&fcoe_offload->offload_kwqe1, req1, sizeof(*req1));
2342 memcpy(&fcoe_offload->offload_kwqe2, req2, sizeof(*req2));
2343 memcpy(&fcoe_offload->offload_kwqe3, req3, sizeof(*req3));
2344 memcpy(&fcoe_offload->offload_kwqe4, req4, sizeof(*req4));
2346 cid = BNX2X_HW_CID(cp, cid);
2347 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_OFFLOAD_CONN, cid,
2348 FCOE_CONNECTION_TYPE, &l5_data);
2350 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2356 cnic_free_bnx2x_conn_resc(dev, l5_cid);
2358 memset(&kcqe, 0, sizeof(kcqe));
2359 kcqe.op_code = FCOE_KCQE_OPCODE_OFFLOAD_CONN;
2360 kcqe.fcoe_conn_id = req1->fcoe_conn_id;
2361 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
2363 cqes[0] = (struct kcqe *) &kcqe;
2364 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2368 static int cnic_bnx2x_fcoe_enable(struct cnic_dev *dev, struct kwqe *kwqe)
2370 struct fcoe_kwqe_conn_enable_disable *req;
2371 struct fcoe_conn_enable_disable_ramrod_params *fcoe_enable;
2372 union l5cm_specific_data l5_data;
2375 struct cnic_local *cp = dev->cnic_priv;
2377 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2378 cid = req->context_id;
2379 l5_cid = req->conn_id + BNX2X_FCOE_L5_CID_BASE;
2381 if (sizeof(*fcoe_enable) > CNIC_KWQ16_DATA_SIZE) {
2382 netdev_err(dev->netdev, "fcoe_enable size too big\n");
2385 fcoe_enable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2389 memset(fcoe_enable, 0, sizeof(*fcoe_enable));
2390 memcpy(&fcoe_enable->enable_disable_kwqe, req, sizeof(*req));
2391 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_ENABLE_CONN, cid,
2392 FCOE_CONNECTION_TYPE, &l5_data);
2396 static int cnic_bnx2x_fcoe_disable(struct cnic_dev *dev, struct kwqe *kwqe)
2398 struct fcoe_kwqe_conn_enable_disable *req;
2399 struct fcoe_conn_enable_disable_ramrod_params *fcoe_disable;
2400 union l5cm_specific_data l5_data;
2403 struct cnic_local *cp = dev->cnic_priv;
2405 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2406 cid = req->context_id;
2407 l5_cid = req->conn_id;
2408 if (l5_cid >= dev->max_fcoe_conn)
2411 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2413 if (sizeof(*fcoe_disable) > CNIC_KWQ16_DATA_SIZE) {
2414 netdev_err(dev->netdev, "fcoe_disable size too big\n");
2417 fcoe_disable = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
2421 memset(fcoe_disable, 0, sizeof(*fcoe_disable));
2422 memcpy(&fcoe_disable->enable_disable_kwqe, req, sizeof(*req));
2423 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DISABLE_CONN, cid,
2424 FCOE_CONNECTION_TYPE, &l5_data);
2428 static int cnic_bnx2x_fcoe_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2430 struct fcoe_kwqe_conn_destroy *req;
2431 union l5cm_specific_data l5_data;
2434 struct cnic_local *cp = dev->cnic_priv;
2435 struct cnic_context *ctx;
2436 struct fcoe_kcqe kcqe;
2437 struct kcqe *cqes[1];
2439 req = (struct fcoe_kwqe_conn_destroy *) kwqe;
2440 cid = req->context_id;
2441 l5_cid = req->conn_id;
2442 if (l5_cid >= dev->max_fcoe_conn)
2445 l5_cid += BNX2X_FCOE_L5_CID_BASE;
2447 ctx = &cp->ctx_tbl[l5_cid];
2449 init_waitqueue_head(&ctx->waitq);
2452 memset(&kcqe, 0, sizeof(kcqe));
2453 kcqe.completion_status = FCOE_KCQE_COMPLETION_STATUS_ERROR;
2454 memset(&l5_data, 0, sizeof(l5_data));
2455 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_TERMINATE_CONN, cid,
2456 FCOE_CONNECTION_TYPE, &l5_data);
2458 wait_event_timeout(ctx->waitq, ctx->wait_cond, CNIC_RAMROD_TMO);
2460 kcqe.completion_status = 0;
2463 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
2464 queue_delayed_work(cnic_wq, &cp->delete_task, msecs_to_jiffies(2000));
2466 kcqe.op_code = FCOE_KCQE_OPCODE_DESTROY_CONN;
2467 kcqe.fcoe_conn_id = req->conn_id;
2468 kcqe.fcoe_conn_context_id = cid;
2470 cqes[0] = (struct kcqe *) &kcqe;
2471 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_FCOE, cqes, 1);
2475 static void cnic_bnx2x_delete_wait(struct cnic_dev *dev, u32 start_cid)
2477 struct cnic_local *cp = dev->cnic_priv;
2480 for (i = start_cid; i < cp->max_cid_space; i++) {
2481 struct cnic_context *ctx = &cp->ctx_tbl[i];
2484 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
2487 for (j = 0; j < 5; j++) {
2488 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2493 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2494 netdev_warn(dev->netdev, "CID %x not deleted\n",
2499 static int cnic_bnx2x_fcoe_fw_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
2501 struct fcoe_kwqe_destroy *req;
2502 union l5cm_specific_data l5_data;
2503 struct cnic_local *cp = dev->cnic_priv;
2507 cnic_bnx2x_delete_wait(dev, MAX_ISCSI_TBL_SZ);
2509 req = (struct fcoe_kwqe_destroy *) kwqe;
2510 cid = BNX2X_HW_CID(cp, cp->fcoe_init_cid);
2512 memset(&l5_data, 0, sizeof(l5_data));
2513 ret = cnic_submit_kwqe_16(dev, FCOE_RAMROD_CMD_ID_DESTROY_FUNC, cid,
2514 FCOE_CONNECTION_TYPE, &l5_data);
2518 static void cnic_bnx2x_kwqe_err(struct cnic_dev *dev, struct kwqe *kwqe)
2520 struct cnic_local *cp = dev->cnic_priv;
2522 struct kcqe *cqes[1];
2524 u32 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2525 u32 layer_code = kwqe->kwqe_op_flag & KWQE_LAYER_MASK;
2529 cid = kwqe->kwqe_info0;
2530 memset(&kcqe, 0, sizeof(kcqe));
2532 if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_FCOE) {
2535 ulp_type = CNIC_ULP_FCOE;
2536 if (opcode == FCOE_KWQE_OPCODE_DISABLE_CONN) {
2537 struct fcoe_kwqe_conn_enable_disable *req;
2539 req = (struct fcoe_kwqe_conn_enable_disable *) kwqe;
2540 kcqe_op = FCOE_KCQE_OPCODE_DISABLE_CONN;
2541 cid = req->context_id;
2542 l5_cid = req->conn_id;
2543 } else if (opcode == FCOE_KWQE_OPCODE_DESTROY) {
2544 kcqe_op = FCOE_KCQE_OPCODE_DESTROY_FUNC;
2548 kcqe.kcqe_op_flag = kcqe_op << KCQE_FLAGS_OPCODE_SHIFT;
2549 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_FCOE;
2550 kcqe.kcqe_info1 = FCOE_KCQE_COMPLETION_STATUS_NIC_ERROR;
2551 kcqe.kcqe_info2 = cid;
2552 kcqe.kcqe_info0 = l5_cid;
2554 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L5_ISCSI) {
2555 ulp_type = CNIC_ULP_ISCSI;
2556 if (opcode == ISCSI_KWQE_OPCODE_UPDATE_CONN)
2557 cid = kwqe->kwqe_info1;
2559 kcqe.kcqe_op_flag = (opcode + 0x10) << KCQE_FLAGS_OPCODE_SHIFT;
2560 kcqe.kcqe_op_flag |= KCQE_FLAGS_LAYER_MASK_L5_ISCSI;
2561 kcqe.kcqe_info1 = ISCSI_KCQE_COMPLETION_STATUS_NIC_ERROR;
2562 kcqe.kcqe_info2 = cid;
2563 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &kcqe.kcqe_info0);
2565 } else if (layer_code == KWQE_FLAGS_LAYER_MASK_L4) {
2566 struct l4_kcq *l4kcqe = (struct l4_kcq *) &kcqe;
2568 ulp_type = CNIC_ULP_L4;
2569 if (opcode == L4_KWQE_OPCODE_VALUE_CONNECT1)
2570 kcqe_op = L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE;
2571 else if (opcode == L4_KWQE_OPCODE_VALUE_RESET)
2572 kcqe_op = L4_KCQE_OPCODE_VALUE_RESET_COMP;
2573 else if (opcode == L4_KWQE_OPCODE_VALUE_CLOSE)
2574 kcqe_op = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
2578 kcqe.kcqe_op_flag = (kcqe_op << KCQE_FLAGS_OPCODE_SHIFT) |
2579 KCQE_FLAGS_LAYER_MASK_L4;
2580 l4kcqe->status = L4_KCQE_COMPLETION_STATUS_NIC_ERROR;
2582 cnic_get_l5_cid(cp, BNX2X_SW_CID(cid), &l4kcqe->conn_id);
2587 cqes[0] = (struct kcqe *) &kcqe;
2588 cnic_reply_bnx2x_kcqes(dev, ulp_type, cqes, 1);
2591 static int cnic_submit_bnx2x_iscsi_kwqes(struct cnic_dev *dev,
2592 struct kwqe *wqes[], u32 num_wqes)
2598 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2599 return -EAGAIN; /* bnx2 is down */
2601 for (i = 0; i < num_wqes; ) {
2603 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2607 case ISCSI_KWQE_OPCODE_INIT1:
2608 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2610 case ISCSI_KWQE_OPCODE_INIT2:
2611 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2613 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2614 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2615 num_wqes - i, &work);
2617 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2618 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2620 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2621 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2623 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2624 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2627 case L4_KWQE_OPCODE_VALUE_CLOSE:
2628 ret = cnic_bnx2x_close(dev, kwqe);
2630 case L4_KWQE_OPCODE_VALUE_RESET:
2631 ret = cnic_bnx2x_reset(dev, kwqe);
2633 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2634 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2636 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2637 ret = cnic_bnx2x_update_pg(dev, kwqe);
2639 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2644 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2649 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2652 /* Possibly bnx2x parity error, send completion
2653 * to ulp drivers with error code to speed up
2654 * cleanup and reset recovery.
2656 if (ret == -EIO || ret == -EAGAIN)
2657 cnic_bnx2x_kwqe_err(dev, kwqe);
2664 static int cnic_submit_bnx2x_fcoe_kwqes(struct cnic_dev *dev,
2665 struct kwqe *wqes[], u32 num_wqes)
2667 struct cnic_local *cp = dev->cnic_priv;
2672 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2673 return -EAGAIN; /* bnx2 is down */
2675 if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
2678 for (i = 0; i < num_wqes; ) {
2680 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2684 case FCOE_KWQE_OPCODE_INIT1:
2685 ret = cnic_bnx2x_fcoe_init1(dev, &wqes[i],
2686 num_wqes - i, &work);
2688 case FCOE_KWQE_OPCODE_OFFLOAD_CONN1:
2689 ret = cnic_bnx2x_fcoe_ofld1(dev, &wqes[i],
2690 num_wqes - i, &work);
2692 case FCOE_KWQE_OPCODE_ENABLE_CONN:
2693 ret = cnic_bnx2x_fcoe_enable(dev, kwqe);
2695 case FCOE_KWQE_OPCODE_DISABLE_CONN:
2696 ret = cnic_bnx2x_fcoe_disable(dev, kwqe);
2698 case FCOE_KWQE_OPCODE_DESTROY_CONN:
2699 ret = cnic_bnx2x_fcoe_destroy(dev, kwqe);
2701 case FCOE_KWQE_OPCODE_DESTROY:
2702 ret = cnic_bnx2x_fcoe_fw_destroy(dev, kwqe);
2704 case FCOE_KWQE_OPCODE_STAT:
2705 ret = cnic_bnx2x_fcoe_stat(dev, kwqe);
2709 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2714 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2717 /* Possibly bnx2x parity error, send completion
2718 * to ulp drivers with error code to speed up
2719 * cleanup and reset recovery.
2721 if (ret == -EIO || ret == -EAGAIN)
2722 cnic_bnx2x_kwqe_err(dev, kwqe);
2729 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2735 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2736 return -EAGAIN; /* bnx2x is down */
2741 layer_code = wqes[0]->kwqe_op_flag & KWQE_LAYER_MASK;
2742 switch (layer_code) {
2743 case KWQE_FLAGS_LAYER_MASK_L5_ISCSI:
2744 case KWQE_FLAGS_LAYER_MASK_L4:
2745 case KWQE_FLAGS_LAYER_MASK_L2:
2746 ret = cnic_submit_bnx2x_iscsi_kwqes(dev, wqes, num_wqes);
2749 case KWQE_FLAGS_LAYER_MASK_L5_FCOE:
2750 ret = cnic_submit_bnx2x_fcoe_kwqes(dev, wqes, num_wqes);
2756 static inline u32 cnic_get_kcqe_layer_mask(u32 opflag)
2758 if (unlikely(KCQE_OPCODE(opflag) == FCOE_RAMROD_CMD_ID_TERMINATE_CONN))
2759 return KCQE_FLAGS_LAYER_MASK_L4;
2761 return opflag & KCQE_FLAGS_LAYER_MASK;
2764 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2766 struct cnic_local *cp = dev->cnic_priv;
2772 struct cnic_ulp_ops *ulp_ops;
2774 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2775 u32 kcqe_layer = cnic_get_kcqe_layer_mask(kcqe_op_flag);
2777 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2780 while (j < num_cqes) {
2781 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2783 if (cnic_get_kcqe_layer_mask(next_op) != kcqe_layer)
2786 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2791 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2792 ulp_type = CNIC_ULP_RDMA;
2793 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2794 ulp_type = CNIC_ULP_ISCSI;
2795 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_FCOE)
2796 ulp_type = CNIC_ULP_FCOE;
2797 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2798 ulp_type = CNIC_ULP_L4;
2799 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2802 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2808 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2809 if (likely(ulp_ops)) {
2810 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2811 cp->completed_kcq + i, j);
2820 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2823 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2825 struct cnic_local *cp = dev->cnic_priv;
2826 u16 i, ri, hw_prod, last;
2828 int kcqe_cnt = 0, last_cnt = 0;
2830 i = ri = last = info->sw_prod_idx;
2832 hw_prod = *info->hw_prod_idx_ptr;
2833 hw_prod = info->hw_idx(hw_prod);
2835 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2836 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2837 cp->completed_kcq[kcqe_cnt++] = kcqe;
2838 i = info->next_idx(i);
2839 ri = i & MAX_KCQ_IDX;
2840 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2841 last_cnt = kcqe_cnt;
2846 info->sw_prod_idx = last;
2850 static int cnic_l2_completion(struct cnic_local *cp)
2852 u16 hw_cons, sw_cons;
2853 struct cnic_uio_dev *udev = cp->udev;
2854 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2855 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
2859 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2862 hw_cons = *cp->rx_cons_ptr;
2863 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2866 sw_cons = cp->rx_cons;
2867 while (sw_cons != hw_cons) {
2870 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2871 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2872 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2873 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2874 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2875 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2876 cmd == RAMROD_CMD_ID_ETH_HALT)
2879 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2884 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2886 u16 rx_cons, tx_cons;
2889 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2892 rx_cons = *cp->rx_cons_ptr;
2893 tx_cons = *cp->tx_cons_ptr;
2894 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2895 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2896 comp = cnic_l2_completion(cp);
2898 cp->tx_cons = tx_cons;
2899 cp->rx_cons = rx_cons;
2902 uio_event_notify(&cp->udev->cnic_uinfo);
2905 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2908 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2910 struct cnic_local *cp = dev->cnic_priv;
2911 u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2914 /* status block index must be read before reading other fields */
2916 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2918 while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2920 service_kcqes(dev, kcqe_cnt);
2922 /* Tell compiler that status_blk fields can change. */
2924 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2925 /* status block index must be read first */
2927 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2930 CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2932 cnic_chk_pkt_rings(cp);
2937 static int cnic_service_bnx2(void *data, void *status_blk)
2939 struct cnic_dev *dev = data;
2941 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2942 struct status_block *sblk = status_blk;
2944 return sblk->status_idx;
2947 return cnic_service_bnx2_queues(dev);
2950 static void cnic_service_bnx2_msix(unsigned long data)
2952 struct cnic_dev *dev = (struct cnic_dev *) data;
2953 struct cnic_local *cp = dev->cnic_priv;
2955 cp->last_status_idx = cnic_service_bnx2_queues(dev);
2957 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2958 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2961 static void cnic_doirq(struct cnic_dev *dev)
2963 struct cnic_local *cp = dev->cnic_priv;
2965 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2966 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
2968 prefetch(cp->status_blk.gen);
2969 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2971 tasklet_schedule(&cp->cnic_irq_task);
2975 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2977 struct cnic_dev *dev = dev_instance;
2978 struct cnic_local *cp = dev->cnic_priv;
2988 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2989 u16 index, u8 op, u8 update)
2991 struct cnic_local *cp = dev->cnic_priv;
2992 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2993 COMMAND_REG_INT_ACK);
2994 struct igu_ack_register igu_ack;
2996 igu_ack.status_block_index = index;
2997 igu_ack.sb_id_and_flags =
2998 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2999 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
3000 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
3001 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
3003 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
3006 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
3007 u16 index, u8 op, u8 update)
3009 struct igu_regular cmd_data;
3010 u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
3012 cmd_data.sb_id_and_flags =
3013 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
3014 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
3015 (update << IGU_REGULAR_BUPDATE_SHIFT) |
3016 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
3019 CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
3022 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
3024 struct cnic_local *cp = dev->cnic_priv;
3026 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
3027 IGU_INT_DISABLE, 0);
3030 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
3032 struct cnic_local *cp = dev->cnic_priv;
3034 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
3035 IGU_INT_DISABLE, 0);
3038 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
3040 u32 last_status = *info->status_idx_ptr;
3043 /* status block index must be read before reading the KCQ */
3045 while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
3047 service_kcqes(dev, kcqe_cnt);
3049 /* Tell compiler that sblk fields can change. */
3052 last_status = *info->status_idx_ptr;
3053 /* status block index must be read before reading the KCQ */
3059 static void cnic_service_bnx2x_bh(unsigned long data)
3061 struct cnic_dev *dev = (struct cnic_dev *) data;
3062 struct cnic_local *cp = dev->cnic_priv;
3063 u32 status_idx, new_status_idx;
3065 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
3069 status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
3071 CNIC_WR16(dev, cp->kcq1.io_addr,
3072 cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
3074 if (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
3075 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
3076 status_idx, IGU_INT_ENABLE, 1);
3080 new_status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq2);
3082 if (new_status_idx != status_idx)
3085 CNIC_WR16(dev, cp->kcq2.io_addr, cp->kcq2.sw_prod_idx +
3088 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
3089 status_idx, IGU_INT_ENABLE, 1);
3095 static int cnic_service_bnx2x(void *data, void *status_blk)
3097 struct cnic_dev *dev = data;
3098 struct cnic_local *cp = dev->cnic_priv;
3100 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3103 cnic_chk_pkt_rings(cp);
3108 static void cnic_ulp_stop_one(struct cnic_local *cp, int if_type)
3110 struct cnic_ulp_ops *ulp_ops;
3112 if (if_type == CNIC_ULP_ISCSI)
3113 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
3115 mutex_lock(&cnic_lock);
3116 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3117 lockdep_is_held(&cnic_lock));
3119 mutex_unlock(&cnic_lock);
3122 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3123 mutex_unlock(&cnic_lock);
3125 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3126 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
3128 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3131 static void cnic_ulp_stop(struct cnic_dev *dev)
3133 struct cnic_local *cp = dev->cnic_priv;
3136 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++)
3137 cnic_ulp_stop_one(cp, if_type);
3140 static void cnic_ulp_start(struct cnic_dev *dev)
3142 struct cnic_local *cp = dev->cnic_priv;
3145 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
3146 struct cnic_ulp_ops *ulp_ops;
3148 mutex_lock(&cnic_lock);
3149 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
3150 lockdep_is_held(&cnic_lock));
3151 if (!ulp_ops || !ulp_ops->cnic_start) {
3152 mutex_unlock(&cnic_lock);
3155 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3156 mutex_unlock(&cnic_lock);
3158 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
3159 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
3161 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
3165 static int cnic_copy_ulp_stats(struct cnic_dev *dev, int ulp_type)
3167 struct cnic_local *cp = dev->cnic_priv;
3168 struct cnic_ulp_ops *ulp_ops;
3171 mutex_lock(&cnic_lock);
3172 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
3173 if (ulp_ops && ulp_ops->cnic_get_stats)
3174 rc = ulp_ops->cnic_get_stats(cp->ulp_handle[ulp_type]);
3177 mutex_unlock(&cnic_lock);
3181 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
3183 struct cnic_dev *dev = data;
3184 int ulp_type = CNIC_ULP_ISCSI;
3186 switch (info->cmd) {
3187 case CNIC_CTL_STOP_CMD:
3195 case CNIC_CTL_START_CMD:
3198 if (!cnic_start_hw(dev))
3199 cnic_ulp_start(dev);
3203 case CNIC_CTL_STOP_ISCSI_CMD: {
3204 struct cnic_local *cp = dev->cnic_priv;
3205 set_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags);
3206 queue_delayed_work(cnic_wq, &cp->delete_task, 0);
3209 case CNIC_CTL_COMPLETION_CMD: {
3210 struct cnic_ctl_completion *comp = &info->data.comp;
3211 u32 cid = BNX2X_SW_CID(comp->cid);
3213 struct cnic_local *cp = dev->cnic_priv;
3215 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
3216 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3218 if (unlikely(comp->error)) {
3219 set_bit(CTX_FL_CID_ERROR, &ctx->ctx_flags);
3220 netdev_err(dev->netdev,
3221 "CID %x CFC delete comp error %x\n",
3226 wake_up(&ctx->waitq);
3230 case CNIC_CTL_FCOE_STATS_GET_CMD:
3231 ulp_type = CNIC_ULP_FCOE;
3233 case CNIC_CTL_ISCSI_STATS_GET_CMD:
3235 cnic_copy_ulp_stats(dev, ulp_type);
3245 static void cnic_ulp_init(struct cnic_dev *dev)
3248 struct cnic_local *cp = dev->cnic_priv;
3250 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3251 struct cnic_ulp_ops *ulp_ops;
3253 mutex_lock(&cnic_lock);
3254 ulp_ops = cnic_ulp_tbl_prot(i);
3255 if (!ulp_ops || !ulp_ops->cnic_init) {
3256 mutex_unlock(&cnic_lock);
3260 mutex_unlock(&cnic_lock);
3262 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3263 ulp_ops->cnic_init(dev);
3269 static void cnic_ulp_exit(struct cnic_dev *dev)
3272 struct cnic_local *cp = dev->cnic_priv;
3274 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
3275 struct cnic_ulp_ops *ulp_ops;
3277 mutex_lock(&cnic_lock);
3278 ulp_ops = cnic_ulp_tbl_prot(i);
3279 if (!ulp_ops || !ulp_ops->cnic_exit) {
3280 mutex_unlock(&cnic_lock);
3284 mutex_unlock(&cnic_lock);
3286 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
3287 ulp_ops->cnic_exit(dev);
3293 static int cnic_cm_offload_pg(struct cnic_sock *csk)
3295 struct cnic_dev *dev = csk->dev;
3296 struct l4_kwq_offload_pg *l4kwqe;
3297 struct kwqe *wqes[1];
3299 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
3300 memset(l4kwqe, 0, sizeof(*l4kwqe));
3301 wqes[0] = (struct kwqe *) l4kwqe;
3303 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
3305 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
3306 l4kwqe->l2hdr_nbytes = ETH_HLEN;
3308 l4kwqe->da0 = csk->ha[0];
3309 l4kwqe->da1 = csk->ha[1];
3310 l4kwqe->da2 = csk->ha[2];
3311 l4kwqe->da3 = csk->ha[3];
3312 l4kwqe->da4 = csk->ha[4];
3313 l4kwqe->da5 = csk->ha[5];
3315 l4kwqe->sa0 = dev->mac_addr[0];
3316 l4kwqe->sa1 = dev->mac_addr[1];
3317 l4kwqe->sa2 = dev->mac_addr[2];
3318 l4kwqe->sa3 = dev->mac_addr[3];
3319 l4kwqe->sa4 = dev->mac_addr[4];
3320 l4kwqe->sa5 = dev->mac_addr[5];
3322 l4kwqe->etype = ETH_P_IP;
3323 l4kwqe->ipid_start = DEF_IPID_START;
3324 l4kwqe->host_opaque = csk->l5_cid;
3327 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
3328 l4kwqe->vlan_tag = csk->vlan_id;
3329 l4kwqe->l2hdr_nbytes += 4;
3332 return dev->submit_kwqes(dev, wqes, 1);
3335 static int cnic_cm_update_pg(struct cnic_sock *csk)
3337 struct cnic_dev *dev = csk->dev;
3338 struct l4_kwq_update_pg *l4kwqe;
3339 struct kwqe *wqes[1];
3341 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
3342 memset(l4kwqe, 0, sizeof(*l4kwqe));
3343 wqes[0] = (struct kwqe *) l4kwqe;
3345 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
3347 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
3348 l4kwqe->pg_cid = csk->pg_cid;
3350 l4kwqe->da0 = csk->ha[0];
3351 l4kwqe->da1 = csk->ha[1];
3352 l4kwqe->da2 = csk->ha[2];
3353 l4kwqe->da3 = csk->ha[3];
3354 l4kwqe->da4 = csk->ha[4];
3355 l4kwqe->da5 = csk->ha[5];
3357 l4kwqe->pg_host_opaque = csk->l5_cid;
3358 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
3360 return dev->submit_kwqes(dev, wqes, 1);
3363 static int cnic_cm_upload_pg(struct cnic_sock *csk)
3365 struct cnic_dev *dev = csk->dev;
3366 struct l4_kwq_upload *l4kwqe;
3367 struct kwqe *wqes[1];
3369 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
3370 memset(l4kwqe, 0, sizeof(*l4kwqe));
3371 wqes[0] = (struct kwqe *) l4kwqe;
3373 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
3375 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
3376 l4kwqe->cid = csk->pg_cid;
3378 return dev->submit_kwqes(dev, wqes, 1);
3381 static int cnic_cm_conn_req(struct cnic_sock *csk)
3383 struct cnic_dev *dev = csk->dev;
3384 struct l4_kwq_connect_req1 *l4kwqe1;
3385 struct l4_kwq_connect_req2 *l4kwqe2;
3386 struct l4_kwq_connect_req3 *l4kwqe3;
3387 struct kwqe *wqes[3];
3391 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
3392 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
3393 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
3394 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
3395 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
3396 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
3398 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
3400 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
3401 l4kwqe3->ka_timeout = csk->ka_timeout;
3402 l4kwqe3->ka_interval = csk->ka_interval;
3403 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
3404 l4kwqe3->tos = csk->tos;
3405 l4kwqe3->ttl = csk->ttl;
3406 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
3407 l4kwqe3->pmtu = csk->mtu;
3408 l4kwqe3->rcv_buf = csk->rcv_buf;
3409 l4kwqe3->snd_buf = csk->snd_buf;
3410 l4kwqe3->seed = csk->seed;
3412 wqes[0] = (struct kwqe *) l4kwqe1;
3413 if (test_bit(SK_F_IPV6, &csk->flags)) {
3414 wqes[1] = (struct kwqe *) l4kwqe2;
3415 wqes[2] = (struct kwqe *) l4kwqe3;
3418 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
3419 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
3421 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
3422 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
3423 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
3424 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
3425 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
3426 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
3427 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
3428 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
3429 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
3430 sizeof(struct tcphdr);
3432 wqes[1] = (struct kwqe *) l4kwqe3;
3433 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
3434 sizeof(struct tcphdr);
3437 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
3439 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
3440 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
3441 l4kwqe1->cid = csk->cid;
3442 l4kwqe1->pg_cid = csk->pg_cid;
3443 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
3444 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
3445 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
3446 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
3447 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
3448 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
3449 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
3450 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
3451 if (csk->tcp_flags & SK_TCP_NAGLE)
3452 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
3453 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
3454 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
3455 if (csk->tcp_flags & SK_TCP_SACK)
3456 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
3457 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
3458 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
3460 l4kwqe1->tcp_flags = tcp_flags;
3462 return dev->submit_kwqes(dev, wqes, num_wqes);
3465 static int cnic_cm_close_req(struct cnic_sock *csk)
3467 struct cnic_dev *dev = csk->dev;
3468 struct l4_kwq_close_req *l4kwqe;
3469 struct kwqe *wqes[1];
3471 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
3472 memset(l4kwqe, 0, sizeof(*l4kwqe));
3473 wqes[0] = (struct kwqe *) l4kwqe;
3475 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
3476 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
3477 l4kwqe->cid = csk->cid;
3479 return dev->submit_kwqes(dev, wqes, 1);
3482 static int cnic_cm_abort_req(struct cnic_sock *csk)
3484 struct cnic_dev *dev = csk->dev;
3485 struct l4_kwq_reset_req *l4kwqe;
3486 struct kwqe *wqes[1];
3488 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
3489 memset(l4kwqe, 0, sizeof(*l4kwqe));
3490 wqes[0] = (struct kwqe *) l4kwqe;
3492 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
3493 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
3494 l4kwqe->cid = csk->cid;
3496 return dev->submit_kwqes(dev, wqes, 1);
3499 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
3500 u32 l5_cid, struct cnic_sock **csk, void *context)
3502 struct cnic_local *cp = dev->cnic_priv;
3503 struct cnic_sock *csk1;
3505 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3509 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3511 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3515 csk1 = &cp->csk_tbl[l5_cid];
3516 if (atomic_read(&csk1->ref_count))
3519 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
3524 csk1->l5_cid = l5_cid;
3525 csk1->ulp_type = ulp_type;
3526 csk1->context = context;
3528 csk1->ka_timeout = DEF_KA_TIMEOUT;
3529 csk1->ka_interval = DEF_KA_INTERVAL;
3530 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
3531 csk1->tos = DEF_TOS;
3532 csk1->ttl = DEF_TTL;
3533 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
3534 csk1->rcv_buf = DEF_RCV_BUF;
3535 csk1->snd_buf = DEF_SND_BUF;
3536 csk1->seed = DEF_SEED;
3542 static void cnic_cm_cleanup(struct cnic_sock *csk)
3544 if (csk->src_port) {
3545 struct cnic_dev *dev = csk->dev;
3546 struct cnic_local *cp = dev->cnic_priv;
3548 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
3553 static void cnic_close_conn(struct cnic_sock *csk)
3555 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
3556 cnic_cm_upload_pg(csk);
3557 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3559 cnic_cm_cleanup(csk);
3562 static int cnic_cm_destroy(struct cnic_sock *csk)
3564 if (!cnic_in_use(csk))
3568 clear_bit(SK_F_INUSE, &csk->flags);
3569 smp_mb__after_clear_bit();
3570 while (atomic_read(&csk->ref_count) != 1)
3572 cnic_cm_cleanup(csk);
3579 static inline u16 cnic_get_vlan(struct net_device *dev,
3580 struct net_device **vlan_dev)
3582 if (dev->priv_flags & IFF_802_1Q_VLAN) {
3583 *vlan_dev = vlan_dev_real_dev(dev);
3584 return vlan_dev_vlan_id(dev);
3590 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
3591 struct dst_entry **dst)
3593 #if defined(CONFIG_INET)
3596 rt = ip_route_output(&init_net, dst_addr->sin_addr.s_addr, 0, 0, 0);
3603 return -ENETUNREACH;
3607 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
3608 struct dst_entry **dst)
3610 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
3613 memset(&fl6, 0, sizeof(fl6));
3614 fl6.daddr = dst_addr->sin6_addr;
3615 if (ipv6_addr_type(&fl6.daddr) & IPV6_ADDR_LINKLOCAL)
3616 fl6.flowi6_oif = dst_addr->sin6_scope_id;
3618 *dst = ip6_route_output(&init_net, NULL, &fl6);
3619 if ((*dst)->error) {
3622 return -ENETUNREACH;
3627 return -ENETUNREACH;
3630 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
3633 struct cnic_dev *dev = NULL;
3634 struct dst_entry *dst;
3635 struct net_device *netdev = NULL;
3636 int err = -ENETUNREACH;
3638 if (dst_addr->sin_family == AF_INET)
3639 err = cnic_get_v4_route(dst_addr, &dst);
3640 else if (dst_addr->sin_family == AF_INET6) {
3641 struct sockaddr_in6 *dst_addr6 =
3642 (struct sockaddr_in6 *) dst_addr;
3644 err = cnic_get_v6_route(dst_addr6, &dst);
3654 cnic_get_vlan(dst->dev, &netdev);
3656 dev = cnic_from_netdev(netdev);
3665 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3667 struct cnic_dev *dev = csk->dev;
3668 struct cnic_local *cp = dev->cnic_priv;
3670 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3673 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3675 struct cnic_dev *dev = csk->dev;
3676 struct cnic_local *cp = dev->cnic_priv;
3678 struct dst_entry *dst = NULL;
3679 struct net_device *realdev;
3683 if (saddr->local.v6.sin6_family == AF_INET6 &&
3684 saddr->remote.v6.sin6_family == AF_INET6)
3686 else if (saddr->local.v4.sin_family == AF_INET &&
3687 saddr->remote.v4.sin_family == AF_INET)
3692 clear_bit(SK_F_IPV6, &csk->flags);
3695 set_bit(SK_F_IPV6, &csk->flags);
3696 cnic_get_v6_route(&saddr->remote.v6, &dst);
3698 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3699 sizeof(struct in6_addr));
3700 csk->dst_port = saddr->remote.v6.sin6_port;
3701 local_port = saddr->local.v6.sin6_port;
3704 cnic_get_v4_route(&saddr->remote.v4, &dst);
3706 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3707 csk->dst_port = saddr->remote.v4.sin_port;
3708 local_port = saddr->local.v4.sin_port;
3712 csk->mtu = dev->netdev->mtu;
3713 if (dst && dst->dev) {
3714 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3715 if (realdev == dev->netdev) {
3716 csk->vlan_id = vlan;
3717 csk->mtu = dst_mtu(dst);
3721 port_id = be16_to_cpu(local_port);
3722 if (port_id >= CNIC_LOCAL_PORT_MIN &&
3723 port_id < CNIC_LOCAL_PORT_MAX) {
3724 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3730 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3731 if (port_id == -1) {
3735 local_port = cpu_to_be16(port_id);
3737 csk->src_port = local_port;
3744 static void cnic_init_csk_state(struct cnic_sock *csk)
3747 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3748 clear_bit(SK_F_CLOSING, &csk->flags);
3751 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3753 struct cnic_local *cp = csk->dev->cnic_priv;
3756 if (cp->ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI)
3759 if (!cnic_in_use(csk))
3762 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3765 cnic_init_csk_state(csk);
3767 err = cnic_get_route(csk, saddr);
3771 err = cnic_resolve_addr(csk, saddr);
3776 clear_bit(SK_F_CONNECT_START, &csk->flags);
3780 static int cnic_cm_abort(struct cnic_sock *csk)
3782 struct cnic_local *cp = csk->dev->cnic_priv;
3783 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3785 if (!cnic_in_use(csk))
3788 if (cnic_abort_prep(csk))
3789 return cnic_cm_abort_req(csk);
3791 /* Getting here means that we haven't started connect, or
3792 * connect was not successful.
3795 cp->close_conn(csk, opcode);
3796 if (csk->state != opcode)
3802 static int cnic_cm_close(struct cnic_sock *csk)
3804 if (!cnic_in_use(csk))
3807 if (cnic_close_prep(csk)) {
3808 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3809 return cnic_cm_close_req(csk);
3816 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3819 struct cnic_ulp_ops *ulp_ops;
3820 int ulp_type = csk->ulp_type;
3823 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3825 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3826 ulp_ops->cm_connect_complete(csk);
3827 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3828 ulp_ops->cm_close_complete(csk);
3829 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3830 ulp_ops->cm_remote_abort(csk);
3831 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3832 ulp_ops->cm_abort_complete(csk);
3833 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3834 ulp_ops->cm_remote_close(csk);
3839 static int cnic_cm_set_pg(struct cnic_sock *csk)
3841 if (cnic_offld_prep(csk)) {
3842 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3843 cnic_cm_update_pg(csk);
3845 cnic_cm_offload_pg(csk);
3850 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3852 struct cnic_local *cp = dev->cnic_priv;
3853 u32 l5_cid = kcqe->pg_host_opaque;
3854 u8 opcode = kcqe->op_code;
3855 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3858 if (!cnic_in_use(csk))
3861 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3862 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3865 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3866 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3867 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3868 cnic_cm_upcall(cp, csk,
3869 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3873 csk->pg_cid = kcqe->pg_cid;
3874 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3875 cnic_cm_conn_req(csk);
3881 static void cnic_process_fcoe_term_conn(struct cnic_dev *dev, struct kcqe *kcqe)
3883 struct cnic_local *cp = dev->cnic_priv;
3884 struct fcoe_kcqe *fc_kcqe = (struct fcoe_kcqe *) kcqe;
3885 u32 l5_cid = fc_kcqe->fcoe_conn_id + BNX2X_FCOE_L5_CID_BASE;
3886 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
3888 ctx->timestamp = jiffies;
3890 wake_up(&ctx->waitq);
3893 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3895 struct cnic_local *cp = dev->cnic_priv;
3896 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3897 u8 opcode = l4kcqe->op_code;
3899 struct cnic_sock *csk;
3901 if (opcode == FCOE_RAMROD_CMD_ID_TERMINATE_CONN) {
3902 cnic_process_fcoe_term_conn(dev, kcqe);
3905 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3906 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3907 cnic_cm_process_offld_pg(dev, l4kcqe);
3911 l5_cid = l4kcqe->conn_id;
3913 l5_cid = l4kcqe->cid;
3914 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3917 csk = &cp->csk_tbl[l5_cid];
3920 if (!cnic_in_use(csk)) {
3926 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3927 if (l4kcqe->status != 0) {
3928 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3929 cnic_cm_upcall(cp, csk,
3930 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3933 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3934 if (l4kcqe->status == 0)
3935 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3936 else if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_NIC_ERROR)
3937 set_bit(SK_F_HW_ERR, &csk->flags);
3939 smp_mb__before_clear_bit();
3940 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3941 cnic_cm_upcall(cp, csk, opcode);
3944 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3945 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3946 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3947 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3948 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3949 if (l4kcqe->status == L4_KCQE_COMPLETION_STATUS_NIC_ERROR)
3950 set_bit(SK_F_HW_ERR, &csk->flags);
3952 cp->close_conn(csk, opcode);
3955 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3956 /* after we already sent CLOSE_REQ */
3957 if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags) &&
3958 !test_bit(SK_F_OFFLD_COMPLETE, &csk->flags) &&
3959 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3960 cp->close_conn(csk, L4_KCQE_OPCODE_VALUE_RESET_COMP);
3962 cnic_cm_upcall(cp, csk, opcode);
3968 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3970 struct cnic_dev *dev = data;
3973 for (i = 0; i < num; i++)
3974 cnic_cm_process_kcqe(dev, kcqe[i]);
3977 static struct cnic_ulp_ops cm_ulp_ops = {
3978 .indicate_kcqes = cnic_cm_indicate_kcqe,
3981 static void cnic_cm_free_mem(struct cnic_dev *dev)
3983 struct cnic_local *cp = dev->cnic_priv;
3987 cnic_free_id_tbl(&cp->csk_port_tbl);
3990 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3992 struct cnic_local *cp = dev->cnic_priv;
3995 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
4000 port_id = random32();
4001 port_id %= CNIC_LOCAL_PORT_RANGE;
4002 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
4003 CNIC_LOCAL_PORT_MIN, port_id)) {
4004 cnic_cm_free_mem(dev);
4010 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
4012 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
4013 /* Unsolicited RESET_COMP or RESET_RECEIVED */
4014 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
4015 csk->state = opcode;
4018 /* 1. If event opcode matches the expected event in csk->state
4019 * 2. If the expected event is CLOSE_COMP or RESET_COMP, we accept any
4021 * 3. If the expected event is 0, meaning the connection was never
4022 * never established, we accept the opcode from cm_abort.
4024 if (opcode == csk->state || csk->state == 0 ||
4025 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP ||
4026 csk->state == L4_KCQE_OPCODE_VALUE_RESET_COMP) {
4027 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
4028 if (csk->state == 0)
4029 csk->state = opcode;
4036 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
4038 struct cnic_dev *dev = csk->dev;
4039 struct cnic_local *cp = dev->cnic_priv;
4041 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
4042 cnic_cm_upcall(cp, csk, opcode);
4046 clear_bit(SK_F_CONNECT_START, &csk->flags);
4047 cnic_close_conn(csk);
4048 csk->state = opcode;
4049 cnic_cm_upcall(cp, csk, opcode);
4052 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
4056 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
4061 cnic_ctx_wr(dev, 45, 0, seed);
4065 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
4067 struct cnic_dev *dev = csk->dev;
4068 struct cnic_local *cp = dev->cnic_priv;
4069 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
4070 union l5cm_specific_data l5_data;
4072 int close_complete = 0;
4075 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4076 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4077 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
4078 if (cnic_ready_to_close(csk, opcode)) {
4079 if (test_bit(SK_F_HW_ERR, &csk->flags))
4081 else if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
4082 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
4087 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
4088 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
4090 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
4095 memset(&l5_data, 0, sizeof(l5_data));
4097 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
4099 } else if (close_complete) {
4100 ctx->timestamp = jiffies;
4101 cnic_close_conn(csk);
4102 cnic_cm_upcall(cp, csk, csk->state);
4106 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
4108 struct cnic_local *cp = dev->cnic_priv;
4113 if (!netif_running(dev->netdev))
4116 cnic_bnx2x_delete_wait(dev, 0);
4118 cancel_delayed_work(&cp->delete_task);
4119 flush_workqueue(cnic_wq);
4121 if (atomic_read(&cp->iscsi_conn) != 0)
4122 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
4123 atomic_read(&cp->iscsi_conn));
4126 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
4128 struct cnic_local *cp = dev->cnic_priv;
4129 u32 pfid = cp->pfid;
4130 u32 port = CNIC_PORT(cp);
4132 cnic_init_bnx2x_mac(dev);
4133 cnic_bnx2x_set_tcp_timestamp(dev, 1);
4135 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
4136 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
4138 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4139 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
4140 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4141 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
4144 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4145 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
4146 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4147 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
4148 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
4149 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
4150 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
4151 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
4153 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
4158 static void cnic_delete_task(struct work_struct *work)
4160 struct cnic_local *cp;
4161 struct cnic_dev *dev;
4163 int need_resched = 0;
4165 cp = container_of(work, struct cnic_local, delete_task.work);
4168 if (test_and_clear_bit(CNIC_LCL_FL_STOP_ISCSI, &cp->cnic_local_flags)) {
4169 struct drv_ctl_info info;
4171 cnic_ulp_stop_one(cp, CNIC_ULP_ISCSI);
4173 info.cmd = DRV_CTL_ISCSI_STOPPED_CMD;
4174 cp->ethdev->drv_ctl(dev->netdev, &info);
4177 for (i = 0; i < cp->max_cid_space; i++) {
4178 struct cnic_context *ctx = &cp->ctx_tbl[i];
4181 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
4182 !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4185 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
4190 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
4193 err = cnic_bnx2x_destroy_ramrod(dev, i);
4195 cnic_free_bnx2x_conn_resc(dev, i);
4197 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
4198 atomic_dec(&cp->iscsi_conn);
4200 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
4205 queue_delayed_work(cnic_wq, &cp->delete_task,
4206 msecs_to_jiffies(10));
4210 static int cnic_cm_open(struct cnic_dev *dev)
4212 struct cnic_local *cp = dev->cnic_priv;
4215 err = cnic_cm_alloc_mem(dev);
4219 err = cp->start_cm(dev);
4224 INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
4226 dev->cm_create = cnic_cm_create;
4227 dev->cm_destroy = cnic_cm_destroy;
4228 dev->cm_connect = cnic_cm_connect;
4229 dev->cm_abort = cnic_cm_abort;
4230 dev->cm_close = cnic_cm_close;
4231 dev->cm_select_dev = cnic_cm_select_dev;
4233 cp->ulp_handle[CNIC_ULP_L4] = dev;
4234 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
4238 cnic_cm_free_mem(dev);
4242 static int cnic_cm_shutdown(struct cnic_dev *dev)
4244 struct cnic_local *cp = dev->cnic_priv;
4252 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
4253 struct cnic_sock *csk = &cp->csk_tbl[i];
4255 clear_bit(SK_F_INUSE, &csk->flags);
4256 cnic_cm_cleanup(csk);
4258 cnic_cm_free_mem(dev);
4263 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
4268 cid_addr = GET_CID_ADDR(cid);
4270 for (i = 0; i < CTX_SIZE; i += 4)
4271 cnic_ctx_wr(dev, cid_addr, i, 0);
4274 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
4276 struct cnic_local *cp = dev->cnic_priv;
4278 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
4280 if (CHIP_NUM(cp) != CHIP_NUM_5709)
4283 for (i = 0; i < cp->ctx_blks; i++) {
4285 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
4288 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
4290 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
4291 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
4292 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
4293 (u64) cp->ctx_arr[i].mapping >> 32);
4294 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
4295 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
4296 for (j = 0; j < 10; j++) {
4298 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
4299 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
4303 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
4311 static void cnic_free_irq(struct cnic_dev *dev)
4313 struct cnic_local *cp = dev->cnic_priv;
4314 struct cnic_eth_dev *ethdev = cp->ethdev;
4316 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4317 cp->disable_int_sync(dev);
4318 tasklet_kill(&cp->cnic_irq_task);
4319 free_irq(ethdev->irq_arr[0].vector, dev);
4323 static int cnic_request_irq(struct cnic_dev *dev)
4325 struct cnic_local *cp = dev->cnic_priv;
4326 struct cnic_eth_dev *ethdev = cp->ethdev;
4329 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
4331 tasklet_disable(&cp->cnic_irq_task);
4336 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
4338 struct cnic_local *cp = dev->cnic_priv;
4339 struct cnic_eth_dev *ethdev = cp->ethdev;
4341 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4343 int sblk_num = cp->status_blk_num;
4344 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
4345 BNX2_HC_SB_CONFIG_1;
4347 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
4349 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
4350 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
4351 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
4353 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
4354 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
4355 (unsigned long) dev);
4356 err = cnic_request_irq(dev);
4360 while (cp->status_blk.bnx2->status_completion_producer_index &&
4362 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
4363 1 << (11 + sblk_num));
4368 if (cp->status_blk.bnx2->status_completion_producer_index) {
4374 struct status_block *sblk = cp->status_blk.gen;
4375 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
4378 while (sblk->status_completion_producer_index && i < 10) {
4379 CNIC_WR(dev, BNX2_HC_COMMAND,
4380 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
4385 if (sblk->status_completion_producer_index)
4392 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
4396 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4398 struct cnic_local *cp = dev->cnic_priv;
4399 struct cnic_eth_dev *ethdev = cp->ethdev;
4401 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4404 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4405 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4408 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4410 struct cnic_local *cp = dev->cnic_priv;
4411 struct cnic_eth_dev *ethdev = cp->ethdev;
4413 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
4416 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
4417 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
4418 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
4419 synchronize_irq(ethdev->irq_arr[0].vector);
4422 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
4424 struct cnic_local *cp = dev->cnic_priv;
4425 struct cnic_eth_dev *ethdev = cp->ethdev;
4426 struct cnic_uio_dev *udev = cp->udev;
4427 u32 cid_addr, tx_cid, sb_id;
4428 u32 val, offset0, offset1, offset2, offset3;
4431 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4432 struct status_block *s_blk = cp->status_blk.gen;
4434 sb_id = cp->status_blk_num;
4436 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
4437 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4438 struct status_block_msix *sblk = cp->status_blk.bnx2;
4440 tx_cid = TX_TSS_CID + sb_id - 1;
4441 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
4443 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
4445 cp->tx_cons = *cp->tx_cons_ptr;
4447 cid_addr = GET_CID_ADDR(tx_cid);
4448 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
4449 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
4451 for (i = 0; i < PHY_CTX_SIZE; i += 4)
4452 cnic_ctx_wr(dev, cid_addr2, i, 0);
4454 offset0 = BNX2_L2CTX_TYPE_XI;
4455 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
4456 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
4457 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
4459 cnic_init_context(dev, tx_cid);
4460 cnic_init_context(dev, tx_cid + 1);
4462 offset0 = BNX2_L2CTX_TYPE;
4463 offset1 = BNX2_L2CTX_CMD_TYPE;
4464 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
4465 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
4467 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
4468 cnic_ctx_wr(dev, cid_addr, offset0, val);
4470 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
4471 cnic_ctx_wr(dev, cid_addr, offset1, val);
4473 txbd = udev->l2_ring;
4475 buf_map = udev->l2_buf_map;
4476 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
4477 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
4478 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4480 val = (u64) ring_map >> 32;
4481 cnic_ctx_wr(dev, cid_addr, offset2, val);
4482 txbd->tx_bd_haddr_hi = val;
4484 val = (u64) ring_map & 0xffffffff;
4485 cnic_ctx_wr(dev, cid_addr, offset3, val);
4486 txbd->tx_bd_haddr_lo = val;
4489 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
4491 struct cnic_local *cp = dev->cnic_priv;
4492 struct cnic_eth_dev *ethdev = cp->ethdev;
4493 struct cnic_uio_dev *udev = cp->udev;
4494 u32 cid_addr, sb_id, val, coal_reg, coal_val;
4497 struct status_block *s_blk = cp->status_blk.gen;
4498 dma_addr_t ring_map = udev->l2_ring_map;
4500 sb_id = cp->status_blk_num;
4501 cnic_init_context(dev, 2);
4502 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
4503 coal_reg = BNX2_HC_COMMAND;
4504 coal_val = CNIC_RD(dev, coal_reg);
4505 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4506 struct status_block_msix *sblk = cp->status_blk.bnx2;
4508 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
4509 coal_reg = BNX2_HC_COALESCE_NOW;
4510 coal_val = 1 << (11 + sb_id);
4513 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
4514 CNIC_WR(dev, coal_reg, coal_val);
4519 cp->rx_cons = *cp->rx_cons_ptr;
4521 cid_addr = GET_CID_ADDR(2);
4522 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
4523 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
4524 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
4527 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
4529 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
4530 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
4532 rxbd = udev->l2_ring + BCM_PAGE_SIZE;
4533 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
4535 int n = (i % cp->l2_rx_ring_size) + 1;
4537 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4538 rxbd->rx_bd_len = cp->l2_single_buf_size;
4539 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
4540 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
4541 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
4543 val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4544 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
4545 rxbd->rx_bd_haddr_hi = val;
4547 val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4548 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
4549 rxbd->rx_bd_haddr_lo = val;
4551 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
4552 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
4555 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
4557 struct kwqe *wqes[1], l2kwqe;
4559 memset(&l2kwqe, 0, sizeof(l2kwqe));
4561 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_LAYER_SHIFT) |
4562 (L2_KWQE_OPCODE_VALUE_FLUSH <<
4563 KWQE_OPCODE_SHIFT) | 2;
4564 dev->submit_kwqes(dev, wqes, 1);
4567 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
4569 struct cnic_local *cp = dev->cnic_priv;
4572 val = cp->func << 2;
4574 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
4576 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4577 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
4578 dev->mac_addr[0] = (u8) (val >> 8);
4579 dev->mac_addr[1] = (u8) val;
4581 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
4583 val = cnic_reg_rd_ind(dev, cp->shmem_base +
4584 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
4585 dev->mac_addr[2] = (u8) (val >> 24);
4586 dev->mac_addr[3] = (u8) (val >> 16);
4587 dev->mac_addr[4] = (u8) (val >> 8);
4588 dev->mac_addr[5] = (u8) val;
4590 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
4592 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
4593 if (CHIP_NUM(cp) != CHIP_NUM_5709)
4594 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
4596 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
4597 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
4598 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
4601 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4603 struct cnic_local *cp = dev->cnic_priv;
4604 struct cnic_eth_dev *ethdev = cp->ethdev;
4605 struct status_block *sblk = cp->status_blk.gen;
4606 u32 val, kcq_cid_addr, kwq_cid_addr;
4609 cnic_set_bnx2_mac(dev);
4611 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
4612 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
4613 if (BCM_PAGE_BITS > 12)
4614 val |= (12 - 8) << 4;
4616 val |= (BCM_PAGE_BITS - 8) << 4;
4618 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
4620 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
4621 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
4622 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
4624 err = cnic_setup_5709_context(dev, 1);
4628 cnic_init_context(dev, KWQ_CID);
4629 cnic_init_context(dev, KCQ_CID);
4631 kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
4632 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
4634 cp->max_kwq_idx = MAX_KWQ_IDX;
4635 cp->kwq_prod_idx = 0;
4636 cp->kwq_con_idx = 0;
4637 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
4639 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
4640 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
4642 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
4644 /* Initialize the kernel work queue context. */
4645 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4646 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4647 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
4649 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
4650 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4652 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
4653 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4655 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
4656 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4658 val = (u32) cp->kwq_info.pgtbl_map;
4659 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4661 kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
4662 cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
4664 cp->kcq1.sw_prod_idx = 0;
4665 cp->kcq1.hw_prod_idx_ptr =
4666 (u16 *) &sblk->status_completion_producer_index;
4668 cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx;
4670 /* Initialize the kernel complete queue context. */
4671 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
4672 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
4673 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
4675 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
4676 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
4678 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
4679 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
4681 val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
4682 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
4684 val = (u32) cp->kcq1.dma.pgtbl_map;
4685 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
4688 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
4689 struct status_block_msix *msblk = cp->status_blk.bnx2;
4690 u32 sb_id = cp->status_blk_num;
4691 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4693 cp->kcq1.hw_prod_idx_ptr =
4694 (u16 *) &msblk->status_completion_producer_index;
4695 cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx;
4696 cp->kwq_con_idx_ptr = (u16 *) &msblk->status_cmd_consumer_index;
4697 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4698 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4699 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4702 /* Enable Commnad Scheduler notification when we write to the
4703 * host producer index of the kernel contexts. */
4704 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4706 /* Enable Command Scheduler notification when we write to either
4707 * the Send Queue or Receive Queue producer indexes of the kernel
4708 * bypass contexts. */
4709 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4710 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4712 /* Notify COM when the driver post an application buffer. */
4713 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4715 /* Set the CP and COM doorbells. These two processors polls the
4716 * doorbell for a non zero value before running. This must be done
4717 * after setting up the kernel queue contexts. */
4718 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4719 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4721 cnic_init_bnx2_tx_ring(dev);
4722 cnic_init_bnx2_rx_ring(dev);
4724 err = cnic_init_bnx2_irq(dev);
4726 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4727 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4728 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4735 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4737 struct cnic_local *cp = dev->cnic_priv;
4738 struct cnic_eth_dev *ethdev = cp->ethdev;
4739 u32 start_offset = ethdev->ctx_tbl_offset;
4742 for (i = 0; i < cp->ctx_blks; i++) {
4743 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4744 dma_addr_t map = ctx->mapping;
4746 if (cp->ctx_align) {
4747 unsigned long mask = cp->ctx_align - 1;
4749 map = (map + mask) & ~mask;
4752 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4756 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4758 struct cnic_local *cp = dev->cnic_priv;
4759 struct cnic_eth_dev *ethdev = cp->ethdev;
4762 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4763 (unsigned long) dev);
4764 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4765 err = cnic_request_irq(dev);
4770 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4771 u16 sb_id, u8 sb_index,
4775 u32 addr = BAR_CSTRORM_INTMEM +
4776 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4777 offsetof(struct hc_status_block_data_e1x, index_data) +
4778 sizeof(struct hc_index_data)*sb_index +
4779 offsetof(struct hc_index_data, flags);
4780 u16 flags = CNIC_RD16(dev, addr);
4782 flags &= ~HC_INDEX_DATA_HC_ENABLED;
4783 flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4784 HC_INDEX_DATA_HC_ENABLED);
4785 CNIC_WR16(dev, addr, flags);
4788 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4790 struct cnic_local *cp = dev->cnic_priv;
4791 u8 sb_id = cp->status_blk_num;
4793 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4794 CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4795 offsetof(struct hc_status_block_data_e1x, index_data) +
4796 sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4797 offsetof(struct hc_index_data, timeout), 64 / 4);
4798 cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4801 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4805 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4806 struct client_init_ramrod_data *data)
4808 struct cnic_local *cp = dev->cnic_priv;
4809 struct cnic_uio_dev *udev = cp->udev;
4810 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4811 dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4812 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4814 u32 cli = cp->ethdev->iscsi_l2_client_id;
4817 memset(txbd, 0, BCM_PAGE_SIZE);
4819 buf_map = udev->l2_buf_map;
4820 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4821 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4822 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4824 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4825 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4826 reg_bd->addr_hi = start_bd->addr_hi;
4827 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4828 start_bd->nbytes = cpu_to_le16(0x10);
4829 start_bd->nbd = cpu_to_le16(3);
4830 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4831 start_bd->general_data = (UNICAST_ADDRESS <<
4832 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
4833 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4837 val = (u64) ring_map >> 32;
4838 txbd->next_bd.addr_hi = cpu_to_le32(val);
4840 data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4842 val = (u64) ring_map & 0xffffffff;
4843 txbd->next_bd.addr_lo = cpu_to_le32(val);
4845 data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4847 /* Other ramrod params */
4848 data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4849 data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4851 /* reset xstorm per client statistics */
4852 if (cli < MAX_STAT_COUNTER_ID) {
4853 data->general.statistics_zero_flg = 1;
4854 data->general.statistics_en_flg = 1;
4855 data->general.statistics_counter_id = cli;
4859 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4862 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4863 struct client_init_ramrod_data *data)
4865 struct cnic_local *cp = dev->cnic_priv;
4866 struct cnic_uio_dev *udev = cp->udev;
4867 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4869 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4870 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
4871 struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4873 u32 cli = cp->ethdev->iscsi_l2_client_id;
4874 int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4876 dma_addr_t ring_map = udev->l2_ring_map;
4879 data->general.client_id = cli;
4880 data->general.activate_flg = 1;
4881 data->general.sp_client_id = cli;
4882 data->general.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4883 data->general.func_id = cp->pfid;
4885 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4887 int n = (i % cp->l2_rx_ring_size) + 1;
4889 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4890 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4891 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4894 val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4895 rxbd->addr_hi = cpu_to_le32(val);
4896 data->rx.bd_page_base.hi = cpu_to_le32(val);
4898 val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4899 rxbd->addr_lo = cpu_to_le32(val);
4900 data->rx.bd_page_base.lo = cpu_to_le32(val);
4902 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4903 val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4904 rxcqe->addr_hi = cpu_to_le32(val);
4905 data->rx.cqe_page_base.hi = cpu_to_le32(val);
4907 val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4908 rxcqe->addr_lo = cpu_to_le32(val);
4909 data->rx.cqe_page_base.lo = cpu_to_le32(val);
4911 /* Other ramrod params */
4912 data->rx.client_qzone_id = cl_qzone_id;
4913 data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
4914 data->rx.status_block_id = BNX2X_DEF_SB_ID;
4916 data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
4918 data->rx.max_bytes_on_bd = cpu_to_le16(cp->l2_single_buf_size);
4919 data->rx.outer_vlan_removal_enable_flg = 1;
4920 data->rx.silent_vlan_removal_flg = 1;
4921 data->rx.silent_vlan_value = 0;
4922 data->rx.silent_vlan_mask = 0xffff;
4925 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
4926 cp->rx_cons = *cp->rx_cons_ptr;
4929 static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
4931 struct cnic_local *cp = dev->cnic_priv;
4932 u32 pfid = cp->pfid;
4934 cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
4935 CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
4936 cp->kcq1.sw_prod_idx = 0;
4938 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
4939 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4941 cp->kcq1.hw_prod_idx_ptr =
4942 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4943 cp->kcq1.status_idx_ptr =
4944 &sb->sb.running_index[SM_RX_ID];
4946 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
4948 cp->kcq1.hw_prod_idx_ptr =
4949 &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4950 cp->kcq1.status_idx_ptr =
4951 &sb->sb.running_index[SM_RX_ID];
4954 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
4955 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4957 cp->kcq2.io_addr = BAR_USTRORM_INTMEM +
4958 USTORM_FCOE_EQ_PROD_OFFSET(pfid);
4959 cp->kcq2.sw_prod_idx = 0;
4960 cp->kcq2.hw_prod_idx_ptr =
4961 &sb->sb.index_values[HC_INDEX_FCOE_EQ_CONS];
4962 cp->kcq2.status_idx_ptr =
4963 &sb->sb.running_index[SM_RX_ID];
4967 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4969 struct cnic_local *cp = dev->cnic_priv;
4970 struct cnic_eth_dev *ethdev = cp->ethdev;
4971 int func = CNIC_FUNC(cp), ret;
4974 dev->stats_addr = ethdev->addr_drv_info_to_mcp;
4975 cp->port_mode = CHIP_PORT_MODE_NONE;
4977 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
4978 u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
4981 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
4983 val = (val >> 1) & 1;
4986 cp->port_mode = CHIP_4_PORT_MODE;
4987 cp->pfid = func >> 1;
4989 cp->port_mode = CHIP_2_PORT_MODE;
4990 cp->pfid = func & 0x6;
4997 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4998 cp->iscsi_start_cid, 0);
5003 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id)) {
5004 ret = cnic_init_id_tbl(&cp->fcoe_cid_tbl, dev->max_fcoe_conn,
5005 cp->fcoe_start_cid, 0);
5011 cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
5013 cnic_init_bnx2x_kcq(dev);
5016 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
5017 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5018 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
5019 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5020 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
5021 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
5022 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5023 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
5024 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
5025 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5026 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
5027 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
5028 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5029 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
5030 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
5031 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5032 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
5033 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
5034 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
5035 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
5036 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
5037 HC_INDEX_ISCSI_EQ_CONS);
5039 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5040 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
5041 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
5042 CNIC_WR(dev, BAR_USTRORM_INTMEM +
5043 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
5044 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
5046 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
5047 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
5049 cnic_setup_bnx2x_context(dev);
5051 ret = cnic_init_bnx2x_irq(dev);
5058 static void cnic_init_rings(struct cnic_dev *dev)
5060 struct cnic_local *cp = dev->cnic_priv;
5061 struct cnic_uio_dev *udev = cp->udev;
5063 if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5066 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5067 cnic_init_bnx2_tx_ring(dev);
5068 cnic_init_bnx2_rx_ring(dev);
5069 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5070 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5071 u32 cli = cp->ethdev->iscsi_l2_client_id;
5072 u32 cid = cp->ethdev->iscsi_l2_cid;
5074 struct client_init_ramrod_data *data;
5075 union l5cm_specific_data l5_data;
5076 struct ustorm_eth_rx_producers rx_prods = {0};
5077 u32 off, i, *cid_ptr;
5079 rx_prods.bd_prod = 0;
5080 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
5083 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
5085 off = BAR_USTRORM_INTMEM +
5086 (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ?
5087 USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
5088 USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
5090 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
5091 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
5093 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5095 data = udev->l2_buf;
5096 cid_ptr = udev->l2_buf + 12;
5098 memset(data, 0, sizeof(*data));
5100 cnic_init_bnx2x_tx_ring(dev, data);
5101 cnic_init_bnx2x_rx_ring(dev, data);
5103 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
5104 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
5106 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5108 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
5109 cid, ETH_CONNECTION_TYPE, &l5_data);
5112 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5116 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5117 netdev_err(dev->netdev,
5118 "iSCSI CLIENT_SETUP did not complete\n");
5119 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5120 cnic_ring_ctl(dev, cid, cli, 1);
5125 static void cnic_shutdown_rings(struct cnic_dev *dev)
5127 struct cnic_local *cp = dev->cnic_priv;
5128 struct cnic_uio_dev *udev = cp->udev;
5131 if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
5134 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
5135 cnic_shutdown_bnx2_rx_ring(dev);
5136 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
5137 u32 cli = cp->ethdev->iscsi_l2_client_id;
5138 u32 cid = cp->ethdev->iscsi_l2_cid;
5139 union l5cm_specific_data l5_data;
5142 cnic_ring_ctl(dev, cid, cli, 0);
5144 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
5146 l5_data.phy_address.lo = cli;
5147 l5_data.phy_address.hi = 0;
5148 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
5149 cid, ETH_CONNECTION_TYPE, &l5_data);
5151 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
5155 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
5156 netdev_err(dev->netdev,
5157 "iSCSI CLIENT_HALT did not complete\n");
5158 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
5160 memset(&l5_data, 0, sizeof(l5_data));
5161 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
5162 cid, NONE_CONNECTION_TYPE, &l5_data);
5165 clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
5166 rx_ring = udev->l2_ring + BCM_PAGE_SIZE;
5167 memset(rx_ring, 0, BCM_PAGE_SIZE);
5170 static int cnic_register_netdev(struct cnic_dev *dev)
5172 struct cnic_local *cp = dev->cnic_priv;
5173 struct cnic_eth_dev *ethdev = cp->ethdev;
5179 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
5182 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
5184 netdev_err(dev->netdev, "register_cnic failed\n");
5189 static void cnic_unregister_netdev(struct cnic_dev *dev)
5191 struct cnic_local *cp = dev->cnic_priv;
5192 struct cnic_eth_dev *ethdev = cp->ethdev;
5197 ethdev->drv_unregister_cnic(dev->netdev);
5200 static int cnic_start_hw(struct cnic_dev *dev)
5202 struct cnic_local *cp = dev->cnic_priv;
5203 struct cnic_eth_dev *ethdev = cp->ethdev;
5206 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
5209 dev->regview = ethdev->io_base;
5210 pci_dev_get(dev->pcidev);
5211 cp->func = PCI_FUNC(dev->pcidev->devfn);
5212 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
5213 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
5215 err = cp->alloc_resc(dev);
5217 netdev_err(dev->netdev, "allocate resource failure\n");
5221 err = cp->start_hw(dev);
5225 err = cnic_cm_open(dev);
5229 set_bit(CNIC_F_CNIC_UP, &dev->flags);
5231 cp->enable_int(dev);
5237 pci_dev_put(dev->pcidev);
5241 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
5243 cnic_disable_bnx2_int_sync(dev);
5245 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
5246 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
5248 cnic_init_context(dev, KWQ_CID);
5249 cnic_init_context(dev, KCQ_CID);
5251 cnic_setup_5709_context(dev, 0);
5254 cnic_free_resc(dev);
5258 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
5260 struct cnic_local *cp = dev->cnic_priv;
5263 *cp->kcq1.hw_prod_idx_ptr = 0;
5264 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
5265 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
5266 CNIC_WR16(dev, cp->kcq1.io_addr, 0);
5267 cnic_free_resc(dev);
5270 static void cnic_stop_hw(struct cnic_dev *dev)
5272 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5273 struct cnic_local *cp = dev->cnic_priv;
5276 /* Need to wait for the ring shutdown event to complete
5277 * before clearing the CNIC_UP flag.
5279 while (cp->udev->uio_dev != -1 && i < 15) {
5283 cnic_shutdown_rings(dev);
5284 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
5285 RCU_INIT_POINTER(cp->ulp_ops[CNIC_ULP_L4], NULL);
5287 cnic_cm_shutdown(dev);
5289 pci_dev_put(dev->pcidev);
5293 static void cnic_free_dev(struct cnic_dev *dev)
5297 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
5301 if (atomic_read(&dev->ref_count) != 0)
5302 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
5304 netdev_info(dev->netdev, "Removed CNIC device\n");
5305 dev_put(dev->netdev);
5309 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
5310 struct pci_dev *pdev)
5312 struct cnic_dev *cdev;
5313 struct cnic_local *cp;
5316 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
5318 cdev = kzalloc(alloc_size , GFP_KERNEL);
5320 netdev_err(dev, "allocate dev struct failure\n");
5325 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
5326 cdev->register_device = cnic_register_device;
5327 cdev->unregister_device = cnic_unregister_device;
5328 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
5330 cp = cdev->cnic_priv;
5332 cp->l2_single_buf_size = 0x400;
5333 cp->l2_rx_ring_size = 3;
5335 spin_lock_init(&cp->cnic_ulp_lock);
5337 netdev_info(dev, "Added CNIC device\n");
5342 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
5344 struct pci_dev *pdev;
5345 struct cnic_dev *cdev;
5346 struct cnic_local *cp;
5347 struct cnic_eth_dev *ethdev = NULL;
5348 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5350 probe = symbol_get(bnx2_cnic_probe);
5352 ethdev = (*probe)(dev);
5353 symbol_put(bnx2_cnic_probe);
5358 pdev = ethdev->pdev;
5364 if ((pdev->device == PCI_DEVICE_ID_NX2_5709 ||
5365 pdev->device == PCI_DEVICE_ID_NX2_5709S) &&
5366 (pdev->revision < 0x10)) {
5372 cdev = cnic_alloc_dev(dev, pdev);
5376 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
5377 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
5379 cp = cdev->cnic_priv;
5380 cp->ethdev = ethdev;
5381 cdev->pcidev = pdev;
5382 cp->chip_id = ethdev->chip_id;
5384 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5386 cp->cnic_ops = &cnic_bnx2_ops;
5387 cp->start_hw = cnic_start_bnx2_hw;
5388 cp->stop_hw = cnic_stop_bnx2_hw;
5389 cp->setup_pgtbl = cnic_setup_page_tbl;
5390 cp->alloc_resc = cnic_alloc_bnx2_resc;
5391 cp->free_resc = cnic_free_resc;
5392 cp->start_cm = cnic_cm_init_bnx2_hw;
5393 cp->stop_cm = cnic_cm_stop_bnx2_hw;
5394 cp->enable_int = cnic_enable_bnx2_int;
5395 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
5396 cp->close_conn = cnic_close_bnx2_conn;
5404 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5406 struct pci_dev *pdev;
5407 struct cnic_dev *cdev;
5408 struct cnic_local *cp;
5409 struct cnic_eth_dev *ethdev = NULL;
5410 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
5412 probe = symbol_get(bnx2x_cnic_probe);
5414 ethdev = (*probe)(dev);
5415 symbol_put(bnx2x_cnic_probe);
5420 pdev = ethdev->pdev;
5425 cdev = cnic_alloc_dev(dev, pdev);
5431 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
5432 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
5434 cp = cdev->cnic_priv;
5435 cp->ethdev = ethdev;
5436 cdev->pcidev = pdev;
5437 cp->chip_id = ethdev->chip_id;
5439 cdev->stats_addr = ethdev->addr_drv_info_to_mcp;
5441 if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5442 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5443 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) &&
5444 !(ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE))
5445 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
5447 if (cdev->max_fcoe_conn > BNX2X_FCOE_NUM_CONNECTIONS)
5448 cdev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
5450 memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6);
5452 cp->cnic_ops = &cnic_bnx2x_ops;
5453 cp->start_hw = cnic_start_bnx2x_hw;
5454 cp->stop_hw = cnic_stop_bnx2x_hw;
5455 cp->setup_pgtbl = cnic_setup_page_tbl_le;
5456 cp->alloc_resc = cnic_alloc_bnx2x_resc;
5457 cp->free_resc = cnic_free_resc;
5458 cp->start_cm = cnic_cm_init_bnx2x_hw;
5459 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
5460 cp->enable_int = cnic_enable_bnx2x_int;
5461 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
5462 if (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id))
5463 cp->ack_int = cnic_ack_bnx2x_e2_msix;
5465 cp->ack_int = cnic_ack_bnx2x_msix;
5466 cp->close_conn = cnic_close_bnx2x_conn;
5470 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
5472 struct ethtool_drvinfo drvinfo;
5473 struct cnic_dev *cdev = NULL;
5475 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
5476 memset(&drvinfo, 0, sizeof(drvinfo));
5477 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
5479 if (!strcmp(drvinfo.driver, "bnx2"))
5480 cdev = init_bnx2_cnic(dev);
5481 if (!strcmp(drvinfo.driver, "bnx2x"))
5482 cdev = init_bnx2x_cnic(dev);
5484 write_lock(&cnic_dev_lock);
5485 list_add(&cdev->list, &cnic_dev_list);
5486 write_unlock(&cnic_dev_lock);
5492 static void cnic_rcv_netevent(struct cnic_local *cp, unsigned long event,
5498 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
5499 struct cnic_ulp_ops *ulp_ops;
5502 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
5503 if (!ulp_ops || !ulp_ops->indicate_netevent)
5506 ctx = cp->ulp_handle[if_type];
5508 ulp_ops->indicate_netevent(ctx, event, vlan_id);
5514 * netdev event handler
5516 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
5519 struct net_device *netdev = ptr;
5520 struct cnic_dev *dev;
5523 dev = cnic_from_netdev(netdev);
5525 if (!dev && (event == NETDEV_REGISTER || netif_running(netdev))) {
5526 /* Check for the hot-plug device */
5527 dev = is_cnic_dev(netdev);
5534 struct cnic_local *cp = dev->cnic_priv;
5538 else if (event == NETDEV_UNREGISTER)
5541 if (event == NETDEV_UP || (new_dev && netif_running(netdev))) {
5542 if (cnic_register_netdev(dev) != 0) {
5546 if (!cnic_start_hw(dev))
5547 cnic_ulp_start(dev);
5550 cnic_rcv_netevent(cp, event, 0);
5552 if (event == NETDEV_GOING_DOWN) {
5555 cnic_unregister_netdev(dev);
5556 } else if (event == NETDEV_UNREGISTER) {
5557 write_lock(&cnic_dev_lock);
5558 list_del_init(&dev->list);
5559 write_unlock(&cnic_dev_lock);
5567 struct net_device *realdev;
5570 vid = cnic_get_vlan(netdev, &realdev);
5572 dev = cnic_from_netdev(realdev);
5574 vid |= VLAN_TAG_PRESENT;
5575 cnic_rcv_netevent(dev->cnic_priv, event, vid);
5584 static struct notifier_block cnic_netdev_notifier = {
5585 .notifier_call = cnic_netdev_event
5588 static void cnic_release(void)
5590 struct cnic_dev *dev;
5591 struct cnic_uio_dev *udev;
5593 while (!list_empty(&cnic_dev_list)) {
5594 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
5595 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
5601 cnic_unregister_netdev(dev);
5602 list_del_init(&dev->list);
5605 while (!list_empty(&cnic_udev_list)) {
5606 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5608 cnic_free_uio(udev);
5612 static int __init cnic_init(void)
5616 pr_info("%s", version);
5618 rc = register_netdevice_notifier(&cnic_netdev_notifier);
5624 cnic_wq = create_singlethread_workqueue("cnic_wq");
5627 unregister_netdevice_notifier(&cnic_netdev_notifier);
5634 static void __exit cnic_exit(void)
5636 unregister_netdevice_notifier(&cnic_netdev_notifier);
5638 destroy_workqueue(cnic_wq);
5641 module_init(cnic_init);
5642 module_exit(cnic_exit);