1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
7 #ifndef OMAP_DMM_TILER_H
8 #define OMAP_DMM_TILER_H
29 struct list_head alloc_node; /* node for global block list */
30 struct tcm_area area; /* area */
31 enum tiler_fmt fmt; /* format */
34 /* bits representing the same slot in DMM-TILER hw-block */
35 #define SLOT_WIDTH_BITS 6
36 #define SLOT_HEIGHT_BITS 6
38 /* bits reserved to describe coordinates in DMM-TILER hw-block */
39 #define CONT_WIDTH_BITS 14
40 #define CONT_HEIGHT_BITS 13
42 /* calculated constants */
43 #define TILER_PAGE (1 << (SLOT_WIDTH_BITS + SLOT_HEIGHT_BITS))
44 #define TILER_WIDTH (1 << (CONT_WIDTH_BITS - SLOT_WIDTH_BITS))
45 #define TILER_HEIGHT (1 << (CONT_HEIGHT_BITS - SLOT_HEIGHT_BITS))
48 Table 15-11. Coding and Description of TILER Orientations
49 S Y X Description Alternate description
50 0 0 0 0-degree view Natural view
51 0 0 1 0-degree view with vertical mirror 180-degree view with horizontal mirror
52 0 1 0 0-degree view with horizontal mirror 180-degree view with vertical mirror
54 1 0 0 90-degree view with vertical mirror 270-degree view with horizontal mirror
57 1 1 1 90-degree view with horizontal mirror 270-degree view with vertical mirror
59 #define MASK_XY_FLIP (1 << 31)
60 #define MASK_Y_INVERT (1 << 30)
61 #define MASK_X_INVERT (1 << 29)
62 #define SHIFT_ACC_MODE 27
63 #define MASK_ACC_MODE 3
65 #define MASK(bits) ((1 << (bits)) - 1)
67 #define TILVIEW_8BIT 0x60000000u
68 #define TILVIEW_16BIT (TILVIEW_8BIT + VIEW_SIZE)
69 #define TILVIEW_32BIT (TILVIEW_16BIT + VIEW_SIZE)
70 #define TILVIEW_PAGE (TILVIEW_32BIT + VIEW_SIZE)
71 #define TILVIEW_END (TILVIEW_PAGE + VIEW_SIZE)
73 /* create tsptr by adding view orientation and access mode */
74 #define TIL_ADDR(x, orient, a)\
75 ((u32) (x) | (orient) | ((a) << SHIFT_ACC_MODE))
77 #ifdef CONFIG_DEBUG_FS
78 int tiler_map_show(struct seq_file *s, void *arg);
82 int tiler_pin(struct tiler_block *block, struct page **pages,
83 u32 npages, u32 roll, bool wait);
84 int tiler_unpin(struct tiler_block *block);
87 struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, u16 w, u16 h,
89 struct tiler_block *tiler_reserve_1d(size_t size);
90 int tiler_release(struct tiler_block *block);
93 dma_addr_t tiler_ssptr(struct tiler_block *block);
94 dma_addr_t tiler_tsptr(struct tiler_block *block, u32 orient,
96 u32 tiler_stride(enum tiler_fmt fmt, u32 orient);
97 size_t tiler_size(enum tiler_fmt fmt, u16 w, u16 h);
98 size_t tiler_vsize(enum tiler_fmt fmt, u16 w, u16 h);
99 void tiler_align(enum tiler_fmt fmt, u16 *w, u16 *h);
100 u32 tiler_get_cpu_cache_flags(void);
101 bool dmm_is_available(void);
103 extern struct platform_driver omap_dmm_driver;
105 /* GEM bo flags -> tiler fmt */
106 static inline enum tiler_fmt gem2fmt(u32 flags)
108 switch (flags & OMAP_BO_TILED_MASK) {
109 case OMAP_BO_TILED_8:
111 case OMAP_BO_TILED_16:
113 case OMAP_BO_TILED_32:
120 static inline bool validfmt(enum tiler_fmt fmt)