drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <[email protected]>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <[email protected]>
  26  *      Dave Airlie <[email protected]>
  27  *      Jesse Barnes <[email protected]>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <drm/drmP.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include "intel_drv.h"
  38 #include <drm/i915_drm.h>
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds_connector {
  44         struct intel_connector base;
  45
  46         struct notifier_block lid_notifier;
  47 };
  48
  49 struct intel_lvds_encoder {
  50         struct intel_encoder base;
  51
  52         u32 pfit_control;
  53         u32 pfit_pgm_ratios;
  54         bool is_dual_link;
  55         u32 reg;
  56
  57         struct intel_lvds_connector *attached_connector;
  58 };
  59
  60 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
  61 {
  62         return container_of(encoder, struct intel_lvds_encoder, base.base);
  63 }
  64
  65 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
  66 {
  67         return container_of(connector, struct intel_lvds_connector, base.base);
  68 }
  69
  70 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  71                                     enum pipe *pipe)
  72 {
  73         struct drm_device *dev = encoder->base.dev;
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  76         u32 tmp;
  77
  78         tmp = I915_READ(lvds_encoder->reg);
  79
  80         if (!(tmp & LVDS_PORT_EN))
  81                 return false;
  82
  83         if (HAS_PCH_CPT(dev))
  84                 *pipe = PORT_TO_PIPE_CPT(tmp);
  85         else
  86                 *pipe = PORT_TO_PIPE(tmp);
  87
  88         return true;
  89 }
  90
  91 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
  92  * This is an exception to the general rule that mode_set doesn't turn
  93  * things on.
  94  */
  95 static void intel_pre_pll_enable_lvds(struct intel_encoder *encoder)
  96 {
  97         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
  98         struct drm_device *dev = encoder->base.dev;
  99         struct drm_i915_private *dev_priv = dev->dev_private;
 100         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 101         struct drm_display_mode *fixed_mode =
 102                 lvds_encoder->attached_connector->base.panel.fixed_mode;
 103         int pipe = intel_crtc->pipe;
 104         u32 temp;
 105
 106         temp = I915_READ(lvds_encoder->reg);
 107         temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
 108
 109         if (HAS_PCH_CPT(dev)) {
 110                 temp &= ~PORT_TRANS_SEL_MASK;
 111                 temp |= PORT_TRANS_SEL_CPT(pipe);
 112         } else {
 113                 if (pipe == 1) {
 114                         temp |= LVDS_PIPEB_SELECT;
 115                 } else {
 116                         temp &= ~LVDS_PIPEB_SELECT;
 117                 }
 118         }
 119
 120         /* set the corresponsding LVDS_BORDER bit */
 121         temp |= dev_priv->lvds_border_bits;
 122         /* Set the B0-B3 data pairs corresponding to whether we're going to
 123          * set the DPLLs for dual-channel mode or not.
 124          */
 125         if (lvds_encoder->is_dual_link)
 126                 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
 127         else
 128                 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
 129
 130         /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
 131          * appropriately here, but we need to look more thoroughly into how
 132          * panels behave in the two modes.
 133          */
 134
 135         /* Set the dithering flag on LVDS as needed, note that there is no
 136          * special lvds dither control bit on pch-split platforms, dithering is
 137          * only controlled through the PIPECONF reg. */
 138         if (INTEL_INFO(dev)->gen == 4) {
 139                 if (dev_priv->lvds_dither)
 140                         temp |= LVDS_ENABLE_DITHER;
 141                 else
 142                         temp &= ~LVDS_ENABLE_DITHER;
 143         }
 144         temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
 145         if (fixed_mode->flags & DRM_MODE_FLAG_NHSYNC)
 146                 temp |= LVDS_HSYNC_POLARITY;
 147         if (fixed_mode->flags & DRM_MODE_FLAG_NVSYNC)
 148                 temp |= LVDS_VSYNC_POLARITY;
 149
 150         I915_WRITE(lvds_encoder->reg, temp);
 151 }
 152
 153 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
 154 {
 155         struct drm_device *dev = encoder->base.dev;
 156         struct intel_lvds_encoder *enc = to_lvds_encoder(&encoder->base);
 157         struct drm_i915_private *dev_priv = dev->dev_private;
 158
 159         if (HAS_PCH_SPLIT(dev) || !enc->pfit_control)
 160                 return;
 161
 162         /*
 163          * Enable automatic panel scaling so that non-native modes
 164          * fill the screen.  The panel fitter should only be
 165          * adjusted whilst the pipe is disabled, according to
 166          * register description and PRM.
 167          */
 168         DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
 169                       enc->pfit_control,
 170                       enc->pfit_pgm_ratios);
 171
 172         I915_WRITE(PFIT_PGM_RATIOS, enc->pfit_pgm_ratios);
 173         I915_WRITE(PFIT_CONTROL, enc->pfit_control);
 174 }
 175
 176 /**
 177  * Sets the power state for the panel.
 178  */
 179 static void intel_enable_lvds(struct intel_encoder *encoder)
 180 {
 181         struct drm_device *dev = encoder->base.dev;
 182         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 183         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 184         struct drm_i915_private *dev_priv = dev->dev_private;
 185         u32 ctl_reg, stat_reg;
 186
 187         if (HAS_PCH_SPLIT(dev)) {
 188                 ctl_reg = PCH_PP_CONTROL;
 189                 stat_reg = PCH_PP_STATUS;
 190         } else {
 191                 ctl_reg = PP_CONTROL;
 192                 stat_reg = PP_STATUS;
 193         }
 194
 195         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
 196
 197         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 198         POSTING_READ(lvds_encoder->reg);
 199         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 200                 DRM_ERROR("timed out waiting for panel to power on\n");
 201
 202         intel_panel_enable_backlight(dev, intel_crtc->pipe);
 203 }
 204
 205 static void intel_disable_lvds(struct intel_encoder *encoder)
 206 {
 207         struct drm_device *dev = encoder->base.dev;
 208         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
 209         struct drm_i915_private *dev_priv = dev->dev_private;
 210         u32 ctl_reg, stat_reg;
 211
 212         if (HAS_PCH_SPLIT(dev)) {
 213                 ctl_reg = PCH_PP_CONTROL;
 214                 stat_reg = PCH_PP_STATUS;
 215         } else {
 216                 ctl_reg = PP_CONTROL;
 217                 stat_reg = PP_STATUS;
 218         }
 219
 220         intel_panel_disable_backlight(dev);
 221
 222         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 223         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 224                 DRM_ERROR("timed out waiting for panel to power off\n");
 225
 226         I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
 227         POSTING_READ(lvds_encoder->reg);
 228 }
 229
 230 static int intel_lvds_mode_valid(struct drm_connector *connector,
 231                                  struct drm_display_mode *mode)
 232 {
 233         struct intel_connector *intel_connector = to_intel_connector(connector);
 234         struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
 235
 236         if (mode->hdisplay > fixed_mode->hdisplay)
 237                 return MODE_PANEL;
 238         if (mode->vdisplay > fixed_mode->vdisplay)
 239                 return MODE_PANEL;
 240
 241         return MODE_OK;
 242 }
 243
 244 static void
 245 centre_horizontally(struct drm_display_mode *mode,
 246                     int width)
 247 {
 248         u32 border, sync_pos, blank_width, sync_width;
 249
 250         /* keep the hsync and hblank widths constant */
 251         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 252         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 253         sync_pos = (blank_width - sync_width + 1) / 2;
 254
 255         border = (mode->hdisplay - width + 1) / 2;
 256         border += border & 1; /* make the border even */
 257
 258         mode->crtc_hdisplay = width;
 259         mode->crtc_hblank_start = width + border;
 260         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 261
 262         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 263         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 264
 265         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 266 }
 267
 268 static void
 269 centre_vertically(struct drm_display_mode *mode,
 270                   int height)
 271 {
 272         u32 border, sync_pos, blank_width, sync_width;
 273
 274         /* keep the vsync and vblank widths constant */
 275         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 276         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 277         sync_pos = (blank_width - sync_width + 1) / 2;
 278
 279         border = (mode->vdisplay - height + 1) / 2;
 280
 281         mode->crtc_vdisplay = height;
 282         mode->crtc_vblank_start = height + border;
 283         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 284
 285         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 286         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 287
 288         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 289 }
 290
 291 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 292 {
 293         /*
 294          * Floating point operation is not supported. So the FACTOR
 295          * is defined, which can avoid the floating point computation
 296          * when calculating the panel ratio.
 297          */
 298 #define ACCURACY 12
 299 #define FACTOR (1 << ACCURACY)
 300         u32 ratio = source * FACTOR / target;
 301         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 302 }
 303
 304 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 305                                   const struct drm_display_mode *mode,
 306                                   struct drm_display_mode *adjusted_mode)
 307 {
 308         struct drm_device *dev = encoder->dev;
 309         struct drm_i915_private *dev_priv = dev->dev_private;
 310         struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(encoder);
 311         struct intel_connector *intel_connector =
 312                 &lvds_encoder->attached_connector->base;
 313         struct intel_crtc *intel_crtc = lvds_encoder->base.new_crtc;
 314         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 315         int pipe;
 316
 317         /* Should never happen!! */
 318         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 319                 DRM_ERROR("Can't support LVDS on pipe A\n");
 320                 return false;
 321         }
 322
 323         if (intel_encoder_check_is_cloned(&lvds_encoder->base))
 324                 return false;
 325
 326         /*
 327          * We have timings from the BIOS for the panel, put them in
 328          * to the adjusted mode.  The CRTC will be set up for this mode,
 329          * with the panel scaling set up to source from the H/VDisplay
 330          * of the original mode.
 331          */
 332         intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
 333                                adjusted_mode);
 334
 335         if (HAS_PCH_SPLIT(dev)) {
 336                 intel_pch_panel_fitting(dev,
 337                                         intel_connector->panel.fitting_mode,
 338                                         mode, adjusted_mode);
 339                 return true;
 340         }
 341
 342         /* Native modes don't need fitting */
 343         if (adjusted_mode->hdisplay == mode->hdisplay &&
 344             adjusted_mode->vdisplay == mode->vdisplay)
 345                 goto out;
 346
 347         /* 965+ wants fuzzy fitting */
 348         if (INTEL_INFO(dev)->gen >= 4)
 349                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 350                                  PFIT_FILTER_FUZZY);
 351
 352         /*
 353          * Enable automatic panel scaling for non-native modes so that they fill
 354          * the screen.  Should be enabled before the pipe is enabled, according
 355          * to register description and PRM.
 356          * Change the value here to see the borders for debugging
 357          */
 358         for_each_pipe(pipe)
 359                 I915_WRITE(BCLRPAT(pipe), 0);
 360
 361         drm_mode_set_crtcinfo(adjusted_mode, 0);
 362
 363         switch (intel_connector->panel.fitting_mode) {
 364         case DRM_MODE_SCALE_CENTER:
 365                 /*
 366                  * For centered modes, we have to calculate border widths &
 367                  * heights and modify the values programmed into the CRTC.
 368                  */
 369                 centre_horizontally(adjusted_mode, mode->hdisplay);
 370                 centre_vertically(adjusted_mode, mode->vdisplay);
 371                 border = LVDS_BORDER_ENABLE;
 372                 break;
 373
 374         case DRM_MODE_SCALE_ASPECT:
 375                 /* Scale but preserve the aspect ratio */
 376                 if (INTEL_INFO(dev)->gen >= 4) {
 377                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 378                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 379
 380                         /* 965+ is easy, it does everything in hw */
 381                         if (scaled_width > scaled_height)
 382                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
 383                         else if (scaled_width < scaled_height)
 384                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
 385                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 386                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 387                 } else {
 388                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 389                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 390                         /*
 391                          * For earlier chips we have to calculate the scaling
 392                          * ratio by hand and program it into the
 393                          * PFIT_PGM_RATIO register
 394                          */
 395                         if (scaled_width > scaled_height) { /* pillar */
 396                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 397
 398                                 border = LVDS_BORDER_ENABLE;
 399                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 400                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 401                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 402                                                             bits << PFIT_VERT_SCALE_SHIFT);
 403                                         pfit_control |= (PFIT_ENABLE |
 404                                                          VERT_INTERP_BILINEAR |
 405                                                          HORIZ_INTERP_BILINEAR);
 406                                 }
 407                         } else if (scaled_width < scaled_height) { /* letter */
 408                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 409
 410                                 border = LVDS_BORDER_ENABLE;
 411                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 412                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 413                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 414                                                             bits << PFIT_VERT_SCALE_SHIFT);
 415                                         pfit_control |= (PFIT_ENABLE |
 416                                                          VERT_INTERP_BILINEAR |
 417                                                          HORIZ_INTERP_BILINEAR);
 418                                 }
 419                         } else
 420                                 /* Aspects match, Let hw scale both directions */
 421                                 pfit_control |= (PFIT_ENABLE |
 422                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 423                                                  VERT_INTERP_BILINEAR |
 424                                                  HORIZ_INTERP_BILINEAR);
 425                 }
 426                 break;
 427
 428         case DRM_MODE_SCALE_FULLSCREEN:
 429                 /*
 430                  * Full scaling, even if it changes the aspect ratio.
 431                  * Fortunately this is all done for us in hw.
 432                  */
 433                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 434                     mode->hdisplay != adjusted_mode->hdisplay) {
 435                         pfit_control |= PFIT_ENABLE;
 436                         if (INTEL_INFO(dev)->gen >= 4)
 437                                 pfit_control |= PFIT_SCALING_AUTO;
 438                         else
 439                                 pfit_control |= (VERT_AUTO_SCALE |
 440                                                  VERT_INTERP_BILINEAR |
 441                                                  HORIZ_AUTO_SCALE |
 442                                                  HORIZ_INTERP_BILINEAR);
 443                 }
 444                 break;
 445
 446         default:
 447                 break;
 448         }
 449
 450 out:
 451         /* If not enabling scaling, be consistent and always use 0. */
 452         if ((pfit_control & PFIT_ENABLE) == 0) {
 453                 pfit_control = 0;
 454                 pfit_pgm_ratios = 0;
 455         }
 456
 457         /* Make sure pre-965 set dither correctly */
 458         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
 459                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 460
 461         if (pfit_control != lvds_encoder->pfit_control ||
 462             pfit_pgm_ratios != lvds_encoder->pfit_pgm_ratios) {
 463                 lvds_encoder->pfit_control = pfit_control;
 464                 lvds_encoder->pfit_pgm_ratios = pfit_pgm_ratios;
 465         }
 466         dev_priv->lvds_border_bits = border;
 467
 468         /*
 469          * XXX: It would be nice to support lower refresh rates on the
 470          * panels to reduce power consumption, and perhaps match the
 471          * user's requested refresh rate.
 472          */
 473
 474         return true;
 475 }
 476
 477 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 478                                 struct drm_display_mode *mode,
 479                                 struct drm_display_mode *adjusted_mode)
 480 {
 481         /*
 482          * The LVDS pin pair will already have been turned on in the
 483          * intel_crtc_mode_set since it has a large impact on the DPLL
 484          * settings.
 485          */
 486 }
 487
 488 /**
 489  * Detect the LVDS connection.
 490  *
 491  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 492  * connected and closed means disconnected.  We also send hotplug events as
 493  * needed, using lid status notification from the input layer.
 494  */
 495 static enum drm_connector_status
 496 intel_lvds_detect(struct drm_connector *connector, bool force)
 497 {
 498         struct drm_device *dev = connector->dev;
 499         enum drm_connector_status status;
 500
 501         status = intel_panel_detect(dev);
 502         if (status != connector_status_unknown)
 503                 return status;
 504
 505         return connector_status_connected;
 506 }
 507
 508 /**
 509  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 510  */
 511 static int intel_lvds_get_modes(struct drm_connector *connector)
 512 {
 513         struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
 514         struct drm_device *dev = connector->dev;
 515         struct drm_display_mode *mode;
 516
 517         /* use cached edid if we have one */
 518         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 519                 return drm_add_edid_modes(connector, lvds_connector->base.edid);
 520
 521         mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
 522         if (mode == NULL)
 523                 return 0;
 524
 525         drm_mode_probed_add(connector, mode);
 526         return 1;
 527 }
 528
 529 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 530 {
 531         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 532         return 1;
 533 }
 534
 535 /* The GPU hangs up on these systems if modeset is performed on LID open */
 536 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 537         {
 538                 .callback = intel_no_modeset_on_lid_dmi_callback,
 539                 .ident = "Toshiba Tecra A11",
 540                 .matches = {
 541                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 542                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 543                 },
 544         },
 545
 546         { }     /* terminating entry */
 547 };
 548
 549 /*
 550  * Lid events. Note the use of 'modeset':
 551  *  - we set it to MODESET_ON_LID_OPEN on lid close,
 552  *    and set it to MODESET_DONE on open
 553  *  - we use it as a "only once" bit (ie we ignore
 554  *    duplicate events where it was already properly set)
 555  *  - the suspend/resume paths will set it to
 556  *    MODESET_SUSPENDED and ignore the lid open event,
 557  *    because they restore the mode ("lid open").
 558  */
 559 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 560                             void *unused)
 561 {
 562         struct intel_lvds_connector *lvds_connector =
 563                 container_of(nb, struct intel_lvds_connector, lid_notifier);
 564         struct drm_connector *connector = &lvds_connector->base.base;
 565         struct drm_device *dev = connector->dev;
 566         struct drm_i915_private *dev_priv = dev->dev_private;
 567
 568         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 569                 return NOTIFY_OK;
 570
 571         mutex_lock(&dev_priv->modeset_restore_lock);
 572         if (dev_priv->modeset_restore == MODESET_SUSPENDED)
 573                 goto exit;
 574         /*
 575          * check and update the status of LVDS connector after receiving
 576          * the LID nofication event.
 577          */
 578         connector->status = connector->funcs->detect(connector, false);
 579
 580         /* Don't force modeset on machines where it causes a GPU lockup */
 581         if (dmi_check_system(intel_no_modeset_on_lid))
 582                 goto exit;
 583         if (!acpi_lid_open()) {
 584                 /* do modeset on next lid open event */
 585                 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
 586                 goto exit;
 587         }
 588
 589         if (dev_priv->modeset_restore == MODESET_DONE)
 590                 goto exit;
 591
 592         drm_modeset_lock_all(dev);
 593         intel_modeset_setup_hw_state(dev, true);
 594         drm_modeset_unlock_all(dev);
 595
 596         dev_priv->modeset_restore = MODESET_DONE;
 597
 598 exit:
 599         mutex_unlock(&dev_priv->modeset_restore_lock);
 600         return NOTIFY_OK;
 601 }
 602
 603 /**
 604  * intel_lvds_destroy - unregister and free LVDS structures
 605  * @connector: connector to free
 606  *
 607  * Unregister the DDC bus for this connector then free the driver private
 608  * structure.
 609  */
 610 static void intel_lvds_destroy(struct drm_connector *connector)
 611 {
 612         struct intel_lvds_connector *lvds_connector =
 613                 to_lvds_connector(connector);
 614
 615         if (lvds_connector->lid_notifier.notifier_call)
 616                 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
 617
 618         if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
 619                 kfree(lvds_connector->base.edid);
 620
 621         intel_panel_destroy_backlight(connector->dev);
 622         intel_panel_fini(&lvds_connector->base.panel);
 623
 624         drm_sysfs_connector_remove(connector);
 625         drm_connector_cleanup(connector);
 626         kfree(connector);
 627 }
 628
 629 static int intel_lvds_set_property(struct drm_connector *connector,
 630                                    struct drm_property *property,
 631                                    uint64_t value)
 632 {
 633         struct intel_connector *intel_connector = to_intel_connector(connector);
 634         struct drm_device *dev = connector->dev;
 635
 636         if (property == dev->mode_config.scaling_mode_property) {
 637                 struct drm_crtc *crtc;
 638
 639                 if (value == DRM_MODE_SCALE_NONE) {
 640                         DRM_DEBUG_KMS("no scaling not supported\n");
 641                         return -EINVAL;
 642                 }
 643
 644                 if (intel_connector->panel.fitting_mode == value) {
 645                         /* the LVDS scaling property is not changed */
 646                         return 0;
 647                 }
 648                 intel_connector->panel.fitting_mode = value;
 649
 650                 crtc = intel_attached_encoder(connector)->base.crtc;
 651                 if (crtc && crtc->enabled) {
 652                         /*
 653                          * If the CRTC is enabled, the display will be changed
 654                          * according to the new panel fitting mode.
 655                          */
 656                         intel_crtc_restore_mode(crtc);
 657                 }
 658         }
 659
 660         return 0;
 661 }
 662
 663 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 664         .mode_fixup = intel_lvds_mode_fixup,
 665         .mode_set = intel_lvds_mode_set,
 666 };
 667
 668 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 669         .get_modes = intel_lvds_get_modes,
 670         .mode_valid = intel_lvds_mode_valid,
 671         .best_encoder = intel_best_encoder,
 672 };
 673
 674 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 675         .dpms = intel_connector_dpms,
 676         .detect = intel_lvds_detect,
 677         .fill_modes = drm_helper_probe_single_connector_modes,
 678         .set_property = intel_lvds_set_property,
 679         .destroy = intel_lvds_destroy,
 680 };
 681
 682 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 683         .destroy = intel_encoder_destroy,
 684 };
 685
 686 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 687 {
 688         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 689         return 1;
 690 }
 691
 692 /* These systems claim to have LVDS, but really don't */
 693 static const struct dmi_system_id intel_no_lvds[] = {
 694         {
 695                 .callback = intel_no_lvds_dmi_callback,
 696                 .ident = "Apple Mac Mini (Core series)",
 697                 .matches = {
 698                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 699                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 700                 },
 701         },
 702         {
 703                 .callback = intel_no_lvds_dmi_callback,
 704                 .ident = "Apple Mac Mini (Core 2 series)",
 705                 .matches = {
 706                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 707                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 708                 },
 709         },
 710         {
 711                 .callback = intel_no_lvds_dmi_callback,
 712                 .ident = "MSI IM-945GSE-A",
 713                 .matches = {
 714                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 715                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 716                 },
 717         },
 718         {
 719                 .callback = intel_no_lvds_dmi_callback,
 720                 .ident = "Dell Studio Hybrid",
 721                 .matches = {
 722                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 723                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 724                 },
 725         },
 726         {
 727                 .callback = intel_no_lvds_dmi_callback,
 728                 .ident = "Dell OptiPlex FX170",
 729                 .matches = {
 730                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 731                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 732                 },
 733         },
 734         {
 735                 .callback = intel_no_lvds_dmi_callback,
 736                 .ident = "AOpen Mini PC",
 737                 .matches = {
 738                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 739                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 740                 },
 741         },
 742         {
 743                 .callback = intel_no_lvds_dmi_callback,
 744                 .ident = "AOpen Mini PC MP915",
 745                 .matches = {
 746                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 747                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 748                 },
 749         },
 750         {
 751                 .callback = intel_no_lvds_dmi_callback,
 752                 .ident = "AOpen i915GMm-HFS",
 753                 .matches = {
 754                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 755                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 756                 },
 757         },
 758         {
 759                 .callback = intel_no_lvds_dmi_callback,
 760                 .ident = "AOpen i45GMx-I",
 761                 .matches = {
 762                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 763                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 764                 },
 765         },
 766         {
 767                 .callback = intel_no_lvds_dmi_callback,
 768                 .ident = "Aopen i945GTt-VFA",
 769                 .matches = {
 770                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 771                 },
 772         },
 773         {
 774                 .callback = intel_no_lvds_dmi_callback,
 775                 .ident = "Clientron U800",
 776                 .matches = {
 777                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 778                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 779                 },
 780         },
 781         {
 782                 .callback = intel_no_lvds_dmi_callback,
 783                 .ident = "Clientron E830",
 784                 .matches = {
 785                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 786                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 787                 },
 788         },
 789         {
 790                 .callback = intel_no_lvds_dmi_callback,
 791                 .ident = "Asus EeeBox PC EB1007",
 792                 .matches = {
 793                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 794                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 795                 },
 796         },
 797         {
 798                 .callback = intel_no_lvds_dmi_callback,
 799                 .ident = "Asus AT5NM10T-I",
 800                 .matches = {
 801                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 802                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 803                 },
 804         },
 805         {
 806                 .callback = intel_no_lvds_dmi_callback,
 807                 .ident = "Hewlett-Packard HP t5740e Thin Client",
 808                 .matches = {
 809                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 810                         DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
 811                 },
 812         },
 813         {
 814                 .callback = intel_no_lvds_dmi_callback,
 815                 .ident = "Hewlett-Packard t5745",
 816                 .matches = {
 817                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 818                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 819                 },
 820         },
 821         {
 822                 .callback = intel_no_lvds_dmi_callback,
 823                 .ident = "Hewlett-Packard st5747",
 824                 .matches = {
 825                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 826                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 827                 },
 828         },
 829         {
 830                 .callback = intel_no_lvds_dmi_callback,
 831                 .ident = "MSI Wind Box DC500",
 832                 .matches = {
 833                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 834                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 835                 },
 836         },
 837         {
 838                 .callback = intel_no_lvds_dmi_callback,
 839                 .ident = "Gigabyte GA-D525TUD",
 840                 .matches = {
 841                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 842                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 843                 },
 844         },
 845         {
 846                 .callback = intel_no_lvds_dmi_callback,
 847                 .ident = "Supermicro X7SPA-H",
 848                 .matches = {
 849                         DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
 850                         DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
 851                 },
 852         },
 853
 854         { }     /* terminating entry */
 855 };
 856
 857 /**
 858  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 859  * @dev: drm device
 860  * @connector: LVDS connector
 861  *
 862  * Find the reduced downclock for LVDS in EDID.
 863  */
 864 static void intel_find_lvds_downclock(struct drm_device *dev,
 865                                       struct drm_display_mode *fixed_mode,
 866                                       struct drm_connector *connector)
 867 {
 868         struct drm_i915_private *dev_priv = dev->dev_private;
 869         struct drm_display_mode *scan;
 870         int temp_downclock;
 871
 872         temp_downclock = fixed_mode->clock;
 873         list_for_each_entry(scan, &connector->probed_modes, head) {
 874                 /*
 875                  * If one mode has the same resolution with the fixed_panel
 876                  * mode while they have the different refresh rate, it means
 877                  * that the reduced downclock is found for the LVDS. In such
 878                  * case we can set the different FPx0/1 to dynamically select
 879                  * between low and high frequency.
 880                  */
 881                 if (scan->hdisplay == fixed_mode->hdisplay &&
 882                     scan->hsync_start == fixed_mode->hsync_start &&
 883                     scan->hsync_end == fixed_mode->hsync_end &&
 884                     scan->htotal == fixed_mode->htotal &&
 885                     scan->vdisplay == fixed_mode->vdisplay &&
 886                     scan->vsync_start == fixed_mode->vsync_start &&
 887                     scan->vsync_end == fixed_mode->vsync_end &&
 888                     scan->vtotal == fixed_mode->vtotal) {
 889                         if (scan->clock < temp_downclock) {
 890                                 /*
 891                                  * The downclock is already found. But we
 892                                  * expect to find the lower downclock.
 893                                  */
 894                                 temp_downclock = scan->clock;
 895                         }
 896                 }
 897         }
 898         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 899                 /* We found the downclock for LVDS. */
 900                 dev_priv->lvds_downclock_avail = 1;
 901                 dev_priv->lvds_downclock = temp_downclock;
 902                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 903                               "Normal clock %dKhz, downclock %dKhz\n",
 904                               fixed_mode->clock, temp_downclock);
 905         }
 906 }
 907
 908 /*
 909  * Enumerate the child dev array parsed from VBT to check whether
 910  * the LVDS is present.
 911  * If it is present, return 1.
 912  * If it is not present, return false.
 913  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 914  */
 915 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 916                                    u8 *i2c_pin)
 917 {
 918         struct drm_i915_private *dev_priv = dev->dev_private;
 919         int i;
 920
 921         if (!dev_priv->child_dev_num)
 922                 return true;
 923
 924         for (i = 0; i < dev_priv->child_dev_num; i++) {
 925                 struct child_device_config *child = dev_priv->child_dev + i;
 926
 927                 /* If the device type is not LFP, continue.
 928                  * We have to check both the new identifiers as well as the
 929                  * old for compatibility with some BIOSes.
 930                  */
 931                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 932                     child->device_type != DEVICE_TYPE_LFP)
 933                         continue;
 934
 935                 if (intel_gmbus_is_port_valid(child->i2c_pin))
 936                         *i2c_pin = child->i2c_pin;
 937
 938                 /* However, we cannot trust the BIOS writers to populate
 939                  * the VBT correctly.  Since LVDS requires additional
 940                  * information from AIM blocks, a non-zero addin offset is
 941                  * a good indicator that the LVDS is actually present.
 942                  */
 943                 if (child->addin_offset)
 944                         return true;
 945
 946                 /* But even then some BIOS writers perform some black magic
 947                  * and instantiate the device without reference to any
 948                  * additional data.  Trust that if the VBT was written into
 949                  * the OpRegion then they have validated the LVDS's existence.
 950                  */
 951                 if (dev_priv->opregion.vbt)
 952                         return true;
 953         }
 954
 955         return false;
 956 }
 957
 958 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
 959 {
 960         DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
 961         return 1;
 962 }
 963
 964 static const struct dmi_system_id intel_dual_link_lvds[] = {
 965         {
 966                 .callback = intel_dual_link_lvds_callback,
 967                 .ident = "Apple MacBook Pro (Core i5/i7 Series)",
 968                 .matches = {
 969                         DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
 970                         DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
 971                 },
 972         },
 973         { }     /* terminating entry */
 974 };
 975
 976 bool intel_is_dual_link_lvds(struct drm_device *dev)
 977 {
 978         struct intel_encoder *encoder;
 979         struct intel_lvds_encoder *lvds_encoder;
 980
 981         list_for_each_entry(encoder, &dev->mode_config.encoder_list,
 982                             base.head) {
 983                 if (encoder->type == INTEL_OUTPUT_LVDS) {
 984                         lvds_encoder = to_lvds_encoder(&encoder->base);
 985
 986                         return lvds_encoder->is_dual_link;
 987                 }
 988         }
 989
 990         return false;
 991 }
 992
 993 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
 994 {
 995         struct drm_device *dev = lvds_encoder->base.base.dev;
 996         unsigned int val;
 997         struct drm_i915_private *dev_priv = dev->dev_private;
 998
 999         /* use the module option value if specified */
1000         if (i915_lvds_channel_mode > 0)
1001                 return i915_lvds_channel_mode == 2;
1002
1003         if (dmi_check_system(intel_dual_link_lvds))
1004                 return true;
1005
1006         /* BIOS should set the proper LVDS register value at boot, but
1007          * in reality, it doesn't set the value when the lid is closed;
1008          * we need to check "the value to be set" in VBT when LVDS
1009          * register is uninitialized.
1010          */
1011         val = I915_READ(lvds_encoder->reg);
1012         if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
1013                 val = dev_priv->bios_lvds_val;
1014
1015         return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
1016 }
1017
1018 static bool intel_lvds_supported(struct drm_device *dev)
1019 {
1020         /* With the introduction of the PCH we gained a dedicated
1021          * LVDS presence pin, use it. */
1022         if (HAS_PCH_SPLIT(dev))
1023                 return true;
1024
1025         /* Otherwise LVDS was only attached to mobile products,
1026          * except for the inglorious 830gm */
1027         return IS_MOBILE(dev) && !IS_I830(dev);
1028 }
1029
1030 /**
1031  * intel_lvds_init - setup LVDS connectors on this device
1032  * @dev: drm device
1033  *
1034  * Create the connector, register the LVDS DDC bus, and try to figure out what
1035  * modes we can display on the LVDS panel (if present).
1036  */
1037 bool intel_lvds_init(struct drm_device *dev)
1038 {
1039         struct drm_i915_private *dev_priv = dev->dev_private;
1040         struct intel_lvds_encoder *lvds_encoder;
1041         struct intel_encoder *intel_encoder;
1042         struct intel_lvds_connector *lvds_connector;
1043         struct intel_connector *intel_connector;
1044         struct drm_connector *connector;
1045         struct drm_encoder *encoder;
1046         struct drm_display_mode *scan; /* *modes, *bios_mode; */
1047         struct drm_display_mode *fixed_mode = NULL;
1048         struct edid *edid;
1049         struct drm_crtc *crtc;
1050         u32 lvds;
1051         int pipe;
1052         u8 pin;
1053
1054         if (!intel_lvds_supported(dev))
1055                 return false;
1056
1057         /* Skip init on machines we know falsely report LVDS */
1058         if (dmi_check_system(intel_no_lvds))
1059                 return false;
1060
1061         pin = GMBUS_PORT_PANEL;
1062         if (!lvds_is_present_in_vbt(dev, &pin)) {
1063                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1064                 return false;
1065         }
1066
1067         if (HAS_PCH_SPLIT(dev)) {
1068                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
1069                         return false;
1070                 if (dev_priv->edp.support) {
1071                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1072                         return false;
1073                 }
1074         }
1075
1076         lvds_encoder = kzalloc(sizeof(struct intel_lvds_encoder), GFP_KERNEL);
1077         if (!lvds_encoder)
1078                 return false;
1079
1080         lvds_connector = kzalloc(sizeof(struct intel_lvds_connector), GFP_KERNEL);
1081         if (!lvds_connector) {
1082                 kfree(lvds_encoder);
1083                 return false;
1084         }
1085
1086         lvds_encoder->attached_connector = lvds_connector;
1087
1088         if (!HAS_PCH_SPLIT(dev)) {
1089                 lvds_encoder->pfit_control = I915_READ(PFIT_CONTROL);
1090         }
1091
1092         intel_encoder = &lvds_encoder->base;
1093         encoder = &intel_encoder->base;
1094         intel_connector = &lvds_connector->base;
1095         connector = &intel_connector->base;
1096         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1097                            DRM_MODE_CONNECTOR_LVDS);
1098
1099         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1100                          DRM_MODE_ENCODER_LVDS);
1101
1102         intel_encoder->enable = intel_enable_lvds;
1103         intel_encoder->pre_enable = intel_pre_enable_lvds;
1104         intel_encoder->pre_pll_enable = intel_pre_pll_enable_lvds;
1105         intel_encoder->disable = intel_disable_lvds;
1106         intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1107         intel_connector->get_hw_state = intel_connector_get_hw_state;
1108
1109         intel_connector_attach_encoder(intel_connector, intel_encoder);
1110         intel_encoder->type = INTEL_OUTPUT_LVDS;
1111
1112         intel_encoder->cloneable = false;
1113         if (HAS_PCH_SPLIT(dev))
1114                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1115         else if (IS_GEN4(dev))
1116                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1117         else
1118                 intel_encoder->crtc_mask = (1 << 1);
1119
1120         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1121         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1122         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1123         connector->interlace_allowed = false;
1124         connector->doublescan_allowed = false;
1125
1126         if (HAS_PCH_SPLIT(dev)) {
1127                 lvds_encoder->reg = PCH_LVDS;
1128         } else {
1129                 lvds_encoder->reg = LVDS;
1130         }
1131
1132         /* create the scaling mode property */
1133         drm_mode_create_scaling_mode_property(dev);
1134         drm_object_attach_property(&connector->base,
1135                                       dev->mode_config.scaling_mode_property,
1136                                       DRM_MODE_SCALE_ASPECT);
1137         intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1138         /*
1139          * LVDS discovery:
1140          * 1) check for EDID on DDC
1141          * 2) check for VBT data
1142          * 3) check to see if LVDS is already on
1143          *    if none of the above, no panel
1144          * 4) make sure lid is open
1145          *    if closed, act like it's not there for now
1146          */
1147
1148         /*
1149          * Attempt to get the fixed panel mode from DDC.  Assume that the
1150          * preferred mode is the right one.
1151          */
1152         edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1153         if (edid) {
1154                 if (drm_add_edid_modes(connector, edid)) {
1155                         drm_mode_connector_update_edid_property(connector,
1156                                                                 edid);
1157                 } else {
1158                         kfree(edid);
1159                         edid = ERR_PTR(-EINVAL);
1160                 }
1161         } else {
1162                 edid = ERR_PTR(-ENOENT);
1163         }
1164         lvds_connector->base.edid = edid;
1165
1166         if (IS_ERR_OR_NULL(edid)) {
1167                 /* Didn't get an EDID, so
1168                  * Set wide sync ranges so we get all modes
1169                  * handed to valid_mode for checking
1170                  */
1171                 connector->display_info.min_vfreq = 0;
1172                 connector->display_info.max_vfreq = 200;
1173                 connector->display_info.min_hfreq = 0;
1174                 connector->display_info.max_hfreq = 200;
1175         }
1176
1177         list_for_each_entry(scan, &connector->probed_modes, head) {
1178                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1179                         DRM_DEBUG_KMS("using preferred mode from EDID: ");
1180                         drm_mode_debug_printmodeline(scan);
1181
1182                         fixed_mode = drm_mode_duplicate(dev, scan);
1183                         if (fixed_mode) {
1184                                 intel_find_lvds_downclock(dev, fixed_mode,
1185                                                           connector);
1186                                 goto out;
1187                         }
1188                 }
1189         }
1190
1191         /* Failed to get EDID, what about VBT? */
1192         if (dev_priv->lfp_lvds_vbt_mode) {
1193                 DRM_DEBUG_KMS("using mode from VBT: ");
1194                 drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
1195
1196                 fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1197                 if (fixed_mode) {
1198                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1199                         goto out;
1200                 }
1201         }
1202
1203         /*
1204          * If we didn't get EDID, try checking if the panel is already turned
1205          * on.  If so, assume that whatever is currently programmed is the
1206          * correct mode.
1207          */
1208
1209         /* Ironlake: FIXME if still fail, not try pipe mode now */
1210         if (HAS_PCH_SPLIT(dev))
1211                 goto failed;
1212
1213         lvds = I915_READ(LVDS);
1214         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1215         crtc = intel_get_crtc_for_pipe(dev, pipe);
1216
1217         if (crtc && (lvds & LVDS_PORT_EN)) {
1218                 fixed_mode = intel_crtc_mode_get(dev, crtc);
1219                 if (fixed_mode) {
1220                         DRM_DEBUG_KMS("using current (BIOS) mode: ");
1221                         drm_mode_debug_printmodeline(fixed_mode);
1222                         fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1223                         goto out;
1224                 }
1225         }
1226
1227         /* If we still don't have a mode after all that, give up. */
1228         if (!fixed_mode)
1229                 goto failed;
1230
1231 out:
1232         lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1233         DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1234                       lvds_encoder->is_dual_link ? "dual" : "single");
1235
1236         /*
1237          * Unlock registers and just
1238          * leave them unlocked
1239          */
1240         if (HAS_PCH_SPLIT(dev)) {
1241                 I915_WRITE(PCH_PP_CONTROL,
1242                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1243         } else {
1244                 I915_WRITE(PP_CONTROL,
1245                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1246         }
1247         lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1248         if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1249                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1250                 lvds_connector->lid_notifier.notifier_call = NULL;
1251         }
1252         drm_sysfs_connector_add(connector);
1253
1254         intel_panel_init(&intel_connector->panel, fixed_mode);
1255         intel_panel_setup_backlight(connector);
1256
1257         return true;
1258
1259 failed:
1260         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1261         drm_connector_cleanup(connector);
1262         drm_encoder_cleanup(encoder);
1263         if (fixed_mode)
1264                 drm_mode_destroy(dev, fixed_mode);
1265         kfree(lvds_encoder);
1266         kfree(lvds_connector);
1267         return false;
1268 }