include/linux/soc/ixp4xx/cpu.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * IXP4XX cpu type detection
   4  *
   5  * Copyright (C) 2007 MontaVista Software, Inc.
   6  */
   7
   8 #ifndef __SOC_IXP4XX_CPU_H__
   9 #define __SOC_IXP4XX_CPU_H__
  10
  11 #include <linux/io.h>
  12 #ifdef CONFIG_ARM
  13 #include <asm/cputype.h>
  14 #endif
  15
  16 /* Processor id value in CP15 Register 0 */
  17 #define IXP42X_PROCESSOR_ID_VALUE       0x690541c0 /* including unused 0x690541Ex */
  18 #define IXP42X_PROCESSOR_ID_MASK        0xffffffc0
  19
  20 #define IXP43X_PROCESSOR_ID_VALUE       0x69054040
  21 #define IXP43X_PROCESSOR_ID_MASK        0xfffffff0
  22
  23 #define IXP46X_PROCESSOR_ID_VALUE       0x69054200 /* including IXP455 */
  24 #define IXP46X_PROCESSOR_ID_MASK        0xfffffff0
  25
  26 /* "fuse" bits of IXP_EXP_CFG2 */
  27 /* All IXP4xx CPUs */
  28 #define IXP4XX_FEATURE_RCOMP            (1 << 0)
  29 #define IXP4XX_FEATURE_USB_DEVICE       (1 << 1)
  30 #define IXP4XX_FEATURE_HASH             (1 << 2)
  31 #define IXP4XX_FEATURE_AES              (1 << 3)
  32 #define IXP4XX_FEATURE_DES              (1 << 4)
  33 #define IXP4XX_FEATURE_HDLC             (1 << 5)
  34 #define IXP4XX_FEATURE_AAL              (1 << 6)
  35 #define IXP4XX_FEATURE_HSS              (1 << 7)
  36 #define IXP4XX_FEATURE_UTOPIA           (1 << 8)
  37 #define IXP4XX_FEATURE_NPEB_ETH0        (1 << 9)
  38 #define IXP4XX_FEATURE_NPEC_ETH         (1 << 10)
  39 #define IXP4XX_FEATURE_RESET_NPEA       (1 << 11)
  40 #define IXP4XX_FEATURE_RESET_NPEB       (1 << 12)
  41 #define IXP4XX_FEATURE_RESET_NPEC       (1 << 13)
  42 #define IXP4XX_FEATURE_PCI              (1 << 14)
  43 #define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16)
  44 #define IXP4XX_FEATURE_XSCALE_MAX_FREQ  (3 << 22)
  45 #define IXP42X_FEATURE_MASK             (IXP4XX_FEATURE_RCOMP            | \
  46                                          IXP4XX_FEATURE_USB_DEVICE       | \
  47                                          IXP4XX_FEATURE_HASH             | \
  48                                          IXP4XX_FEATURE_AES              | \
  49                                          IXP4XX_FEATURE_DES              | \
  50                                          IXP4XX_FEATURE_HDLC             | \
  51                                          IXP4XX_FEATURE_AAL              | \
  52                                          IXP4XX_FEATURE_HSS              | \
  53                                          IXP4XX_FEATURE_UTOPIA           | \
  54                                          IXP4XX_FEATURE_NPEB_ETH0        | \
  55                                          IXP4XX_FEATURE_NPEC_ETH         | \
  56                                          IXP4XX_FEATURE_RESET_NPEA       | \
  57                                          IXP4XX_FEATURE_RESET_NPEB       | \
  58                                          IXP4XX_FEATURE_RESET_NPEC       | \
  59                                          IXP4XX_FEATURE_PCI              | \
  60                                          IXP4XX_FEATURE_UTOPIA_PHY_LIMIT | \
  61                                          IXP4XX_FEATURE_XSCALE_MAX_FREQ)
  62
  63
  64 /* IXP43x/46x CPUs */
  65 #define IXP4XX_FEATURE_ECC_TIMESYNC     (1 << 15)
  66 #define IXP4XX_FEATURE_USB_HOST         (1 << 18)
  67 #define IXP4XX_FEATURE_NPEA_ETH         (1 << 19)
  68 #define IXP43X_FEATURE_MASK             (IXP42X_FEATURE_MASK             | \
  69                                          IXP4XX_FEATURE_ECC_TIMESYNC     | \
  70                                          IXP4XX_FEATURE_USB_HOST         | \
  71                                          IXP4XX_FEATURE_NPEA_ETH)
  72
  73 /* IXP46x CPU (including IXP455) only */
  74 #define IXP4XX_FEATURE_NPEB_ETH_1_TO_3  (1 << 20)
  75 #define IXP4XX_FEATURE_RSA              (1 << 21)
  76 #define IXP46X_FEATURE_MASK             (IXP43X_FEATURE_MASK             | \
  77                                          IXP4XX_FEATURE_NPEB_ETH_1_TO_3  | \
  78                                          IXP4XX_FEATURE_RSA)
  79
  80 #ifdef CONFIG_ARCH_IXP4XX
  81 #define cpu_is_ixp42x_rev_a0() ((read_cpuid_id() & (IXP42X_PROCESSOR_ID_MASK | 0xF)) == \
  82                                 IXP42X_PROCESSOR_ID_VALUE)
  83 #define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \
  84                          IXP42X_PROCESSOR_ID_VALUE)
  85 #define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \
  86                          IXP43X_PROCESSOR_ID_VALUE)
  87 #define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \
  88                          IXP46X_PROCESSOR_ID_VALUE)
  89
  90 u32 ixp4xx_read_feature_bits(void);
  91 void ixp4xx_write_feature_bits(u32 value);
  92 #else
  93 #define cpu_is_ixp42x_rev_a0()          0
  94 #define cpu_is_ixp42x()                 0
  95 #define cpu_is_ixp43x()                 0
  96 #define cpu_is_ixp46x()                 0
  97 static inline u32 ixp4xx_read_feature_bits(void)
  98 {
  99         return 0;
 100 }
 101 static inline void ixp4xx_write_feature_bits(u32 value)
 102 {
 103 }
 104 #endif
 105
 106 #endif  /* _ASM_ARCH_CPU_H */