2 * NCI based driver for Samsung S3FWRN5 NFC chip
4 * Copyright (C) 2015 Samsung Electrnoics
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2 or later, as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 #include <linux/completion.h>
21 #include <linux/firmware.h>
22 #include <crypto/hash.h>
23 #include <crypto/sha.h>
28 struct s3fwrn5_fw_version {
35 static int s3fwrn5_fw_send_msg(struct s3fwrn5_fw_info *fw_info,
36 struct sk_buff *msg, struct sk_buff **rsp)
38 struct s3fwrn5_info *info =
39 container_of(fw_info, struct s3fwrn5_info, fw_info);
42 reinit_completion(&fw_info->completion);
44 ret = s3fwrn5_write(info, msg);
48 ret = wait_for_completion_interruptible_timeout(
49 &fw_info->completion, msecs_to_jiffies(1000));
64 static int s3fwrn5_fw_prep_msg(struct s3fwrn5_fw_info *fw_info,
65 struct sk_buff **msg, u8 type, u8 code, const void *data, u16 len)
67 struct s3fwrn5_fw_header hdr;
70 hdr.type = type | fw_info->parity;
71 fw_info->parity ^= 0x80;
75 skb = alloc_skb(S3FWRN5_FW_HDR_SIZE + len, GFP_KERNEL);
79 skb_put_data(skb, &hdr, S3FWRN5_FW_HDR_SIZE);
81 skb_put_data(skb, data, len);
88 static int s3fwrn5_fw_get_bootinfo(struct s3fwrn5_fw_info *fw_info,
89 struct s3fwrn5_fw_cmd_get_bootinfo_rsp *bootinfo)
91 struct sk_buff *msg, *rsp = NULL;
92 struct s3fwrn5_fw_header *hdr;
95 /* Send GET_BOOTINFO command */
97 ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
98 S3FWRN5_FW_CMD_GET_BOOTINFO, NULL, 0);
102 ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
107 hdr = (struct s3fwrn5_fw_header *) rsp->data;
108 if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
113 memcpy(bootinfo, rsp->data + S3FWRN5_FW_HDR_SIZE, 10);
120 static int s3fwrn5_fw_enter_update_mode(struct s3fwrn5_fw_info *fw_info,
121 const void *hash_data, u16 hash_size,
122 const void *sig_data, u16 sig_size)
124 struct s3fwrn5_fw_cmd_enter_updatemode args;
125 struct sk_buff *msg, *rsp = NULL;
126 struct s3fwrn5_fw_header *hdr;
129 /* Send ENTER_UPDATE_MODE command */
131 args.hashcode_size = hash_size;
132 args.signature_size = sig_size;
134 ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
135 S3FWRN5_FW_CMD_ENTER_UPDATE_MODE, &args, sizeof(args));
139 ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
144 hdr = (struct s3fwrn5_fw_header *) rsp->data;
145 if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
152 /* Send hashcode data */
154 ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_DATA, 0,
155 hash_data, hash_size);
159 ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
164 hdr = (struct s3fwrn5_fw_header *) rsp->data;
165 if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
172 /* Send signature data */
174 ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_DATA, 0,
179 ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
184 hdr = (struct s3fwrn5_fw_header *) rsp->data;
185 if (hdr->code != S3FWRN5_FW_RET_SUCCESS)
193 static int s3fwrn5_fw_update_sector(struct s3fwrn5_fw_info *fw_info,
194 u32 base_addr, const void *data)
196 struct s3fwrn5_fw_cmd_update_sector args;
197 struct sk_buff *msg, *rsp = NULL;
198 struct s3fwrn5_fw_header *hdr;
201 /* Send UPDATE_SECTOR command */
203 args.base_address = base_addr;
205 ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
206 S3FWRN5_FW_CMD_UPDATE_SECTOR, &args, sizeof(args));
210 ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
215 hdr = (struct s3fwrn5_fw_header *) rsp->data;
216 if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
223 /* Send data split into 256-byte packets */
225 for (i = 0; i < 16; ++i) {
226 ret = s3fwrn5_fw_prep_msg(fw_info, &msg,
227 S3FWRN5_FW_MSG_DATA, 0, data+256*i, 256);
231 ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
236 hdr = (struct s3fwrn5_fw_header *) rsp->data;
237 if (hdr->code != S3FWRN5_FW_RET_SUCCESS) {
252 static int s3fwrn5_fw_complete_update_mode(struct s3fwrn5_fw_info *fw_info)
254 struct sk_buff *msg, *rsp = NULL;
255 struct s3fwrn5_fw_header *hdr;
258 /* Send COMPLETE_UPDATE_MODE command */
260 ret = s3fwrn5_fw_prep_msg(fw_info, &msg, S3FWRN5_FW_MSG_CMD,
261 S3FWRN5_FW_CMD_COMPLETE_UPDATE_MODE, NULL, 0);
265 ret = s3fwrn5_fw_send_msg(fw_info, msg, &rsp);
270 hdr = (struct s3fwrn5_fw_header *) rsp->data;
271 if (hdr->code != S3FWRN5_FW_RET_SUCCESS)
280 * Firmware header stucture:
282 * 0x00 - 0x0B : Date and time string (w/o NUL termination)
283 * 0x10 - 0x13 : Firmware version
284 * 0x14 - 0x17 : Signature address
285 * 0x18 - 0x1B : Signature size
286 * 0x1C - 0x1F : Firmware image address
287 * 0x20 - 0x23 : Firmware sectors count
288 * 0x24 - 0x27 : Custom signature address
289 * 0x28 - 0x2B : Custom signature size
292 #define S3FWRN5_FW_IMAGE_HEADER_SIZE 44
294 static int s3fwrn5_fw_request_firmware(struct s3fwrn5_fw_info *fw_info)
296 struct s3fwrn5_fw_image *fw = &fw_info->fw;
302 ret = request_firmware(&fw->fw, fw_info->fw_name,
303 &fw_info->ndev->nfc_dev->dev);
307 if (fw->fw->size < S3FWRN5_FW_IMAGE_HEADER_SIZE)
310 memcpy(fw->date, fw->fw->data + 0x00, 12);
313 memcpy(&fw->version, fw->fw->data + 0x10, 4);
315 memcpy(&sig_off, fw->fw->data + 0x14, 4);
316 fw->sig = fw->fw->data + sig_off;
317 memcpy(&fw->sig_size, fw->fw->data + 0x18, 4);
319 memcpy(&image_off, fw->fw->data + 0x1C, 4);
320 fw->image = fw->fw->data + image_off;
321 memcpy(&fw->image_sectors, fw->fw->data + 0x20, 4);
323 memcpy(&custom_sig_off, fw->fw->data + 0x24, 4);
324 fw->custom_sig = fw->fw->data + custom_sig_off;
325 memcpy(&fw->custom_sig_size, fw->fw->data + 0x28, 4);
330 static void s3fwrn5_fw_release_firmware(struct s3fwrn5_fw_info *fw_info)
332 release_firmware(fw_info->fw.fw);
335 static int s3fwrn5_fw_get_base_addr(
336 struct s3fwrn5_fw_cmd_get_bootinfo_rsp *bootinfo, u32 *base_addr)
339 static const struct {
343 {{0x05, 0x00, 0x00, 0x00}, 0x00005000},
344 {{0x05, 0x00, 0x00, 0x01}, 0x00003000},
345 {{0x05, 0x00, 0x00, 0x02}, 0x00003000},
346 {{0x05, 0x00, 0x00, 0x03}, 0x00003000},
347 {{0x05, 0x00, 0x00, 0x05}, 0x00003000}
350 for (i = 0; i < ARRAY_SIZE(match); ++i)
351 if (bootinfo->hw_version[0] == match[i].version[0] &&
352 bootinfo->hw_version[1] == match[i].version[1] &&
353 bootinfo->hw_version[3] == match[i].version[3]) {
354 *base_addr = match[i].base_addr;
362 s3fwrn5_fw_is_custom(struct s3fwrn5_fw_cmd_get_bootinfo_rsp *bootinfo)
364 return !!bootinfo->hw_version[2];
367 int s3fwrn5_fw_setup(struct s3fwrn5_fw_info *fw_info)
369 struct s3fwrn5_fw_cmd_get_bootinfo_rsp bootinfo;
372 /* Get firmware data */
374 ret = s3fwrn5_fw_request_firmware(fw_info);
376 dev_err(&fw_info->ndev->nfc_dev->dev,
377 "Failed to get fw file, ret=%02x\n", ret);
381 /* Get bootloader info */
383 ret = s3fwrn5_fw_get_bootinfo(fw_info, &bootinfo);
385 dev_err(&fw_info->ndev->nfc_dev->dev,
386 "Failed to get bootinfo, ret=%02x\n", ret);
390 /* Match hardware version to obtain firmware base address */
392 ret = s3fwrn5_fw_get_base_addr(&bootinfo, &fw_info->base_addr);
394 dev_err(&fw_info->ndev->nfc_dev->dev,
395 "Unknown hardware version\n");
399 fw_info->sector_size = bootinfo.sector_size;
401 fw_info->sig_size = s3fwrn5_fw_is_custom(&bootinfo) ?
402 fw_info->fw.custom_sig_size : fw_info->fw.sig_size;
403 fw_info->sig = s3fwrn5_fw_is_custom(&bootinfo) ?
404 fw_info->fw.custom_sig : fw_info->fw.sig;
409 s3fwrn5_fw_release_firmware(fw_info);
413 bool s3fwrn5_fw_check_version(struct s3fwrn5_fw_info *fw_info, u32 version)
415 struct s3fwrn5_fw_version *new = (void *) &fw_info->fw.version;
416 struct s3fwrn5_fw_version *old = (void *) &version;
418 if (new->major > old->major)
420 if (new->build1 > old->build1)
422 if (new->build2 > old->build2)
428 int s3fwrn5_fw_download(struct s3fwrn5_fw_info *fw_info)
430 struct s3fwrn5_fw_image *fw = &fw_info->fw;
431 u8 hash_data[SHA1_DIGEST_SIZE];
432 struct crypto_shash *tfm;
436 image_size = fw_info->sector_size * fw->image_sectors;
438 /* Compute SHA of firmware data */
440 tfm = crypto_alloc_shash("sha1", 0, 0);
443 dev_err(&fw_info->ndev->nfc_dev->dev,
444 "Cannot allocate shash (code=%d)\n", ret);
449 SHASH_DESC_ON_STACK(desc, tfm);
452 desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;
454 ret = crypto_shash_digest(desc, fw->image, image_size,
456 shash_desc_zero(desc);
459 crypto_free_shash(tfm);
461 dev_err(&fw_info->ndev->nfc_dev->dev,
462 "Cannot compute hash (code=%d)\n", ret);
466 /* Firmware update process */
468 dev_info(&fw_info->ndev->nfc_dev->dev,
469 "Firmware update: %s\n", fw_info->fw_name);
471 ret = s3fwrn5_fw_enter_update_mode(fw_info, hash_data,
472 SHA1_DIGEST_SIZE, fw_info->sig, fw_info->sig_size);
474 dev_err(&fw_info->ndev->nfc_dev->dev,
475 "Unable to enter update mode\n");
479 for (off = 0; off < image_size; off += fw_info->sector_size) {
480 ret = s3fwrn5_fw_update_sector(fw_info,
481 fw_info->base_addr + off, fw->image + off);
483 dev_err(&fw_info->ndev->nfc_dev->dev,
484 "Firmware update error (code=%d)\n", ret);
489 ret = s3fwrn5_fw_complete_update_mode(fw_info);
491 dev_err(&fw_info->ndev->nfc_dev->dev,
492 "Unable to complete update mode\n");
496 dev_info(&fw_info->ndev->nfc_dev->dev,
497 "Firmware update: success\n");
503 void s3fwrn5_fw_init(struct s3fwrn5_fw_info *fw_info, const char *fw_name)
505 fw_info->parity = 0x00;
507 fw_info->fw.fw = NULL;
508 strcpy(fw_info->fw_name, fw_name);
509 init_completion(&fw_info->completion);
512 void s3fwrn5_fw_cleanup(struct s3fwrn5_fw_info *fw_info)
514 s3fwrn5_fw_release_firmware(fw_info);
517 int s3fwrn5_fw_recv_frame(struct nci_dev *ndev, struct sk_buff *skb)
519 struct s3fwrn5_info *info = nci_get_drvdata(ndev);
520 struct s3fwrn5_fw_info *fw_info = &info->fw_info;
522 BUG_ON(fw_info->rsp);
526 complete(&fw_info->completion);