drivers/soc/imx/gpcv2.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2017 Impinj, Inc
   4  * Author: Andrey Smirnov <[email protected]>
   5  *
   6  * Based on the code of analogus driver:
   7  *
   8  * Copyright 2015-2017 Pengutronix, Lucas Stach <[email protected]>
   9  */
  10
  11 #include <linux/of_device.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/pm_domain.h>
  14 #include <linux/regmap.h>
  15 #include <linux/regulator/consumer.h>
  16 #include <dt-bindings/power/imx7-power.h>
  17
  18 #define GPC_LPCR_A_CORE_BSC                     0x000
  19
  20 #define GPC_PGC_CPU_MAPPING             0x0ec
  21 #define USB_HSIC_PHY_A_CORE_DOMAIN              BIT(6)
  22 #define USB_OTG2_PHY_A_CORE_DOMAIN              BIT(5)
  23 #define USB_OTG1_PHY_A_CORE_DOMAIN              BIT(4)
  24 #define PCIE_PHY_A_CORE_DOMAIN          BIT(3)
  25 #define MIPI_PHY_A_CORE_DOMAIN          BIT(2)
  26
  27 #define GPC_PU_PGC_SW_PUP_REQ           0x0f8
  28 #define GPC_PU_PGC_SW_PDN_REQ           0x104
  29 #define USB_HSIC_PHY_SW_Pxx_REQ         BIT(4)
  30 #define USB_OTG2_PHY_SW_Pxx_REQ         BIT(3)
  31 #define USB_OTG1_PHY_SW_Pxx_REQ         BIT(2)
  32 #define PCIE_PHY_SW_Pxx_REQ             BIT(1)
  33 #define MIPI_PHY_SW_Pxx_REQ             BIT(0)
  34
  35 #define GPC_M4_PU_PDN_FLG               0x1bc
  36
  37 /*
  38  * The PGC offset values in Reference Manual
  39  * (Rev. 1, 01/2018 and the older ones) GPC chapter's
  40  * GPC_PGC memory map are incorrect, below offset
  41  * values are from design RTL.
  42  */
  43 #define PGC_MIPI                        16
  44 #define PGC_PCIE                        17
  45 #define PGC_USB_HSIC                    20
  46 #define GPC_PGC_CTRL(n)                 (0x800 + (n) * 0x40)
  47 #define GPC_PGC_SR(n)                   (GPC_PGC_CTRL(n) + 0xc)
  48
  49 #define GPC_PGC_CTRL_PCR                BIT(0)
  50
  51 struct imx_pgc_domain {
  52         struct generic_pm_domain genpd;
  53         struct regmap *regmap;
  54         struct regulator *regulator;
  55
  56         unsigned int pgc;
  57
  58         const struct {
  59                 u32 pxx;
  60                 u32 map;
  61         } bits;
  62
  63         const int voltage;
  64         struct device *dev;
  65 };
  66
  67 struct imx_pgc_domain_data {
  68         const struct imx_pgc_domain *domains;
  69         size_t domains_num;
  70 };
  71
  72 static int imx_gpc_pu_pgc_sw_pxx_req(struct generic_pm_domain *genpd,
  73                                       bool on)
  74 {
  75         struct imx_pgc_domain *domain = container_of(genpd,
  76                                                       struct imx_pgc_domain,
  77                                                       genpd);
  78         unsigned int offset = on ?
  79                 GPC_PU_PGC_SW_PUP_REQ : GPC_PU_PGC_SW_PDN_REQ;
  80         const bool enable_power_control = !on;
  81         const bool has_regulator = !IS_ERR(domain->regulator);
  82         unsigned long deadline;
  83         int ret = 0;
  84
  85         regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
  86                            domain->bits.map, domain->bits.map);
  87
  88         if (has_regulator && on) {
  89                 ret = regulator_enable(domain->regulator);
  90                 if (ret) {
  91                         dev_err(domain->dev, "failed to enable regulator\n");
  92                         goto unmap;
  93                 }
  94         }
  95
  96         if (enable_power_control)
  97                 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
  98                                    GPC_PGC_CTRL_PCR, GPC_PGC_CTRL_PCR);
  99
 100         regmap_update_bits(domain->regmap, offset,
 101                            domain->bits.pxx, domain->bits.pxx);
 102
 103         /*
 104          * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait
 105          * for PUP_REQ/PDN_REQ bit to be cleared
 106          */
 107         deadline = jiffies + msecs_to_jiffies(1);
 108         while (true) {
 109                 u32 pxx_req;
 110
 111                 regmap_read(domain->regmap, offset, &pxx_req);
 112
 113                 if (!(pxx_req & domain->bits.pxx))
 114                         break;
 115
 116                 if (time_after(jiffies, deadline)) {
 117                         dev_err(domain->dev, "falied to command PGC\n");
 118                         ret = -ETIMEDOUT;
 119                         /*
 120                          * If we were in a process of enabling a
 121                          * domain and failed we might as well disable
 122                          * the regulator we just enabled. And if it
 123                          * was the opposite situation and we failed to
 124                          * power down -- keep the regulator on
 125                          */
 126                         on = !on;
 127                         break;
 128                 }
 129
 130                 cpu_relax();
 131         }
 132
 133         if (enable_power_control)
 134                 regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
 135                                    GPC_PGC_CTRL_PCR, 0);
 136
 137         if (has_regulator && !on) {
 138                 int err;
 139
 140                 err = regulator_disable(domain->regulator);
 141                 if (err)
 142                         dev_err(domain->dev,
 143                                 "failed to disable regulator: %d\n", ret);
 144                 /* Preserve earlier error code */
 145                 ret = ret ?: err;
 146         }
 147 unmap:
 148         regmap_update_bits(domain->regmap, GPC_PGC_CPU_MAPPING,
 149                            domain->bits.map, 0);
 150         return ret;
 151 }
 152
 153 static int imx_gpc_pu_pgc_sw_pup_req(struct generic_pm_domain *genpd)
 154 {
 155         return imx_gpc_pu_pgc_sw_pxx_req(genpd, true);
 156 }
 157
 158 static int imx_gpc_pu_pgc_sw_pdn_req(struct generic_pm_domain *genpd)
 159 {
 160         return imx_gpc_pu_pgc_sw_pxx_req(genpd, false);
 161 }
 162
 163 static const struct imx_pgc_domain imx7_pgc_domains[] = {
 164         [IMX7_POWER_DOMAIN_MIPI_PHY] = {
 165                 .genpd = {
 166                         .name      = "mipi-phy",
 167                 },
 168                 .bits  = {
 169                         .pxx = MIPI_PHY_SW_Pxx_REQ,
 170                         .map = MIPI_PHY_A_CORE_DOMAIN,
 171                 },
 172                 .voltage   = 1000000,
 173                 .pgc       = PGC_MIPI,
 174         },
 175
 176         [IMX7_POWER_DOMAIN_PCIE_PHY] = {
 177                 .genpd = {
 178                         .name      = "pcie-phy",
 179                 },
 180                 .bits  = {
 181                         .pxx = PCIE_PHY_SW_Pxx_REQ,
 182                         .map = PCIE_PHY_A_CORE_DOMAIN,
 183                 },
 184                 .voltage   = 1000000,
 185                 .pgc       = PGC_PCIE,
 186         },
 187
 188         [IMX7_POWER_DOMAIN_USB_HSIC_PHY] = {
 189                 .genpd = {
 190                         .name      = "usb-hsic-phy",
 191                 },
 192                 .bits  = {
 193                         .pxx = USB_HSIC_PHY_SW_Pxx_REQ,
 194                         .map = USB_HSIC_PHY_A_CORE_DOMAIN,
 195                 },
 196                 .voltage   = 1200000,
 197                 .pgc       = PGC_USB_HSIC,
 198         },
 199 };
 200
 201 static const struct imx_pgc_domain_data imx7_pgc_domain_data = {
 202         .domains = imx7_pgc_domains,
 203         .domains_num = ARRAY_SIZE(imx7_pgc_domains),
 204 };
 205
 206 static int imx_pgc_domain_probe(struct platform_device *pdev)
 207 {
 208         struct imx_pgc_domain *domain = pdev->dev.platform_data;
 209         int ret;
 210
 211         domain->dev = &pdev->dev;
 212
 213         domain->regulator = devm_regulator_get_optional(domain->dev, "power");
 214         if (IS_ERR(domain->regulator)) {
 215                 if (PTR_ERR(domain->regulator) != -ENODEV) {
 216                         if (PTR_ERR(domain->regulator) != -EPROBE_DEFER)
 217                                 dev_err(domain->dev, "Failed to get domain's regulator\n");
 218                         return PTR_ERR(domain->regulator);
 219                 }
 220         } else {
 221                 regulator_set_voltage(domain->regulator,
 222                                       domain->voltage, domain->voltage);
 223         }
 224
 225         ret = pm_genpd_init(&domain->genpd, NULL, true);
 226         if (ret) {
 227                 dev_err(domain->dev, "Failed to init power domain\n");
 228                 return ret;
 229         }
 230
 231         ret = of_genpd_add_provider_simple(domain->dev->of_node,
 232                                            &domain->genpd);
 233         if (ret) {
 234                 dev_err(domain->dev, "Failed to add genpd provider\n");
 235                 pm_genpd_remove(&domain->genpd);
 236         }
 237
 238         return ret;
 239 }
 240
 241 static int imx_pgc_domain_remove(struct platform_device *pdev)
 242 {
 243         struct imx_pgc_domain *domain = pdev->dev.platform_data;
 244
 245         of_genpd_del_provider(domain->dev->of_node);
 246         pm_genpd_remove(&domain->genpd);
 247
 248         return 0;
 249 }
 250
 251 static const struct platform_device_id imx_pgc_domain_id[] = {
 252         { "imx-pgc-domain", },
 253         { },
 254 };
 255
 256 static struct platform_driver imx_pgc_domain_driver = {
 257         .driver = {
 258                 .name = "imx-pgc",
 259         },
 260         .probe    = imx_pgc_domain_probe,
 261         .remove   = imx_pgc_domain_remove,
 262         .id_table = imx_pgc_domain_id,
 263 };
 264 builtin_platform_driver(imx_pgc_domain_driver)
 265
 266 static int imx_gpcv2_probe(struct platform_device *pdev)
 267 {
 268         static const struct imx_pgc_domain_data *domain_data;
 269         static const struct regmap_range yes_ranges[] = {
 270                 regmap_reg_range(GPC_LPCR_A_CORE_BSC,
 271                                  GPC_M4_PU_PDN_FLG),
 272                 regmap_reg_range(GPC_PGC_CTRL(PGC_MIPI),
 273                                  GPC_PGC_SR(PGC_MIPI)),
 274                 regmap_reg_range(GPC_PGC_CTRL(PGC_PCIE),
 275                                  GPC_PGC_SR(PGC_PCIE)),
 276                 regmap_reg_range(GPC_PGC_CTRL(PGC_USB_HSIC),
 277                                  GPC_PGC_SR(PGC_USB_HSIC)),
 278         };
 279         static const struct regmap_access_table access_table = {
 280                 .yes_ranges     = yes_ranges,
 281                 .n_yes_ranges   = ARRAY_SIZE(yes_ranges),
 282         };
 283         static const struct regmap_config regmap_config = {
 284                 .reg_bits       = 32,
 285                 .val_bits       = 32,
 286                 .reg_stride     = 4,
 287                 .rd_table       = &access_table,
 288                 .wr_table       = &access_table,
 289                 .max_register   = SZ_4K,
 290         };
 291         struct device *dev = &pdev->dev;
 292         struct device_node *pgc_np, *np;
 293         struct regmap *regmap;
 294         struct resource *res;
 295         void __iomem *base;
 296         int ret;
 297
 298         pgc_np = of_get_child_by_name(dev->of_node, "pgc");
 299         if (!pgc_np) {
 300                 dev_err(dev, "No power domains specified in DT\n");
 301                 return -EINVAL;
 302         }
 303
 304         res  = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 305         base = devm_ioremap_resource(dev, res);
 306         if (IS_ERR(base))
 307                 return PTR_ERR(base);
 308
 309         regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
 310         if (IS_ERR(regmap)) {
 311                 ret = PTR_ERR(regmap);
 312                 dev_err(dev, "failed to init regmap (%d)\n", ret);
 313                 return ret;
 314         }
 315
 316         domain_data = of_device_get_match_data(&pdev->dev);
 317
 318         for_each_child_of_node(pgc_np, np) {
 319                 struct platform_device *pd_pdev;
 320                 struct imx_pgc_domain *domain;
 321                 u32 domain_index;
 322
 323                 ret = of_property_read_u32(np, "reg", &domain_index);
 324                 if (ret) {
 325                         dev_err(dev, "Failed to read 'reg' property\n");
 326                         of_node_put(np);
 327                         return ret;
 328                 }
 329
 330                 if (domain_index >= domain_data->domains_num) {
 331                         dev_warn(dev,
 332                                  "Domain index %d is out of bounds\n",
 333                                  domain_index);
 334                         continue;
 335                 }
 336
 337                 pd_pdev = platform_device_alloc("imx-pgc-domain",
 338                                                 domain_index);
 339                 if (!pd_pdev) {
 340                         dev_err(dev, "Failed to allocate platform device\n");
 341                         of_node_put(np);
 342                         return -ENOMEM;
 343                 }
 344
 345                 ret = platform_device_add_data(pd_pdev,
 346                                                &domain_data->domains[domain_index],
 347                                                sizeof(domain_data->domains[domain_index]));
 348                 if (ret) {
 349                         platform_device_put(pd_pdev);
 350                         of_node_put(np);
 351                         return ret;
 352                 }
 353
 354                 domain = pd_pdev->dev.platform_data;
 355                 domain->regmap = regmap;
 356                 domain->genpd.power_on  = imx_gpc_pu_pgc_sw_pup_req;
 357                 domain->genpd.power_off = imx_gpc_pu_pgc_sw_pdn_req;
 358
 359                 pd_pdev->dev.parent = dev;
 360                 pd_pdev->dev.of_node = np;
 361
 362                 ret = platform_device_add(pd_pdev);
 363                 if (ret) {
 364                         platform_device_put(pd_pdev);
 365                         of_node_put(np);
 366                         return ret;
 367                 }
 368         }
 369
 370         return 0;
 371 }
 372
 373 static const struct of_device_id imx_gpcv2_dt_ids[] = {
 374         { .compatible = "fsl,imx7d-gpc", .data = &imx7_pgc_domain_data, },
 375         { }
 376 };
 377
 378 static struct platform_driver imx_gpc_driver = {
 379         .driver = {
 380                 .name = "imx-gpcv2",
 381                 .of_match_table = imx_gpcv2_dt_ids,
 382         },
 383         .probe = imx_gpcv2_probe,
 384 };
 385 builtin_platform_driver(imx_gpc_driver)