2 * Copyright (c) 2013 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/spinlock.h>
36 #include <linux/pci.h>
38 #include <linux/delay.h>
39 #include <linux/netdevice.h>
40 #include <linux/vmalloc.h>
41 #include <linux/module.h>
42 #include <linux/prefetch.h>
47 * The size has to be longer than this string, so we can append
48 * board/chip information to it in the init code.
50 const char ib_qib_version[] = QIB_DRIVER_VERSION "\n";
52 DEFINE_SPINLOCK(qib_devs_lock);
53 LIST_HEAD(qib_dev_list);
54 DEFINE_MUTEX(qib_mutex); /* general driver use */
57 module_param_named(ibmtu, qib_ibmtu, uint, S_IRUGO);
58 MODULE_PARM_DESC(ibmtu, "Set max IB MTU (0=2KB, 1=256, 2=512, ... 5=4096");
60 unsigned qib_compat_ddr_negotiate = 1;
61 module_param_named(compat_ddr_negotiate, qib_compat_ddr_negotiate, uint,
63 MODULE_PARM_DESC(compat_ddr_negotiate,
64 "Attempt pre-IBTA 1.2 DDR speed negotiation");
66 MODULE_LICENSE("Dual BSD/GPL");
68 MODULE_DESCRIPTION("Intel IB driver");
71 * QIB_PIO_MAXIBHDR is the max IB header size allowed for in our
72 * PIO send buffers. This is well beyond anything currently
73 * defined in the InfiniBand spec.
75 #define QIB_PIO_MAXIBHDR 128
78 * QIB_MAX_PKT_RCV is the max # if packets processed per receive interrupt.
80 #define QIB_MAX_PKT_RECV 64
82 struct qlogic_ib_stats qib_stats;
84 struct pci_dev *qib_get_pci_dev(struct rvt_dev_info *rdi)
86 struct qib_ibdev *ibdev = container_of(rdi, struct qib_ibdev, rdi);
87 struct qib_devdata *dd = container_of(ibdev,
88 struct qib_devdata, verbs_dev);
93 * Return count of units with at least one port ACTIVE.
95 int qib_count_active_units(void)
97 struct qib_devdata *dd;
98 struct qib_pportdata *ppd;
100 int pidx, nunits_active = 0;
102 spin_lock_irqsave(&qib_devs_lock, flags);
103 list_for_each_entry(dd, &qib_dev_list, list) {
104 if (!(dd->flags & QIB_PRESENT) || !dd->kregbase)
106 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
107 ppd = dd->pport + pidx;
108 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
109 QIBL_LINKARMED | QIBL_LINKACTIVE))) {
115 spin_unlock_irqrestore(&qib_devs_lock, flags);
116 return nunits_active;
120 * Return count of all units, optionally return in arguments
121 * the number of usable (present) units, and the number of
124 int qib_count_units(int *npresentp, int *nupp)
126 int nunits = 0, npresent = 0, nup = 0;
127 struct qib_devdata *dd;
130 struct qib_pportdata *ppd;
132 spin_lock_irqsave(&qib_devs_lock, flags);
134 list_for_each_entry(dd, &qib_dev_list, list) {
136 if ((dd->flags & QIB_PRESENT) && dd->kregbase)
138 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
139 ppd = dd->pport + pidx;
140 if (ppd->lid && (ppd->lflags & (QIBL_LINKINIT |
141 QIBL_LINKARMED | QIBL_LINKACTIVE)))
146 spin_unlock_irqrestore(&qib_devs_lock, flags);
149 *npresentp = npresent;
157 * qib_wait_linkstate - wait for an IB link state change to occur
158 * @dd: the qlogic_ib device
159 * @state: the state to wait for
160 * @msecs: the number of milliseconds to wait
162 * wait up to msecs milliseconds for IB link state change to occur for
163 * now, take the easy polling route. Currently used only by
164 * qib_set_linkstate. Returns 0 if state reached, otherwise
165 * -ETIMEDOUT state can have multiple states set, for any of several
168 int qib_wait_linkstate(struct qib_pportdata *ppd, u32 state, int msecs)
173 spin_lock_irqsave(&ppd->lflags_lock, flags);
174 if (ppd->state_wanted) {
175 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
179 ppd->state_wanted = state;
180 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
181 wait_event_interruptible_timeout(ppd->state_wait,
182 (ppd->lflags & state),
183 msecs_to_jiffies(msecs));
184 spin_lock_irqsave(&ppd->lflags_lock, flags);
185 ppd->state_wanted = 0;
186 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
188 if (!(ppd->lflags & state))
196 int qib_set_linkstate(struct qib_pportdata *ppd, u8 newstate)
200 struct qib_devdata *dd = ppd->dd;
204 case QIB_IB_LINKDOWN_ONLY:
205 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
206 IB_LINKCMD_DOWN | IB_LINKINITCMD_NOP);
211 case QIB_IB_LINKDOWN:
212 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
213 IB_LINKCMD_DOWN | IB_LINKINITCMD_POLL);
218 case QIB_IB_LINKDOWN_SLEEP:
219 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
220 IB_LINKCMD_DOWN | IB_LINKINITCMD_SLEEP);
225 case QIB_IB_LINKDOWN_DISABLE:
226 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
227 IB_LINKCMD_DOWN | IB_LINKINITCMD_DISABLE);
233 if (ppd->lflags & QIBL_LINKARMED) {
237 if (!(ppd->lflags & (QIBL_LINKINIT | QIBL_LINKACTIVE))) {
242 * Since the port can be ACTIVE when we ask for ARMED,
243 * clear QIBL_LINKV so we can wait for a transition.
244 * If the link isn't ARMED, then something else happened
245 * and there is no point waiting for ARMED.
247 spin_lock_irqsave(&ppd->lflags_lock, flags);
248 ppd->lflags &= ~QIBL_LINKV;
249 spin_unlock_irqrestore(&ppd->lflags_lock, flags);
250 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
251 IB_LINKCMD_ARMED | IB_LINKINITCMD_NOP);
255 case QIB_IB_LINKACTIVE:
256 if (ppd->lflags & QIBL_LINKACTIVE) {
260 if (!(ppd->lflags & QIBL_LINKARMED)) {
264 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LSTATE,
265 IB_LINKCMD_ACTIVE | IB_LINKINITCMD_NOP);
266 lstate = QIBL_LINKACTIVE;
273 ret = qib_wait_linkstate(ppd, lstate, 10);
280 * Get address of eager buffer from it's index (allocated in chunks, not
283 static inline void *qib_get_egrbuf(const struct qib_ctxtdata *rcd, u32 etail)
285 const u32 chunk = etail >> rcd->rcvegrbufs_perchunk_shift;
286 const u32 idx = etail & ((u32)rcd->rcvegrbufs_perchunk - 1);
288 return rcd->rcvegrbuf[chunk] + (idx << rcd->dd->rcvegrbufsize_shift);
292 * Returns 1 if error was a CRC, else 0.
293 * Needed for some chip's synthesized error counters.
295 static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
296 u32 ctxt, u32 eflags, u32 l, u32 etail,
297 __le32 *rhf_addr, struct qib_message_header *rhdr)
301 if (eflags & (QLOGIC_IB_RHF_H_ICRCERR | QLOGIC_IB_RHF_H_VCRCERR))
303 else if (eflags == QLOGIC_IB_RHF_H_TIDERR) {
304 /* For TIDERR and RC QPs premptively schedule a NAK */
305 struct ib_header *hdr = (struct ib_header *)rhdr;
306 struct ib_other_headers *ohdr = NULL;
307 struct qib_ibport *ibp = &ppd->ibport_data;
308 struct qib_devdata *dd = ppd->dd;
309 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
310 struct rvt_qp *qp = NULL;
311 u32 tlen = qib_hdrget_length_in_bytes(rhf_addr);
312 u16 lid = be16_to_cpu(hdr->lrh[1]);
313 int lnh = be16_to_cpu(hdr->lrh[0]) & 3;
319 /* Sanity check packet */
323 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
324 lid &= ~((1 << ppd->lmc) - 1);
325 if (unlikely(lid != ppd->lid))
330 if (lnh == QIB_LRH_BTH)
332 else if (lnh == QIB_LRH_GRH) {
335 ohdr = &hdr->u.l.oth;
336 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
338 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
339 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
344 /* Get opcode and PSN from packet */
345 opcode = be32_to_cpu(ohdr->bth[0]);
347 psn = be32_to_cpu(ohdr->bth[2]);
349 /* Get the destination QP number. */
350 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
351 if (qp_num != QIB_MULTICAST_QPN) {
355 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
362 * Handle only RC QPs - for other QP types drop error
365 spin_lock(&qp->r_lock);
367 /* Check for valid receive state. */
368 if (!(ib_rvt_state_ops[qp->state] &
369 RVT_PROCESS_RECV_OK)) {
370 ibp->rvp.n_pkt_drops++;
374 switch (qp->ibqp.qp_type) {
381 be32_to_cpu(ohdr->bth[0]));
385 /* Only deal with RDMA Writes for now */
387 IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
388 diff = qib_cmp24(psn, qp->r_psn);
389 if (!qp->r_nak_state && diff >= 0) {
390 ibp->rvp.n_rc_seqnak++;
393 /* Use the expected PSN. */
394 qp->r_ack_psn = qp->r_psn;
396 * Wait to send the sequence
397 * NAK until all packets
398 * in the receive queue have
400 * Otherwise, we end up
401 * propagating congestion.
403 if (list_empty(&qp->rspwait)) {
411 } /* Out of sequence NAK */
412 } /* QP Request NAKs */
419 /* For now don't handle any other QP types */
424 spin_unlock(&qp->r_lock);
427 } /* Valid packet with TIDErr */
434 * qib_kreceive - receive a packet
435 * @rcd: the qlogic_ib context
436 * @llic: gets count of good packets needed to clear lli,
437 * (used with chips that need need to track crcs for lli)
439 * called from interrupt handler for errors or receive interrupt
440 * Returns number of CRC error packets, needed by some chips for
441 * local link integrity tracking. crcs are adjusted down by following
442 * good packets, if any, and count of good packets is also tracked.
444 u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
446 struct qib_devdata *dd = rcd->dd;
447 struct qib_pportdata *ppd = rcd->ppd;
450 const u32 rsize = dd->rcvhdrentsize; /* words */
451 const u32 maxcnt = dd->rcvhdrcnt * rsize; /* words */
452 u32 etail = -1, l, hdrqtail;
453 struct qib_message_header *hdr;
454 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0;
457 struct rvt_qp *qp, *nqp;
460 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
461 if (dd->flags & QIB_NODMA_RTAIL) {
462 u32 seq = qib_hdrget_seq(rhf_addr);
464 if (seq != rcd->seq_cnt)
468 hdrqtail = qib_get_rcvhdrtail(rcd);
471 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
474 for (last = 0, i = 1; !last; i += !last) {
475 hdr = dd->f_get_msgheader(dd, rhf_addr);
476 eflags = qib_hdrget_err_flags(rhf_addr);
477 etype = qib_hdrget_rcv_type(rhf_addr);
479 tlen = qib_hdrget_length_in_bytes(rhf_addr);
481 if ((dd->flags & QIB_NODMA_RTAIL) ?
482 qib_hdrget_use_egr_buf(rhf_addr) :
483 (etype != RCVHQ_RCV_TYPE_EXPECTED)) {
484 etail = qib_hdrget_index(rhf_addr);
486 if (tlen > sizeof(*hdr) ||
487 etype >= RCVHQ_RCV_TYPE_NON_KD) {
488 ebuf = qib_get_egrbuf(rcd, etail);
489 prefetch_range(ebuf, tlen - sizeof(*hdr));
493 u16 lrh_len = be16_to_cpu(hdr->lrh[2]) << 2;
495 if (lrh_len != tlen) {
496 qib_stats.sps_lenerrs++;
500 if (etype == RCVHQ_RCV_TYPE_NON_KD && !eflags &&
502 tlen > (dd->rcvhdrentsize - 2 + 1 -
503 qib_hdrget_offset(rhf_addr)) << 2) {
508 * Both tiderr and qibhdrerr are set for all plain IB
509 * packets; only qibhdrerr should be set.
511 if (unlikely(eflags))
512 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l,
513 etail, rhf_addr, hdr);
514 else if (etype == RCVHQ_RCV_TYPE_NON_KD) {
515 qib_ib_rcv(rcd, hdr, ebuf, tlen);
518 else if (llic && *llic)
525 if (i == QIB_MAX_PKT_RECV)
528 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
529 if (dd->flags & QIB_NODMA_RTAIL) {
530 u32 seq = qib_hdrget_seq(rhf_addr);
532 if (++rcd->seq_cnt > 13)
534 if (seq != rcd->seq_cnt)
536 } else if (l == hdrqtail)
539 * Update head regs etc., every 16 packets, if not last pkt,
540 * to help prevent rcvhdrq overflows, when many packets
541 * are processed and queue is nearly full.
542 * Don't request an interrupt for intermediate updates.
545 if (!last && !(i & 0xf)) {
546 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
554 * Iterate over all QPs waiting to respond.
555 * The list won't change since the IRQ is only run on one CPU.
557 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
558 list_del_init(&qp->rspwait);
559 if (qp->r_flags & RVT_R_RSP_NAK) {
560 qp->r_flags &= ~RVT_R_RSP_NAK;
563 if (qp->r_flags & RVT_R_RSP_SEND) {
566 qp->r_flags &= ~RVT_R_RSP_SEND;
567 spin_lock_irqsave(&qp->s_lock, flags);
568 if (ib_rvt_state_ops[qp->state] &
569 RVT_PROCESS_OR_FLUSH_SEND)
570 qib_schedule_send(qp);
571 spin_unlock_irqrestore(&qp->s_lock, flags);
577 /* Report number of packets consumed */
582 * Always write head at end, and setup rcv interrupt, even
583 * if no packets were processed.
585 lval = (u64)rcd->head | dd->rhdrhead_intr_off;
586 dd->f_update_usrhead(rcd, lval, updegr, etail, i);
591 * qib_set_mtu - set the MTU
592 * @ppd: the perport data
595 * We can handle "any" incoming size, the issue here is whether we
596 * need to restrict our outgoing size. For now, we don't do any
597 * sanity checking on this, and we don't deal with what happens to
598 * programs that are already running when the size changes.
599 * NOTE: changing the MTU will usually cause the IBC to go back to
602 int qib_set_mtu(struct qib_pportdata *ppd, u16 arg)
607 if (arg != 256 && arg != 512 && arg != 1024 && arg != 2048 &&
612 chk = ib_mtu_enum_to_int(qib_ibmtu);
613 if (chk > 0 && arg > chk) {
618 piosize = ppd->ibmaxlen;
621 if (arg >= (piosize - QIB_PIO_MAXIBHDR)) {
622 /* Only if it's not the initial value (or reset to it) */
623 if (piosize != ppd->init_ibmaxlen) {
624 if (arg > piosize && arg <= ppd->init_ibmaxlen)
625 piosize = ppd->init_ibmaxlen - 2 * sizeof(u32);
626 ppd->ibmaxlen = piosize;
628 } else if ((arg + QIB_PIO_MAXIBHDR) != ppd->ibmaxlen) {
629 piosize = arg + QIB_PIO_MAXIBHDR - 2 * sizeof(u32);
630 ppd->ibmaxlen = piosize;
633 ppd->dd->f_set_ib_cfg(ppd, QIB_IB_CFG_MTU, 0);
641 int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
643 struct qib_devdata *dd = ppd->dd;
648 dd->f_set_ib_cfg(ppd, QIB_IB_CFG_LIDLMC,
649 lid | (~((1U << lmc) - 1)) << 16);
651 qib_devinfo(dd->pcidev, "IB%u:%u got a lid: 0x%x\n",
652 dd->unit, ppd->port, lid);
658 * Following deal with the "obviously simple" task of overriding the state
659 * of the LEDS, which normally indicate link physical and logical status.
660 * The complications arise in dealing with different hardware mappings
661 * and the board-dependent routine being called from interrupts.
662 * and then there's the requirement to _flash_ them.
664 #define LED_OVER_FREQ_SHIFT 8
665 #define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
666 /* Below is "non-zero" to force override, but both actual LEDs are off */
667 #define LED_OVER_BOTH_OFF (8)
669 static void qib_run_led_override(struct timer_list *t)
671 struct qib_pportdata *ppd = from_timer(ppd, t,
673 struct qib_devdata *dd = ppd->dd;
677 if (!(dd->flags & QIB_INITTED))
680 ph_idx = ppd->led_override_phase++ & 1;
681 ppd->led_override = ppd->led_override_vals[ph_idx];
682 timeoff = ppd->led_override_timeoff;
684 dd->f_setextled(ppd, 1);
686 * don't re-fire the timer if user asked for it to be off; we let
687 * it fire one more time after they turn it off to simplify
689 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
690 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
693 void qib_set_led_override(struct qib_pportdata *ppd, unsigned int val)
695 struct qib_devdata *dd = ppd->dd;
698 if (!(dd->flags & QIB_INITTED))
701 /* First check if we are blinking. If not, use 1HZ polling */
703 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
706 /* For blink, set each phase from one nybble of val */
707 ppd->led_override_vals[0] = val & 0xF;
708 ppd->led_override_vals[1] = (val >> 4) & 0xF;
709 timeoff = (HZ << 4)/freq;
711 /* Non-blink set both phases the same. */
712 ppd->led_override_vals[0] = val & 0xF;
713 ppd->led_override_vals[1] = val & 0xF;
715 ppd->led_override_timeoff = timeoff;
718 * If the timer has not already been started, do so. Use a "quick"
719 * timeout so the function will be called soon, to look at our request.
721 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
722 /* Need to start timer */
723 timer_setup(&ppd->led_override_timer, qib_run_led_override, 0);
724 ppd->led_override_timer.expires = jiffies + 1;
725 add_timer(&ppd->led_override_timer);
727 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
728 mod_timer(&ppd->led_override_timer, jiffies + 1);
729 atomic_dec(&ppd->led_override_timer_active);
734 * qib_reset_device - reset the chip if possible
735 * @unit: the device to reset
737 * Whether or not reset is successful, we attempt to re-initialize the chip
738 * (that is, much like a driver unload/reload). We clear the INITTED flag
739 * so that the various entry points will fail until we reinitialize. For
740 * now, we only allow this if no user contexts are open that use chip resources
742 int qib_reset_device(int unit)
745 struct qib_devdata *dd = qib_lookup(unit);
746 struct qib_pportdata *ppd;
755 qib_devinfo(dd->pcidev, "Reset on unit %u requested\n", unit);
757 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) {
758 qib_devinfo(dd->pcidev,
759 "Invalid unit number %u or not initialized or not present\n",
765 spin_lock_irqsave(&dd->uctxt_lock, flags);
767 for (i = dd->first_user_ctxt; i < dd->cfgctxts; i++) {
768 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
770 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
774 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
776 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
777 ppd = dd->pport + pidx;
778 if (atomic_read(&ppd->led_override_timer_active)) {
779 /* Need to stop LED timer, _then_ shut off LEDs */
780 del_timer_sync(&ppd->led_override_timer);
781 atomic_set(&ppd->led_override_timer_active, 0);
784 /* Shut off LEDs after we are sure timer is not running */
785 ppd->led_override = LED_OVER_BOTH_OFF;
786 dd->f_setextled(ppd, 0);
787 if (dd->flags & QIB_HAS_SEND_DMA)
788 qib_teardown_sdma(ppd);
791 ret = dd->f_reset(dd);
793 ret = qib_init(dd, 1);
798 "Reinitialize unit %u after reset failed with %d\n",
801 qib_devinfo(dd->pcidev,
802 "Reinitialized unit %u after resetting\n",