2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/bitops.h>
11 #include <linux/host1x.h>
12 #include <linux/idr.h>
13 #include <linux/iommu.h>
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
18 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
19 #include <asm/dma-iommu.h>
25 #define DRIVER_NAME "tegra"
26 #define DRIVER_DESC "NVIDIA Tegra graphics"
27 #define DRIVER_DATE "20120330"
28 #define DRIVER_MAJOR 0
29 #define DRIVER_MINOR 0
30 #define DRIVER_PATCHLEVEL 0
32 #define CARVEOUT_SZ SZ_64M
33 #define CDMA_GATHER_FETCHES_MAX_NB 16383
35 struct tegra_drm_file {
40 static int tegra_atomic_check(struct drm_device *drm,
41 struct drm_atomic_state *state)
45 err = drm_atomic_helper_check(drm, state);
49 return tegra_display_hub_atomic_check(drm, state);
52 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
53 .fb_create = tegra_fb_create,
54 #ifdef CONFIG_DRM_FBDEV_EMULATION
55 .output_poll_changed = drm_fb_helper_output_poll_changed,
57 .atomic_check = tegra_atomic_check,
58 .atomic_commit = drm_atomic_helper_commit,
61 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
63 struct drm_device *drm = old_state->dev;
64 struct tegra_drm *tegra = drm->dev_private;
67 drm_atomic_helper_commit_modeset_disables(drm, old_state);
68 tegra_display_hub_atomic_commit(drm, old_state);
69 drm_atomic_helper_commit_planes(drm, old_state, 0);
70 drm_atomic_helper_commit_modeset_enables(drm, old_state);
71 drm_atomic_helper_commit_hw_done(old_state);
72 drm_atomic_helper_wait_for_vblanks(drm, old_state);
73 drm_atomic_helper_cleanup_planes(drm, old_state);
75 drm_atomic_helper_commit_tail_rpm(old_state);
79 static const struct drm_mode_config_helper_funcs
80 tegra_drm_mode_config_helpers = {
81 .atomic_commit_tail = tegra_atomic_commit_tail,
84 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
86 struct host1x_device *device = to_host1x_device(drm->dev);
87 struct tegra_drm *tegra;
90 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
94 if (iommu_present(&platform_bus_type)) {
95 u64 carveout_start, carveout_end, gem_start, gem_end;
96 struct iommu_domain_geometry *geometry;
99 tegra->domain = iommu_domain_alloc(&platform_bus_type);
100 if (!tegra->domain) {
105 err = iova_cache_get();
109 geometry = &tegra->domain->geometry;
110 gem_start = geometry->aperture_start;
111 gem_end = geometry->aperture_end - CARVEOUT_SZ;
112 carveout_start = gem_end + 1;
113 carveout_end = geometry->aperture_end;
115 order = __ffs(tegra->domain->pgsize_bitmap);
116 init_iova_domain(&tegra->carveout.domain, 1UL << order,
117 carveout_start >> order);
119 tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
120 tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
122 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
123 mutex_init(&tegra->mm_lock);
125 DRM_DEBUG("IOMMU apertures:\n");
126 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
127 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
131 mutex_init(&tegra->clients_lock);
132 INIT_LIST_HEAD(&tegra->clients);
134 drm->dev_private = tegra;
137 drm_mode_config_init(drm);
139 drm->mode_config.min_width = 0;
140 drm->mode_config.min_height = 0;
142 drm->mode_config.max_width = 4096;
143 drm->mode_config.max_height = 4096;
145 drm->mode_config.allow_fb_modifiers = true;
147 drm->mode_config.normalize_zpos = true;
149 drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
150 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
152 err = tegra_drm_fb_prepare(drm);
156 drm_kms_helper_poll_init(drm);
158 err = host1x_device_init(device);
163 err = tegra_display_hub_prepare(tegra->hub);
169 * We don't use the drm_irq_install() helpers provided by the DRM
170 * core, so we need to set this manually in order to allow the
171 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
173 drm->irq_enabled = true;
175 /* syncpoints are used for full 32-bit hardware VBLANK counters */
176 drm->max_vblank_count = 0xffffffff;
178 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
182 drm_mode_config_reset(drm);
184 err = tegra_drm_fb_init(drm);
192 tegra_display_hub_cleanup(tegra->hub);
194 host1x_device_exit(device);
196 drm_kms_helper_poll_fini(drm);
197 tegra_drm_fb_free(drm);
199 drm_mode_config_cleanup(drm);
202 mutex_destroy(&tegra->mm_lock);
203 drm_mm_takedown(&tegra->mm);
204 put_iova_domain(&tegra->carveout.domain);
209 iommu_domain_free(tegra->domain);
215 static void tegra_drm_unload(struct drm_device *drm)
217 struct host1x_device *device = to_host1x_device(drm->dev);
218 struct tegra_drm *tegra = drm->dev_private;
221 drm_kms_helper_poll_fini(drm);
222 tegra_drm_fb_exit(drm);
223 drm_atomic_helper_shutdown(drm);
224 drm_mode_config_cleanup(drm);
226 err = host1x_device_exit(device);
231 mutex_destroy(&tegra->mm_lock);
232 drm_mm_takedown(&tegra->mm);
233 put_iova_domain(&tegra->carveout.domain);
235 iommu_domain_free(tegra->domain);
241 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
243 struct tegra_drm_file *fpriv;
245 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
249 idr_init(&fpriv->contexts);
250 mutex_init(&fpriv->lock);
251 filp->driver_priv = fpriv;
256 static void tegra_drm_context_free(struct tegra_drm_context *context)
258 context->client->ops->close_channel(context);
262 static struct host1x_bo *
263 host1x_bo_lookup(struct drm_file *file, u32 handle)
265 struct drm_gem_object *gem;
268 gem = drm_gem_object_lookup(file, handle);
272 bo = to_tegra_bo(gem);
276 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
277 struct drm_tegra_reloc __user *src,
278 struct drm_device *drm,
279 struct drm_file *file)
284 err = get_user(cmdbuf, &src->cmdbuf.handle);
288 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
292 err = get_user(target, &src->target.handle);
296 err = get_user(dest->target.offset, &src->target.offset);
300 err = get_user(dest->shift, &src->shift);
304 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
305 if (!dest->cmdbuf.bo)
308 dest->target.bo = host1x_bo_lookup(file, target);
309 if (!dest->target.bo)
315 int tegra_drm_submit(struct tegra_drm_context *context,
316 struct drm_tegra_submit *args, struct drm_device *drm,
317 struct drm_file *file)
319 struct host1x_client *client = &context->client->base;
320 unsigned int num_cmdbufs = args->num_cmdbufs;
321 unsigned int num_relocs = args->num_relocs;
322 struct drm_tegra_cmdbuf __user *user_cmdbufs;
323 struct drm_tegra_reloc __user *user_relocs;
324 struct drm_tegra_syncpt __user *user_syncpt;
325 struct drm_tegra_syncpt syncpt;
326 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
327 struct drm_gem_object **refs;
328 struct host1x_syncpt *sp;
329 struct host1x_job *job;
330 unsigned int num_refs;
333 user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
334 user_relocs = u64_to_user_ptr(args->relocs);
335 user_syncpt = u64_to_user_ptr(args->syncpts);
337 /* We don't yet support other than one syncpt_incr struct per submit */
338 if (args->num_syncpts != 1)
341 /* We don't yet support waitchks */
342 if (args->num_waitchks != 0)
345 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
350 job->num_relocs = args->num_relocs;
351 job->client = client;
352 job->class = client->class;
353 job->serialize = true;
356 * Track referenced BOs so that they can be unreferenced after the
357 * submission is complete.
359 num_refs = num_cmdbufs + num_relocs * 2;
361 refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
367 /* reuse as an iterator later */
370 while (num_cmdbufs) {
371 struct drm_tegra_cmdbuf cmdbuf;
372 struct host1x_bo *bo;
373 struct tegra_bo *obj;
376 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
382 * The maximum number of CDMA gather fetches is 16383, a higher
383 * value means the words count is malformed.
385 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
390 bo = host1x_bo_lookup(file, cmdbuf.handle);
396 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
397 obj = host1x_to_tegra_bo(bo);
398 refs[num_refs++] = &obj->gem;
401 * Gather buffer base address must be 4-bytes aligned,
402 * unaligned offset is malformed and cause commands stream
403 * corruption on the buffer address relocation.
405 if (offset & 3 || offset > obj->gem.size) {
410 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
415 /* copy and resolve relocations from submit */
416 while (num_relocs--) {
417 struct host1x_reloc *reloc;
418 struct tegra_bo *obj;
420 err = host1x_reloc_copy_from_user(&job->relocs[num_relocs],
421 &user_relocs[num_relocs], drm,
426 reloc = &job->relocs[num_relocs];
427 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
428 refs[num_refs++] = &obj->gem;
431 * The unaligned cmdbuf offset will cause an unaligned write
432 * during of the relocations patching, corrupting the commands
435 if (reloc->cmdbuf.offset & 3 ||
436 reloc->cmdbuf.offset >= obj->gem.size) {
441 obj = host1x_to_tegra_bo(reloc->target.bo);
442 refs[num_refs++] = &obj->gem;
444 if (reloc->target.offset >= obj->gem.size) {
450 if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
455 /* check whether syncpoint ID is valid */
456 sp = host1x_syncpt_get(host1x, syncpt.id);
462 job->is_addr_reg = context->client->ops->is_addr_reg;
463 job->is_valid_class = context->client->ops->is_valid_class;
464 job->syncpt_incrs = syncpt.incrs;
465 job->syncpt_id = syncpt.id;
466 job->timeout = 10000;
468 if (args->timeout && args->timeout < 10000)
469 job->timeout = args->timeout;
471 err = host1x_job_pin(job, context->client->base.dev);
475 err = host1x_job_submit(job);
477 host1x_job_unpin(job);
481 args->fence = job->syncpt_end;
485 drm_gem_object_put_unlocked(refs[num_refs]);
495 #ifdef CONFIG_DRM_TEGRA_STAGING
496 static int tegra_gem_create(struct drm_device *drm, void *data,
497 struct drm_file *file)
499 struct drm_tegra_gem_create *args = data;
502 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
510 static int tegra_gem_mmap(struct drm_device *drm, void *data,
511 struct drm_file *file)
513 struct drm_tegra_gem_mmap *args = data;
514 struct drm_gem_object *gem;
517 gem = drm_gem_object_lookup(file, args->handle);
521 bo = to_tegra_bo(gem);
523 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
525 drm_gem_object_put_unlocked(gem);
530 static int tegra_syncpt_read(struct drm_device *drm, void *data,
531 struct drm_file *file)
533 struct host1x *host = dev_get_drvdata(drm->dev->parent);
534 struct drm_tegra_syncpt_read *args = data;
535 struct host1x_syncpt *sp;
537 sp = host1x_syncpt_get(host, args->id);
541 args->value = host1x_syncpt_read_min(sp);
545 static int tegra_syncpt_incr(struct drm_device *drm, void *data,
546 struct drm_file *file)
548 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
549 struct drm_tegra_syncpt_incr *args = data;
550 struct host1x_syncpt *sp;
552 sp = host1x_syncpt_get(host1x, args->id);
556 return host1x_syncpt_incr(sp);
559 static int tegra_syncpt_wait(struct drm_device *drm, void *data,
560 struct drm_file *file)
562 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
563 struct drm_tegra_syncpt_wait *args = data;
564 struct host1x_syncpt *sp;
566 sp = host1x_syncpt_get(host1x, args->id);
570 return host1x_syncpt_wait(sp, args->thresh,
571 msecs_to_jiffies(args->timeout),
575 static int tegra_client_open(struct tegra_drm_file *fpriv,
576 struct tegra_drm_client *client,
577 struct tegra_drm_context *context)
581 err = client->ops->open_channel(client, context);
585 err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
587 client->ops->close_channel(context);
591 context->client = client;
597 static int tegra_open_channel(struct drm_device *drm, void *data,
598 struct drm_file *file)
600 struct tegra_drm_file *fpriv = file->driver_priv;
601 struct tegra_drm *tegra = drm->dev_private;
602 struct drm_tegra_open_channel *args = data;
603 struct tegra_drm_context *context;
604 struct tegra_drm_client *client;
607 context = kzalloc(sizeof(*context), GFP_KERNEL);
611 mutex_lock(&fpriv->lock);
613 list_for_each_entry(client, &tegra->clients, list)
614 if (client->base.class == args->client) {
615 err = tegra_client_open(fpriv, client, context);
619 args->context = context->id;
626 mutex_unlock(&fpriv->lock);
630 static int tegra_close_channel(struct drm_device *drm, void *data,
631 struct drm_file *file)
633 struct tegra_drm_file *fpriv = file->driver_priv;
634 struct drm_tegra_close_channel *args = data;
635 struct tegra_drm_context *context;
638 mutex_lock(&fpriv->lock);
640 context = idr_find(&fpriv->contexts, args->context);
646 idr_remove(&fpriv->contexts, context->id);
647 tegra_drm_context_free(context);
650 mutex_unlock(&fpriv->lock);
654 static int tegra_get_syncpt(struct drm_device *drm, void *data,
655 struct drm_file *file)
657 struct tegra_drm_file *fpriv = file->driver_priv;
658 struct drm_tegra_get_syncpt *args = data;
659 struct tegra_drm_context *context;
660 struct host1x_syncpt *syncpt;
663 mutex_lock(&fpriv->lock);
665 context = idr_find(&fpriv->contexts, args->context);
671 if (args->index >= context->client->base.num_syncpts) {
676 syncpt = context->client->base.syncpts[args->index];
677 args->id = host1x_syncpt_id(syncpt);
680 mutex_unlock(&fpriv->lock);
684 static int tegra_submit(struct drm_device *drm, void *data,
685 struct drm_file *file)
687 struct tegra_drm_file *fpriv = file->driver_priv;
688 struct drm_tegra_submit *args = data;
689 struct tegra_drm_context *context;
692 mutex_lock(&fpriv->lock);
694 context = idr_find(&fpriv->contexts, args->context);
700 err = context->client->ops->submit(context, args, drm, file);
703 mutex_unlock(&fpriv->lock);
707 static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
708 struct drm_file *file)
710 struct tegra_drm_file *fpriv = file->driver_priv;
711 struct drm_tegra_get_syncpt_base *args = data;
712 struct tegra_drm_context *context;
713 struct host1x_syncpt_base *base;
714 struct host1x_syncpt *syncpt;
717 mutex_lock(&fpriv->lock);
719 context = idr_find(&fpriv->contexts, args->context);
725 if (args->syncpt >= context->client->base.num_syncpts) {
730 syncpt = context->client->base.syncpts[args->syncpt];
732 base = host1x_syncpt_get_base(syncpt);
738 args->id = host1x_syncpt_base_id(base);
741 mutex_unlock(&fpriv->lock);
745 static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
746 struct drm_file *file)
748 struct drm_tegra_gem_set_tiling *args = data;
749 enum tegra_bo_tiling_mode mode;
750 struct drm_gem_object *gem;
751 unsigned long value = 0;
754 switch (args->mode) {
755 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
756 mode = TEGRA_BO_TILING_MODE_PITCH;
758 if (args->value != 0)
763 case DRM_TEGRA_GEM_TILING_MODE_TILED:
764 mode = TEGRA_BO_TILING_MODE_TILED;
766 if (args->value != 0)
771 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
772 mode = TEGRA_BO_TILING_MODE_BLOCK;
784 gem = drm_gem_object_lookup(file, args->handle);
788 bo = to_tegra_bo(gem);
790 bo->tiling.mode = mode;
791 bo->tiling.value = value;
793 drm_gem_object_put_unlocked(gem);
798 static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
799 struct drm_file *file)
801 struct drm_tegra_gem_get_tiling *args = data;
802 struct drm_gem_object *gem;
806 gem = drm_gem_object_lookup(file, args->handle);
810 bo = to_tegra_bo(gem);
812 switch (bo->tiling.mode) {
813 case TEGRA_BO_TILING_MODE_PITCH:
814 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
818 case TEGRA_BO_TILING_MODE_TILED:
819 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
823 case TEGRA_BO_TILING_MODE_BLOCK:
824 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
825 args->value = bo->tiling.value;
833 drm_gem_object_put_unlocked(gem);
838 static int tegra_gem_set_flags(struct drm_device *drm, void *data,
839 struct drm_file *file)
841 struct drm_tegra_gem_set_flags *args = data;
842 struct drm_gem_object *gem;
845 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
848 gem = drm_gem_object_lookup(file, args->handle);
852 bo = to_tegra_bo(gem);
855 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
856 bo->flags |= TEGRA_BO_BOTTOM_UP;
858 drm_gem_object_put_unlocked(gem);
863 static int tegra_gem_get_flags(struct drm_device *drm, void *data,
864 struct drm_file *file)
866 struct drm_tegra_gem_get_flags *args = data;
867 struct drm_gem_object *gem;
870 gem = drm_gem_object_lookup(file, args->handle);
874 bo = to_tegra_bo(gem);
877 if (bo->flags & TEGRA_BO_BOTTOM_UP)
878 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
880 drm_gem_object_put_unlocked(gem);
886 static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
887 #ifdef CONFIG_DRM_TEGRA_STAGING
888 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
889 DRM_UNLOCKED | DRM_RENDER_ALLOW),
890 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
891 DRM_UNLOCKED | DRM_RENDER_ALLOW),
892 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
893 DRM_UNLOCKED | DRM_RENDER_ALLOW),
894 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
895 DRM_UNLOCKED | DRM_RENDER_ALLOW),
896 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
897 DRM_UNLOCKED | DRM_RENDER_ALLOW),
898 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
899 DRM_UNLOCKED | DRM_RENDER_ALLOW),
900 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
901 DRM_UNLOCKED | DRM_RENDER_ALLOW),
902 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
903 DRM_UNLOCKED | DRM_RENDER_ALLOW),
904 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
905 DRM_UNLOCKED | DRM_RENDER_ALLOW),
906 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
907 DRM_UNLOCKED | DRM_RENDER_ALLOW),
908 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
909 DRM_UNLOCKED | DRM_RENDER_ALLOW),
910 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
911 DRM_UNLOCKED | DRM_RENDER_ALLOW),
912 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
913 DRM_UNLOCKED | DRM_RENDER_ALLOW),
914 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
915 DRM_UNLOCKED | DRM_RENDER_ALLOW),
919 static const struct file_operations tegra_drm_fops = {
920 .owner = THIS_MODULE,
922 .release = drm_release,
923 .unlocked_ioctl = drm_ioctl,
924 .mmap = tegra_drm_mmap,
927 .compat_ioctl = drm_compat_ioctl,
928 .llseek = noop_llseek,
931 static int tegra_drm_context_cleanup(int id, void *p, void *data)
933 struct tegra_drm_context *context = p;
935 tegra_drm_context_free(context);
940 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
942 struct tegra_drm_file *fpriv = file->driver_priv;
944 mutex_lock(&fpriv->lock);
945 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
946 mutex_unlock(&fpriv->lock);
948 idr_destroy(&fpriv->contexts);
949 mutex_destroy(&fpriv->lock);
953 #ifdef CONFIG_DEBUG_FS
954 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
956 struct drm_info_node *node = (struct drm_info_node *)s->private;
957 struct drm_device *drm = node->minor->dev;
958 struct drm_framebuffer *fb;
960 mutex_lock(&drm->mode_config.fb_lock);
962 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
963 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
964 fb->base.id, fb->width, fb->height,
966 fb->format->cpp[0] * 8,
967 drm_framebuffer_read_refcount(fb));
970 mutex_unlock(&drm->mode_config.fb_lock);
975 static int tegra_debugfs_iova(struct seq_file *s, void *data)
977 struct drm_info_node *node = (struct drm_info_node *)s->private;
978 struct drm_device *drm = node->minor->dev;
979 struct tegra_drm *tegra = drm->dev_private;
980 struct drm_printer p = drm_seq_file_printer(s);
983 mutex_lock(&tegra->mm_lock);
984 drm_mm_print(&tegra->mm, &p);
985 mutex_unlock(&tegra->mm_lock);
991 static struct drm_info_list tegra_debugfs_list[] = {
992 { "framebuffers", tegra_debugfs_framebuffers, 0 },
993 { "iova", tegra_debugfs_iova, 0 },
996 static int tegra_debugfs_init(struct drm_minor *minor)
998 return drm_debugfs_create_files(tegra_debugfs_list,
999 ARRAY_SIZE(tegra_debugfs_list),
1000 minor->debugfs_root, minor);
1004 static struct drm_driver tegra_drm_driver = {
1005 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
1006 DRIVER_ATOMIC | DRIVER_RENDER,
1007 .load = tegra_drm_load,
1008 .unload = tegra_drm_unload,
1009 .open = tegra_drm_open,
1010 .postclose = tegra_drm_postclose,
1011 .lastclose = drm_fb_helper_lastclose,
1013 #if defined(CONFIG_DEBUG_FS)
1014 .debugfs_init = tegra_debugfs_init,
1017 .gem_free_object_unlocked = tegra_bo_free_object,
1018 .gem_vm_ops = &tegra_bo_vm_ops,
1020 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1021 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1022 .gem_prime_export = tegra_gem_prime_export,
1023 .gem_prime_import = tegra_gem_prime_import,
1025 .dumb_create = tegra_bo_dumb_create,
1027 .ioctls = tegra_drm_ioctls,
1028 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1029 .fops = &tegra_drm_fops,
1031 .name = DRIVER_NAME,
1032 .desc = DRIVER_DESC,
1033 .date = DRIVER_DATE,
1034 .major = DRIVER_MAJOR,
1035 .minor = DRIVER_MINOR,
1036 .patchlevel = DRIVER_PATCHLEVEL,
1039 int tegra_drm_register_client(struct tegra_drm *tegra,
1040 struct tegra_drm_client *client)
1042 mutex_lock(&tegra->clients_lock);
1043 list_add_tail(&client->list, &tegra->clients);
1044 mutex_unlock(&tegra->clients_lock);
1049 int tegra_drm_unregister_client(struct tegra_drm *tegra,
1050 struct tegra_drm_client *client)
1052 mutex_lock(&tegra->clients_lock);
1053 list_del_init(&client->list);
1054 mutex_unlock(&tegra->clients_lock);
1059 struct iommu_group *host1x_client_iommu_attach(struct host1x_client *client,
1062 struct drm_device *drm = dev_get_drvdata(client->parent);
1063 struct tegra_drm *tegra = drm->dev_private;
1064 struct iommu_group *group = NULL;
1067 if (tegra->domain) {
1068 group = iommu_group_get(client->dev);
1070 dev_err(client->dev, "failed to get IOMMU group\n");
1071 return ERR_PTR(-ENODEV);
1074 if (!shared || (shared && (group != tegra->group))) {
1075 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
1076 if (client->dev->archdata.mapping) {
1077 struct dma_iommu_mapping *mapping =
1078 to_dma_iommu_mapping(client->dev);
1079 arm_iommu_detach_device(client->dev);
1080 arm_iommu_release_mapping(mapping);
1083 err = iommu_attach_group(tegra->domain, group);
1085 iommu_group_put(group);
1086 return ERR_PTR(err);
1089 if (shared && !tegra->group)
1090 tegra->group = group;
1097 void host1x_client_iommu_detach(struct host1x_client *client,
1098 struct iommu_group *group)
1100 struct drm_device *drm = dev_get_drvdata(client->parent);
1101 struct tegra_drm *tegra = drm->dev_private;
1104 if (group == tegra->group) {
1105 iommu_detach_group(tegra->domain, group);
1106 tegra->group = NULL;
1109 iommu_group_put(group);
1113 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
1121 size = iova_align(&tegra->carveout.domain, size);
1123 size = PAGE_ALIGN(size);
1125 gfp = GFP_KERNEL | __GFP_ZERO;
1126 if (!tegra->domain) {
1128 * Many units only support 32-bit addresses, even on 64-bit
1129 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1130 * virtual address space, force allocations to be in the
1131 * lower 32-bit range.
1136 virt = (void *)__get_free_pages(gfp, get_order(size));
1138 return ERR_PTR(-ENOMEM);
1140 if (!tegra->domain) {
1142 * If IOMMU is disabled, devices address physical memory
1145 *dma = virt_to_phys(virt);
1149 alloc = alloc_iova(&tegra->carveout.domain,
1150 size >> tegra->carveout.shift,
1151 tegra->carveout.limit, true);
1157 *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1158 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1159 size, IOMMU_READ | IOMMU_WRITE);
1166 __free_iova(&tegra->carveout.domain, alloc);
1168 free_pages((unsigned long)virt, get_order(size));
1170 return ERR_PTR(err);
1173 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1177 size = iova_align(&tegra->carveout.domain, size);
1179 size = PAGE_ALIGN(size);
1181 if (tegra->domain) {
1182 iommu_unmap(tegra->domain, dma, size);
1183 free_iova(&tegra->carveout.domain,
1184 iova_pfn(&tegra->carveout.domain, dma));
1187 free_pages((unsigned long)virt, get_order(size));
1190 static int host1x_drm_probe(struct host1x_device *dev)
1192 struct drm_driver *driver = &tegra_drm_driver;
1193 struct drm_device *drm;
1196 drm = drm_dev_alloc(driver, &dev->dev);
1198 return PTR_ERR(drm);
1200 dev_set_drvdata(&dev->dev, drm);
1202 err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb", false);
1206 err = drm_dev_register(drm, 0);
1217 static int host1x_drm_remove(struct host1x_device *dev)
1219 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1221 drm_dev_unregister(drm);
1227 #ifdef CONFIG_PM_SLEEP
1228 static int host1x_drm_suspend(struct device *dev)
1230 struct drm_device *drm = dev_get_drvdata(dev);
1232 return drm_mode_config_helper_suspend(drm);
1235 static int host1x_drm_resume(struct device *dev)
1237 struct drm_device *drm = dev_get_drvdata(dev);
1239 return drm_mode_config_helper_resume(drm);
1243 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1246 static const struct of_device_id host1x_drm_subdevs[] = {
1247 { .compatible = "nvidia,tegra20-dc", },
1248 { .compatible = "nvidia,tegra20-hdmi", },
1249 { .compatible = "nvidia,tegra20-gr2d", },
1250 { .compatible = "nvidia,tegra20-gr3d", },
1251 { .compatible = "nvidia,tegra30-dc", },
1252 { .compatible = "nvidia,tegra30-hdmi", },
1253 { .compatible = "nvidia,tegra30-gr2d", },
1254 { .compatible = "nvidia,tegra30-gr3d", },
1255 { .compatible = "nvidia,tegra114-dsi", },
1256 { .compatible = "nvidia,tegra114-hdmi", },
1257 { .compatible = "nvidia,tegra114-gr3d", },
1258 { .compatible = "nvidia,tegra124-dc", },
1259 { .compatible = "nvidia,tegra124-sor", },
1260 { .compatible = "nvidia,tegra124-hdmi", },
1261 { .compatible = "nvidia,tegra124-dsi", },
1262 { .compatible = "nvidia,tegra124-vic", },
1263 { .compatible = "nvidia,tegra132-dsi", },
1264 { .compatible = "nvidia,tegra210-dc", },
1265 { .compatible = "nvidia,tegra210-dsi", },
1266 { .compatible = "nvidia,tegra210-sor", },
1267 { .compatible = "nvidia,tegra210-sor1", },
1268 { .compatible = "nvidia,tegra210-vic", },
1269 { .compatible = "nvidia,tegra186-display", },
1270 { .compatible = "nvidia,tegra186-dc", },
1271 { .compatible = "nvidia,tegra186-sor", },
1272 { .compatible = "nvidia,tegra186-sor1", },
1273 { .compatible = "nvidia,tegra186-vic", },
1274 { .compatible = "nvidia,tegra194-display", },
1275 { .compatible = "nvidia,tegra194-dc", },
1276 { .compatible = "nvidia,tegra194-sor", },
1277 { .compatible = "nvidia,tegra194-vic", },
1281 static struct host1x_driver host1x_drm_driver = {
1284 .pm = &host1x_drm_pm_ops,
1286 .probe = host1x_drm_probe,
1287 .remove = host1x_drm_remove,
1288 .subdevs = host1x_drm_subdevs,
1291 static struct platform_driver * const drivers[] = {
1292 &tegra_display_hub_driver,
1296 &tegra_dpaux_driver,
1303 static int __init host1x_drm_init(void)
1307 err = host1x_driver_register(&host1x_drm_driver);
1311 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1313 goto unregister_host1x;
1318 host1x_driver_unregister(&host1x_drm_driver);
1321 module_init(host1x_drm_init);
1323 static void __exit host1x_drm_exit(void)
1325 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1326 host1x_driver_unregister(&host1x_drm_driver);
1328 module_exit(host1x_drm_exit);
1331 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1332 MODULE_LICENSE("GPL v2");