drivers/gpu/drm/amd/amdgpu/amdgpu_job.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  *
  23  */
  24 #include <linux/kthread.h>
  25 #include <linux/wait.h>
  26 #include <linux/sched.h>
  27 #include <drm/drmP.h>
  28 #include "amdgpu.h"
  29 #include "amdgpu_trace.h"
  30
  31 static void amdgpu_job_timedout(struct drm_sched_job *s_job)
  32 {
  33         struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched);
  34         struct amdgpu_job *job = to_amdgpu_job(s_job);
  35
  36         if (amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) {
  37                 DRM_ERROR("ring %s timeout, but soft recovered\n",
  38                           s_job->sched->name);
  39                 return;
  40         }
  41
  42         DRM_ERROR("ring %s timeout, signaled seq=%u, emitted seq=%u\n",
  43                   job->base.sched->name, atomic_read(&ring->fence_drv.last_seq),
  44                   ring->fence_drv.sync_seq);
  45
  46         if (amdgpu_device_should_recover_gpu(ring->adev))
  47                 amdgpu_device_gpu_recover(ring->adev, job);
  48 }
  49
  50 int amdgpu_job_alloc(struct amdgpu_device *adev, unsigned num_ibs,
  51                      struct amdgpu_job **job, struct amdgpu_vm *vm)
  52 {
  53         size_t size = sizeof(struct amdgpu_job);
  54
  55         if (num_ibs == 0)
  56                 return -EINVAL;
  57
  58         size += sizeof(struct amdgpu_ib) * num_ibs;
  59
  60         *job = kzalloc(size, GFP_KERNEL);
  61         if (!*job)
  62                 return -ENOMEM;
  63
  64         /*
  65          * Initialize the scheduler to at least some ring so that we always
  66          * have a pointer to adev.
  67          */
  68         (*job)->base.sched = &adev->rings[0]->sched;
  69         (*job)->vm = vm;
  70         (*job)->ibs = (void *)&(*job)[1];
  71         (*job)->num_ibs = num_ibs;
  72
  73         amdgpu_sync_create(&(*job)->sync);
  74         amdgpu_sync_create(&(*job)->sched_sync);
  75         (*job)->vram_lost_counter = atomic_read(&adev->vram_lost_counter);
  76         (*job)->vm_pd_addr = AMDGPU_BO_INVALID_OFFSET;
  77
  78         return 0;
  79 }
  80
  81 int amdgpu_job_alloc_with_ib(struct amdgpu_device *adev, unsigned size,
  82                              struct amdgpu_job **job)
  83 {
  84         int r;
  85
  86         r = amdgpu_job_alloc(adev, 1, job, NULL);
  87         if (r)
  88                 return r;
  89
  90         r = amdgpu_ib_get(adev, NULL, size, &(*job)->ibs[0]);
  91         if (r)
  92                 kfree(*job);
  93
  94         return r;
  95 }
  96
  97 void amdgpu_job_free_resources(struct amdgpu_job *job)
  98 {
  99         struct amdgpu_ring *ring = to_amdgpu_ring(job->base.sched);
 100         struct dma_fence *f;
 101         unsigned i;
 102
 103         /* use sched fence if available */
 104         f = job->base.s_fence ? &job->base.s_fence->finished : job->fence;
 105
 106         for (i = 0; i < job->num_ibs; ++i)
 107                 amdgpu_ib_free(ring->adev, &job->ibs[i], f);
 108 }
 109
 110 static void amdgpu_job_free_cb(struct drm_sched_job *s_job)
 111 {
 112         struct amdgpu_ring *ring = to_amdgpu_ring(s_job->sched);
 113         struct amdgpu_job *job = to_amdgpu_job(s_job);
 114
 115         amdgpu_ring_priority_put(ring, s_job->s_priority);
 116         dma_fence_put(job->fence);
 117         amdgpu_sync_free(&job->sync);
 118         amdgpu_sync_free(&job->sched_sync);
 119         kfree(job);
 120 }
 121
 122 void amdgpu_job_free(struct amdgpu_job *job)
 123 {
 124         amdgpu_job_free_resources(job);
 125
 126         dma_fence_put(job->fence);
 127         amdgpu_sync_free(&job->sync);
 128         amdgpu_sync_free(&job->sched_sync);
 129         kfree(job);
 130 }
 131
 132 int amdgpu_job_submit(struct amdgpu_job *job, struct drm_sched_entity *entity,
 133                       void *owner, struct dma_fence **f)
 134 {
 135         enum drm_sched_priority priority;
 136         struct amdgpu_ring *ring;
 137         int r;
 138
 139         if (!f)
 140                 return -EINVAL;
 141
 142         r = drm_sched_job_init(&job->base, entity, owner);
 143         if (r)
 144                 return r;
 145
 146         job->owner = owner;
 147         *f = dma_fence_get(&job->base.s_fence->finished);
 148         amdgpu_job_free_resources(job);
 149         priority = job->base.s_priority;
 150         drm_sched_entity_push_job(&job->base, entity);
 151
 152         ring = to_amdgpu_ring(entity->rq->sched);
 153         amdgpu_ring_priority_get(ring, priority);
 154
 155         return 0;
 156 }
 157
 158 int amdgpu_job_submit_direct(struct amdgpu_job *job, struct amdgpu_ring *ring,
 159                              struct dma_fence **fence)
 160 {
 161         int r;
 162
 163         job->base.sched = &ring->sched;
 164         r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, NULL, fence);
 165         job->fence = dma_fence_get(*fence);
 166         if (r)
 167                 return r;
 168
 169         amdgpu_job_free(job);
 170         return 0;
 171 }
 172
 173 static struct dma_fence *amdgpu_job_dependency(struct drm_sched_job *sched_job,
 174                                                struct drm_sched_entity *s_entity)
 175 {
 176         struct amdgpu_ring *ring = to_amdgpu_ring(s_entity->rq->sched);
 177         struct amdgpu_job *job = to_amdgpu_job(sched_job);
 178         struct amdgpu_vm *vm = job->vm;
 179         struct dma_fence *fence;
 180         bool explicit = false;
 181         int r;
 182
 183         fence = amdgpu_sync_get_fence(&job->sync, &explicit);
 184         if (fence && explicit) {
 185                 if (drm_sched_dependency_optimized(fence, s_entity)) {
 186                         r = amdgpu_sync_fence(ring->adev, &job->sched_sync,
 187                                               fence, false);
 188                         if (r)
 189                                 DRM_ERROR("Error adding fence (%d)\n", r);
 190                 }
 191         }
 192
 193         while (fence == NULL && vm && !job->vmid) {
 194                 r = amdgpu_vmid_grab(vm, ring, &job->sync,
 195                                      &job->base.s_fence->finished,
 196                                      job);
 197                 if (r)
 198                         DRM_ERROR("Error getting VM ID (%d)\n", r);
 199
 200                 fence = amdgpu_sync_get_fence(&job->sync, NULL);
 201         }
 202
 203         return fence;
 204 }
 205
 206 static struct dma_fence *amdgpu_job_run(struct drm_sched_job *sched_job)
 207 {
 208         struct amdgpu_ring *ring = to_amdgpu_ring(sched_job->sched);
 209         struct dma_fence *fence = NULL, *finished;
 210         struct amdgpu_job *job;
 211         int r;
 212
 213         job = to_amdgpu_job(sched_job);
 214         finished = &job->base.s_fence->finished;
 215
 216         BUG_ON(amdgpu_sync_peek_fence(&job->sync, NULL));
 217
 218         trace_amdgpu_sched_run_job(job);
 219
 220         if (job->vram_lost_counter != atomic_read(&ring->adev->vram_lost_counter))
 221                 dma_fence_set_error(finished, -ECANCELED);/* skip IB as well if VRAM lost */
 222
 223         if (finished->error < 0) {
 224                 DRM_INFO("Skip scheduling IBs!\n");
 225         } else {
 226                 r = amdgpu_ib_schedule(ring, job->num_ibs, job->ibs, job,
 227                                        &fence);
 228                 if (r)
 229                         DRM_ERROR("Error scheduling IBs (%d)\n", r);
 230         }
 231         /* if gpu reset, hw fence will be replaced here */
 232         dma_fence_put(job->fence);
 233         job->fence = dma_fence_get(fence);
 234
 235         amdgpu_job_free_resources(job);
 236         return fence;
 237 }
 238
 239 const struct drm_sched_backend_ops amdgpu_sched_ops = {
 240         .dependency = amdgpu_job_dependency,
 241         .run_job = amdgpu_job_run,
 242         .timedout_job = amdgpu_job_timedout,
 243         .free_job = amdgpu_job_free_cb
 244 };