drivers/pci/controller/vmd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Volume Management Device driver
   4  * Copyright (c) 2015, Intel Corporation.
   5  */
   6
   7 #include <linux/device.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/irq.h>
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/msi.h>
  13 #include <linux/pci.h>
  14 #include <linux/pci-ecam.h>
  15 #include <linux/srcu.h>
  16 #include <linux/rculist.h>
  17 #include <linux/rcupdate.h>
  18
  19 #include <asm/irqdomain.h>
  20 #include <asm/device.h>
  21 #include <asm/msi.h>
  22 #include <asm/msidef.h>
  23
  24 #define VMD_CFGBAR      0
  25 #define VMD_MEMBAR1     2
  26 #define VMD_MEMBAR2     4
  27
  28 #define PCI_REG_VMCAP           0x40
  29 #define BUS_RESTRICT_CAP(vmcap) (vmcap & 0x1)
  30 #define PCI_REG_VMCONFIG        0x44
  31 #define BUS_RESTRICT_CFG(vmcfg) ((vmcfg >> 8) & 0x3)
  32 #define PCI_REG_VMLOCK          0x70
  33 #define MB2_SHADOW_EN(vmlock)   (vmlock & 0x2)
  34
  35 #define MB2_SHADOW_OFFSET       0x2000
  36 #define MB2_SHADOW_SIZE         16
  37
  38 enum vmd_features {
  39         /*
  40          * Device may contain registers which hint the physical location of the
  41          * membars, in order to allow proper address translation during
  42          * resource assignment to enable guest virtualization
  43          */
  44         VMD_FEAT_HAS_MEMBAR_SHADOW              = (1 << 0),
  45
  46         /*
  47          * Device may provide root port configuration information which limits
  48          * bus numbering
  49          */
  50         VMD_FEAT_HAS_BUS_RESTRICTIONS           = (1 << 1),
  51
  52         /*
  53          * Device contains physical location shadow registers in
  54          * vendor-specific capability space
  55          */
  56         VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP        = (1 << 2),
  57
  58         /*
  59          * Device may use MSI-X vector 0 for software triggering and will not
  60          * be used for MSI remapping
  61          */
  62         VMD_FEAT_OFFSET_FIRST_VECTOR            = (1 << 3),
  63 };
  64
  65 /*
  66  * Lock for manipulating VMD IRQ lists.
  67  */
  68 static DEFINE_RAW_SPINLOCK(list_lock);
  69
  70 /**
  71  * struct vmd_irq - private data to map driver IRQ to the VMD shared vector
  72  * @node:       list item for parent traversal.
  73  * @irq:        back pointer to parent.
  74  * @enabled:    true if driver enabled IRQ
  75  * @virq:       the virtual IRQ value provided to the requesting driver.
  76  *
  77  * Every MSI/MSI-X IRQ requested for a device in a VMD domain will be mapped to
  78  * a VMD IRQ using this structure.
  79  */
  80 struct vmd_irq {
  81         struct list_head        node;
  82         struct vmd_irq_list     *irq;
  83         bool                    enabled;
  84         unsigned int            virq;
  85 };
  86
  87 /**
  88  * struct vmd_irq_list - list of driver requested IRQs mapping to a VMD vector
  89  * @irq_list:   the list of irq's the VMD one demuxes to.
  90  * @srcu:       SRCU struct for local synchronization.
  91  * @count:      number of child IRQs assigned to this vector; used to track
  92  *              sharing.
  93  */
  94 struct vmd_irq_list {
  95         struct list_head        irq_list;
  96         struct srcu_struct      srcu;
  97         unsigned int            count;
  98 };
  99
 100 struct vmd_dev {
 101         struct pci_dev          *dev;
 102
 103         spinlock_t              cfg_lock;
 104         void __iomem            *cfgbar;
 105
 106         int msix_count;
 107         struct vmd_irq_list     *irqs;
 108
 109         struct pci_sysdata      sysdata;
 110         struct resource         resources[3];
 111         struct irq_domain       *irq_domain;
 112         struct pci_bus          *bus;
 113         u8                      busn_start;
 114         u8                      first_vec;
 115 };
 116
 117 static inline struct vmd_dev *vmd_from_bus(struct pci_bus *bus)
 118 {
 119         return container_of(bus->sysdata, struct vmd_dev, sysdata);
 120 }
 121
 122 static inline unsigned int index_from_irqs(struct vmd_dev *vmd,
 123                                            struct vmd_irq_list *irqs)
 124 {
 125         return irqs - vmd->irqs;
 126 }
 127
 128 /*
 129  * Drivers managing a device in a VMD domain allocate their own IRQs as before,
 130  * but the MSI entry for the hardware it's driving will be programmed with a
 131  * destination ID for the VMD MSI-X table.  The VMD muxes interrupts in its
 132  * domain into one of its own, and the VMD driver de-muxes these for the
 133  * handlers sharing that VMD IRQ.  The vmd irq_domain provides the operations
 134  * and irq_chip to set this up.
 135  */
 136 static void vmd_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
 137 {
 138         struct vmd_irq *vmdirq = data->chip_data;
 139         struct vmd_irq_list *irq = vmdirq->irq;
 140         struct vmd_dev *vmd = irq_data_get_irq_handler_data(data);
 141
 142         msg->address_hi = MSI_ADDR_BASE_HI;
 143         msg->address_lo = MSI_ADDR_BASE_LO |
 144                           MSI_ADDR_DEST_ID(index_from_irqs(vmd, irq));
 145         msg->data = 0;
 146 }
 147
 148 /*
 149  * We rely on MSI_FLAG_USE_DEF_CHIP_OPS to set the IRQ mask/unmask ops.
 150  */
 151 static void vmd_irq_enable(struct irq_data *data)
 152 {
 153         struct vmd_irq *vmdirq = data->chip_data;
 154         unsigned long flags;
 155
 156         raw_spin_lock_irqsave(&list_lock, flags);
 157         WARN_ON(vmdirq->enabled);
 158         list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list);
 159         vmdirq->enabled = true;
 160         raw_spin_unlock_irqrestore(&list_lock, flags);
 161
 162         data->chip->irq_unmask(data);
 163 }
 164
 165 static void vmd_irq_disable(struct irq_data *data)
 166 {
 167         struct vmd_irq *vmdirq = data->chip_data;
 168         unsigned long flags;
 169
 170         data->chip->irq_mask(data);
 171
 172         raw_spin_lock_irqsave(&list_lock, flags);
 173         if (vmdirq->enabled) {
 174                 list_del_rcu(&vmdirq->node);
 175                 vmdirq->enabled = false;
 176         }
 177         raw_spin_unlock_irqrestore(&list_lock, flags);
 178 }
 179
 180 /*
 181  * XXX: Stubbed until we develop acceptable way to not create conflicts with
 182  * other devices sharing the same vector.
 183  */
 184 static int vmd_irq_set_affinity(struct irq_data *data,
 185                                 const struct cpumask *dest, bool force)
 186 {
 187         return -EINVAL;
 188 }
 189
 190 static struct irq_chip vmd_msi_controller = {
 191         .name                   = "VMD-MSI",
 192         .irq_enable             = vmd_irq_enable,
 193         .irq_disable            = vmd_irq_disable,
 194         .irq_compose_msi_msg    = vmd_compose_msi_msg,
 195         .irq_set_affinity       = vmd_irq_set_affinity,
 196 };
 197
 198 static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
 199                                      msi_alloc_info_t *arg)
 200 {
 201         return 0;
 202 }
 203
 204 /*
 205  * XXX: We can be even smarter selecting the best IRQ once we solve the
 206  * affinity problem.
 207  */
 208 static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *desc)
 209 {
 210         unsigned long flags;
 211         int i, best;
 212
 213         if (vmd->msix_count == 1 + vmd->first_vec)
 214                 return &vmd->irqs[vmd->first_vec];
 215
 216         /*
 217          * White list for fast-interrupt handlers. All others will share the
 218          * "slow" interrupt vector.
 219          */
 220         switch (msi_desc_to_pci_dev(desc)->class) {
 221         case PCI_CLASS_STORAGE_EXPRESS:
 222                 break;
 223         default:
 224                 return &vmd->irqs[vmd->first_vec];
 225         }
 226
 227         raw_spin_lock_irqsave(&list_lock, flags);
 228         best = vmd->first_vec + 1;
 229         for (i = best; i < vmd->msix_count; i++)
 230                 if (vmd->irqs[i].count < vmd->irqs[best].count)
 231                         best = i;
 232         vmd->irqs[best].count++;
 233         raw_spin_unlock_irqrestore(&list_lock, flags);
 234
 235         return &vmd->irqs[best];
 236 }
 237
 238 static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
 239                         unsigned int virq, irq_hw_number_t hwirq,
 240                         msi_alloc_info_t *arg)
 241 {
 242         struct msi_desc *desc = arg->desc;
 243         struct vmd_dev *vmd = vmd_from_bus(msi_desc_to_pci_dev(desc)->bus);
 244         struct vmd_irq *vmdirq = kzalloc(sizeof(*vmdirq), GFP_KERNEL);
 245         unsigned int index, vector;
 246
 247         if (!vmdirq)
 248                 return -ENOMEM;
 249
 250         INIT_LIST_HEAD(&vmdirq->node);
 251         vmdirq->irq = vmd_next_irq(vmd, desc);
 252         vmdirq->virq = virq;
 253         index = index_from_irqs(vmd, vmdirq->irq);
 254         vector = pci_irq_vector(vmd->dev, index);
 255
 256         irq_domain_set_info(domain, virq, vector, info->chip, vmdirq,
 257                             handle_untracked_irq, vmd, NULL);
 258         return 0;
 259 }
 260
 261 static void vmd_msi_free(struct irq_domain *domain,
 262                         struct msi_domain_info *info, unsigned int virq)
 263 {
 264         struct vmd_irq *vmdirq = irq_get_chip_data(virq);
 265         unsigned long flags;
 266
 267         synchronize_srcu(&vmdirq->irq->srcu);
 268
 269         /* XXX: Potential optimization to rebalance */
 270         raw_spin_lock_irqsave(&list_lock, flags);
 271         vmdirq->irq->count--;
 272         raw_spin_unlock_irqrestore(&list_lock, flags);
 273
 274         kfree(vmdirq);
 275 }
 276
 277 static int vmd_msi_prepare(struct irq_domain *domain, struct device *dev,
 278                            int nvec, msi_alloc_info_t *arg)
 279 {
 280         struct pci_dev *pdev = to_pci_dev(dev);
 281         struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
 282
 283         if (nvec > vmd->msix_count)
 284                 return vmd->msix_count;
 285
 286         memset(arg, 0, sizeof(*arg));
 287         return 0;
 288 }
 289
 290 static void vmd_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
 291 {
 292         arg->desc = desc;
 293 }
 294
 295 static struct msi_domain_ops vmd_msi_domain_ops = {
 296         .get_hwirq      = vmd_get_hwirq,
 297         .msi_init       = vmd_msi_init,
 298         .msi_free       = vmd_msi_free,
 299         .msi_prepare    = vmd_msi_prepare,
 300         .set_desc       = vmd_set_desc,
 301 };
 302
 303 static struct msi_domain_info vmd_msi_domain_info = {
 304         .flags          = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
 305                           MSI_FLAG_PCI_MSIX,
 306         .ops            = &vmd_msi_domain_ops,
 307         .chip           = &vmd_msi_controller,
 308 };
 309
 310 static int vmd_create_irq_domain(struct vmd_dev *vmd)
 311 {
 312         struct fwnode_handle *fn;
 313
 314         fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
 315         if (!fn)
 316                 return -ENODEV;
 317
 318         vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info, NULL);
 319         if (!vmd->irq_domain) {
 320                 irq_domain_free_fwnode(fn);
 321                 return -ENODEV;
 322         }
 323
 324         return 0;
 325 }
 326
 327 static void vmd_remove_irq_domain(struct vmd_dev *vmd)
 328 {
 329         if (vmd->irq_domain) {
 330                 struct fwnode_handle *fn = vmd->irq_domain->fwnode;
 331
 332                 irq_domain_remove(vmd->irq_domain);
 333                 irq_domain_free_fwnode(fn);
 334         }
 335 }
 336
 337 static void __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
 338                                   unsigned int devfn, int reg, int len)
 339 {
 340         unsigned int busnr_ecam = bus->number - vmd->busn_start;
 341         u32 offset = PCIE_ECAM_OFFSET(busnr_ecam, devfn, reg);
 342
 343         if (offset + len >= resource_size(&vmd->dev->resource[VMD_CFGBAR]))
 344                 return NULL;
 345
 346         return vmd->cfgbar + offset;
 347 }
 348
 349 /*
 350  * CPU may deadlock if config space is not serialized on some versions of this
 351  * hardware, so all config space access is done under a spinlock.
 352  */
 353 static int vmd_pci_read(struct pci_bus *bus, unsigned int devfn, int reg,
 354                         int len, u32 *value)
 355 {
 356         struct vmd_dev *vmd = vmd_from_bus(bus);
 357         void __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
 358         unsigned long flags;
 359         int ret = 0;
 360
 361         if (!addr)
 362                 return -EFAULT;
 363
 364         spin_lock_irqsave(&vmd->cfg_lock, flags);
 365         switch (len) {
 366         case 1:
 367                 *value = readb(addr);
 368                 break;
 369         case 2:
 370                 *value = readw(addr);
 371                 break;
 372         case 4:
 373                 *value = readl(addr);
 374                 break;
 375         default:
 376                 ret = -EINVAL;
 377                 break;
 378         }
 379         spin_unlock_irqrestore(&vmd->cfg_lock, flags);
 380         return ret;
 381 }
 382
 383 /*
 384  * VMD h/w converts non-posted config writes to posted memory writes. The
 385  * read-back in this function forces the completion so it returns only after
 386  * the config space was written, as expected.
 387  */
 388 static int vmd_pci_write(struct pci_bus *bus, unsigned int devfn, int reg,
 389                          int len, u32 value)
 390 {
 391         struct vmd_dev *vmd = vmd_from_bus(bus);
 392         void __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
 393         unsigned long flags;
 394         int ret = 0;
 395
 396         if (!addr)
 397                 return -EFAULT;
 398
 399         spin_lock_irqsave(&vmd->cfg_lock, flags);
 400         switch (len) {
 401         case 1:
 402                 writeb(value, addr);
 403                 readb(addr);
 404                 break;
 405         case 2:
 406                 writew(value, addr);
 407                 readw(addr);
 408                 break;
 409         case 4:
 410                 writel(value, addr);
 411                 readl(addr);
 412                 break;
 413         default:
 414                 ret = -EINVAL;
 415                 break;
 416         }
 417         spin_unlock_irqrestore(&vmd->cfg_lock, flags);
 418         return ret;
 419 }
 420
 421 static struct pci_ops vmd_ops = {
 422         .read           = vmd_pci_read,
 423         .write          = vmd_pci_write,
 424 };
 425
 426 static void vmd_attach_resources(struct vmd_dev *vmd)
 427 {
 428         vmd->dev->resource[VMD_MEMBAR1].child = &vmd->resources[1];
 429         vmd->dev->resource[VMD_MEMBAR2].child = &vmd->resources[2];
 430 }
 431
 432 static void vmd_detach_resources(struct vmd_dev *vmd)
 433 {
 434         vmd->dev->resource[VMD_MEMBAR1].child = NULL;
 435         vmd->dev->resource[VMD_MEMBAR2].child = NULL;
 436 }
 437
 438 /*
 439  * VMD domains start at 0x10000 to not clash with ACPI _SEG domains.
 440  * Per ACPI r6.0, sec 6.5.6,  _SEG returns an integer, of which the lower
 441  * 16 bits are the PCI Segment Group (domain) number.  Other bits are
 442  * currently reserved.
 443  */
 444 static int vmd_find_free_domain(void)
 445 {
 446         int domain = 0xffff;
 447         struct pci_bus *bus = NULL;
 448
 449         while ((bus = pci_find_next_bus(bus)) != NULL)
 450                 domain = max_t(int, domain, pci_domain_nr(bus));
 451         return domain + 1;
 452 }
 453
 454 static int vmd_get_phys_offsets(struct vmd_dev *vmd, bool native_hint,
 455                                 resource_size_t *offset1,
 456                                 resource_size_t *offset2)
 457 {
 458         struct pci_dev *dev = vmd->dev;
 459         u64 phys1, phys2;
 460
 461         if (native_hint) {
 462                 u32 vmlock;
 463                 int ret;
 464
 465                 ret = pci_read_config_dword(dev, PCI_REG_VMLOCK, &vmlock);
 466                 if (ret || vmlock == ~0)
 467                         return -ENODEV;
 468
 469                 if (MB2_SHADOW_EN(vmlock)) {
 470                         void __iomem *membar2;
 471
 472                         membar2 = pci_iomap(dev, VMD_MEMBAR2, 0);
 473                         if (!membar2)
 474                                 return -ENOMEM;
 475                         phys1 = readq(membar2 + MB2_SHADOW_OFFSET);
 476                         phys2 = readq(membar2 + MB2_SHADOW_OFFSET + 8);
 477                         pci_iounmap(dev, membar2);
 478                 } else
 479                         return 0;
 480         } else {
 481                 /* Hypervisor-Emulated Vendor-Specific Capability */
 482                 int pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
 483                 u32 reg, regu;
 484
 485                 pci_read_config_dword(dev, pos + 4, &reg);
 486
 487                 /* "SHDW" */
 488                 if (pos && reg == 0x53484457) {
 489                         pci_read_config_dword(dev, pos + 8, &reg);
 490                         pci_read_config_dword(dev, pos + 12, &regu);
 491                         phys1 = (u64) regu << 32 | reg;
 492
 493                         pci_read_config_dword(dev, pos + 16, &reg);
 494                         pci_read_config_dword(dev, pos + 20, &regu);
 495                         phys2 = (u64) regu << 32 | reg;
 496                 } else
 497                         return 0;
 498         }
 499
 500         *offset1 = dev->resource[VMD_MEMBAR1].start -
 501                         (phys1 & PCI_BASE_ADDRESS_MEM_MASK);
 502         *offset2 = dev->resource[VMD_MEMBAR2].start -
 503                         (phys2 & PCI_BASE_ADDRESS_MEM_MASK);
 504
 505         return 0;
 506 }
 507
 508 static int vmd_get_bus_number_start(struct vmd_dev *vmd)
 509 {
 510         struct pci_dev *dev = vmd->dev;
 511         u16 reg;
 512
 513         pci_read_config_word(dev, PCI_REG_VMCAP, &reg);
 514         if (BUS_RESTRICT_CAP(reg)) {
 515                 pci_read_config_word(dev, PCI_REG_VMCONFIG, &reg);
 516
 517                 switch (BUS_RESTRICT_CFG(reg)) {
 518                 case 0:
 519                         vmd->busn_start = 0;
 520                         break;
 521                 case 1:
 522                         vmd->busn_start = 128;
 523                         break;
 524                 case 2:
 525                         vmd->busn_start = 224;
 526                         break;
 527                 default:
 528                         pci_err(dev, "Unknown Bus Offset Setting (%d)\n",
 529                                 BUS_RESTRICT_CFG(reg));
 530                         return -ENODEV;
 531                 }
 532         }
 533
 534         return 0;
 535 }
 536
 537 static irqreturn_t vmd_irq(int irq, void *data)
 538 {
 539         struct vmd_irq_list *irqs = data;
 540         struct vmd_irq *vmdirq;
 541         int idx;
 542
 543         idx = srcu_read_lock(&irqs->srcu);
 544         list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
 545                 generic_handle_irq(vmdirq->virq);
 546         srcu_read_unlock(&irqs->srcu, idx);
 547
 548         return IRQ_HANDLED;
 549 }
 550
 551 static int vmd_alloc_irqs(struct vmd_dev *vmd)
 552 {
 553         struct pci_dev *dev = vmd->dev;
 554         int i, err;
 555
 556         vmd->msix_count = pci_msix_vec_count(dev);
 557         if (vmd->msix_count < 0)
 558                 return -ENODEV;
 559
 560         vmd->msix_count = pci_alloc_irq_vectors(dev, vmd->first_vec + 1,
 561                                                 vmd->msix_count, PCI_IRQ_MSIX);
 562         if (vmd->msix_count < 0)
 563                 return vmd->msix_count;
 564
 565         vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
 566                                  GFP_KERNEL);
 567         if (!vmd->irqs)
 568                 return -ENOMEM;
 569
 570         for (i = 0; i < vmd->msix_count; i++) {
 571                 err = init_srcu_struct(&vmd->irqs[i].srcu);
 572                 if (err)
 573                         return err;
 574
 575                 INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
 576                 err = devm_request_irq(&dev->dev, pci_irq_vector(dev, i),
 577                                        vmd_irq, IRQF_NO_THREAD,
 578                                        "vmd", &vmd->irqs[i]);
 579                 if (err)
 580                         return err;
 581         }
 582
 583         return 0;
 584 }
 585
 586 static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
 587 {
 588         struct pci_sysdata *sd = &vmd->sysdata;
 589         struct resource *res;
 590         u32 upper_bits;
 591         unsigned long flags;
 592         LIST_HEAD(resources);
 593         resource_size_t offset[2] = {0};
 594         resource_size_t membar2_offset = 0x2000;
 595         struct pci_bus *child;
 596         int ret;
 597
 598         /*
 599          * Shadow registers may exist in certain VMD device ids which allow
 600          * guests to correctly assign host physical addresses to the root ports
 601          * and child devices. These registers will either return the host value
 602          * or 0, depending on an enable bit in the VMD device.
 603          */
 604         if (features & VMD_FEAT_HAS_MEMBAR_SHADOW) {
 605                 membar2_offset = MB2_SHADOW_OFFSET + MB2_SHADOW_SIZE;
 606                 ret = vmd_get_phys_offsets(vmd, true, &offset[0], &offset[1]);
 607                 if (ret)
 608                         return ret;
 609         } else if (features & VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP) {
 610                 ret = vmd_get_phys_offsets(vmd, false, &offset[0], &offset[1]);
 611                 if (ret)
 612                         return ret;
 613         }
 614
 615         /*
 616          * Certain VMD devices may have a root port configuration option which
 617          * limits the bus range to between 0-127, 128-255, or 224-255
 618          */
 619         if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
 620                 ret = vmd_get_bus_number_start(vmd);
 621                 if (ret)
 622                         return ret;
 623         }
 624
 625         res = &vmd->dev->resource[VMD_CFGBAR];
 626         vmd->resources[0] = (struct resource) {
 627                 .name  = "VMD CFGBAR",
 628                 .start = vmd->busn_start,
 629                 .end   = vmd->busn_start + (resource_size(res) >> 20) - 1,
 630                 .flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
 631         };
 632
 633         /*
 634          * If the window is below 4GB, clear IORESOURCE_MEM_64 so we can
 635          * put 32-bit resources in the window.
 636          *
 637          * There's no hardware reason why a 64-bit window *couldn't*
 638          * contain a 32-bit resource, but pbus_size_mem() computes the
 639          * bridge window size assuming a 64-bit window will contain no
 640          * 32-bit resources.  __pci_assign_resource() enforces that
 641          * artificial restriction to make sure everything will fit.
 642          *
 643          * The only way we could use a 64-bit non-prefetchable MEMBAR is
 644          * if its address is <4GB so that we can convert it to a 32-bit
 645          * resource.  To be visible to the host OS, all VMD endpoints must
 646          * be initially configured by platform BIOS, which includes setting
 647          * up these resources.  We can assume the device is configured
 648          * according to the platform needs.
 649          */
 650         res = &vmd->dev->resource[VMD_MEMBAR1];
 651         upper_bits = upper_32_bits(res->end);
 652         flags = res->flags & ~IORESOURCE_SIZEALIGN;
 653         if (!upper_bits)
 654                 flags &= ~IORESOURCE_MEM_64;
 655         vmd->resources[1] = (struct resource) {
 656                 .name  = "VMD MEMBAR1",
 657                 .start = res->start,
 658                 .end   = res->end,
 659                 .flags = flags,
 660                 .parent = res,
 661         };
 662
 663         res = &vmd->dev->resource[VMD_MEMBAR2];
 664         upper_bits = upper_32_bits(res->end);
 665         flags = res->flags & ~IORESOURCE_SIZEALIGN;
 666         if (!upper_bits)
 667                 flags &= ~IORESOURCE_MEM_64;
 668         vmd->resources[2] = (struct resource) {
 669                 .name  = "VMD MEMBAR2",
 670                 .start = res->start + membar2_offset,
 671                 .end   = res->end,
 672                 .flags = flags,
 673                 .parent = res,
 674         };
 675
 676         sd->vmd_dev = vmd->dev;
 677         sd->domain = vmd_find_free_domain();
 678         if (sd->domain < 0)
 679                 return sd->domain;
 680
 681         sd->node = pcibus_to_node(vmd->dev->bus);
 682
 683         ret = vmd_create_irq_domain(vmd);
 684         if (ret)
 685                 return ret;
 686
 687         /*
 688          * Override the irq domain bus token so the domain can be distinguished
 689          * from a regular PCI/MSI domain.
 690          */
 691         irq_domain_update_bus_token(vmd->irq_domain, DOMAIN_BUS_VMD_MSI);
 692
 693         pci_add_resource(&resources, &vmd->resources[0]);
 694         pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
 695         pci_add_resource_offset(&resources, &vmd->resources[2], offset[1]);
 696
 697         vmd->bus = pci_create_root_bus(&vmd->dev->dev, vmd->busn_start,
 698                                        &vmd_ops, sd, &resources);
 699         if (!vmd->bus) {
 700                 pci_free_resource_list(&resources);
 701                 vmd_remove_irq_domain(vmd);
 702                 return -ENODEV;
 703         }
 704
 705         vmd_attach_resources(vmd);
 706         if (vmd->irq_domain)
 707                 dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
 708
 709         pci_scan_child_bus(vmd->bus);
 710         pci_assign_unassigned_bus_resources(vmd->bus);
 711
 712         /*
 713          * VMD root buses are virtual and don't return true on pci_is_pcie()
 714          * and will fail pcie_bus_configure_settings() early. It can instead be
 715          * run on each of the real root ports.
 716          */
 717         list_for_each_entry(child, &vmd->bus->children, node)
 718                 pcie_bus_configure_settings(child);
 719
 720         pci_bus_add_devices(vmd->bus);
 721
 722         WARN(sysfs_create_link(&vmd->dev->dev.kobj, &vmd->bus->dev.kobj,
 723                                "domain"), "Can't create symlink to domain\n");
 724         return 0;
 725 }
 726
 727 static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
 728 {
 729         unsigned long features = (unsigned long) id->driver_data;
 730         struct vmd_dev *vmd;
 731         int err;
 732
 733         if (resource_size(&dev->resource[VMD_CFGBAR]) < (1 << 20))
 734                 return -ENOMEM;
 735
 736         vmd = devm_kzalloc(&dev->dev, sizeof(*vmd), GFP_KERNEL);
 737         if (!vmd)
 738                 return -ENOMEM;
 739
 740         vmd->dev = dev;
 741         err = pcim_enable_device(dev);
 742         if (err < 0)
 743                 return err;
 744
 745         vmd->cfgbar = pcim_iomap(dev, VMD_CFGBAR, 0);
 746         if (!vmd->cfgbar)
 747                 return -ENOMEM;
 748
 749         pci_set_master(dev);
 750         if (dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64)) &&
 751             dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)))
 752                 return -ENODEV;
 753
 754         if (features & VMD_FEAT_OFFSET_FIRST_VECTOR)
 755                 vmd->first_vec = 1;
 756
 757         err = vmd_alloc_irqs(vmd);
 758         if (err)
 759                 return err;
 760
 761         spin_lock_init(&vmd->cfg_lock);
 762         pci_set_drvdata(dev, vmd);
 763         err = vmd_enable_domain(vmd, features);
 764         if (err)
 765                 return err;
 766
 767         dev_info(&vmd->dev->dev, "Bound to PCI domain %04x\n",
 768                  vmd->sysdata.domain);
 769         return 0;
 770 }
 771
 772 static void vmd_cleanup_srcu(struct vmd_dev *vmd)
 773 {
 774         int i;
 775
 776         for (i = 0; i < vmd->msix_count; i++)
 777                 cleanup_srcu_struct(&vmd->irqs[i].srcu);
 778 }
 779
 780 static void vmd_remove(struct pci_dev *dev)
 781 {
 782         struct vmd_dev *vmd = pci_get_drvdata(dev);
 783
 784         sysfs_remove_link(&vmd->dev->dev.kobj, "domain");
 785         pci_stop_root_bus(vmd->bus);
 786         pci_remove_root_bus(vmd->bus);
 787         vmd_cleanup_srcu(vmd);
 788         vmd_detach_resources(vmd);
 789         vmd_remove_irq_domain(vmd);
 790 }
 791
 792 #ifdef CONFIG_PM_SLEEP
 793 static int vmd_suspend(struct device *dev)
 794 {
 795         struct pci_dev *pdev = to_pci_dev(dev);
 796         struct vmd_dev *vmd = pci_get_drvdata(pdev);
 797         int i;
 798
 799         for (i = 0; i < vmd->msix_count; i++)
 800                 devm_free_irq(dev, pci_irq_vector(pdev, i), &vmd->irqs[i]);
 801
 802         return 0;
 803 }
 804
 805 static int vmd_resume(struct device *dev)
 806 {
 807         struct pci_dev *pdev = to_pci_dev(dev);
 808         struct vmd_dev *vmd = pci_get_drvdata(pdev);
 809         int err, i;
 810
 811         for (i = 0; i < vmd->msix_count; i++) {
 812                 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
 813                                        vmd_irq, IRQF_NO_THREAD,
 814                                        "vmd", &vmd->irqs[i]);
 815                 if (err)
 816                         return err;
 817         }
 818
 819         return 0;
 820 }
 821 #endif
 822 static SIMPLE_DEV_PM_OPS(vmd_dev_pm_ops, vmd_suspend, vmd_resume);
 823
 824 static const struct pci_device_id vmd_ids[] = {
 825         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_201D),
 826                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP,},
 827         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_28C0),
 828                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW |
 829                                 VMD_FEAT_HAS_BUS_RESTRICTIONS,},
 830         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x467f),
 831                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
 832                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
 833                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
 834         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4c3d),
 835                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
 836                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
 837                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
 838         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_9A0B),
 839                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
 840                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
 841                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
 842         {0,}
 843 };
 844 MODULE_DEVICE_TABLE(pci, vmd_ids);
 845
 846 static struct pci_driver vmd_drv = {
 847         .name           = "vmd",
 848         .id_table       = vmd_ids,
 849         .probe          = vmd_probe,
 850         .remove         = vmd_remove,
 851         .driver         = {
 852                 .pm     = &vmd_dev_pm_ops,
 853         },
 854 };
 855 module_pci_driver(vmd_drv);
 856
 857 MODULE_AUTHOR("Intel Corporation");
 858 MODULE_LICENSE("GPL v2");
 859 MODULE_VERSION("0.6");