2 * Kernel support for the ptrace() and syscall tracing interfaces.
4 * Copyright (C) 1999-2005 Hewlett-Packard Co
6 * Copyright (C) 2006 Intel Co
7 * 2006-08-12 - IA64 Native Utrace implementation support added by
10 * Derived from the x86 and Alpha versions.
12 #include <linux/kernel.h>
13 #include <linux/sched.h>
15 #include <linux/errno.h>
16 #include <linux/ptrace.h>
17 #include <linux/user.h>
18 #include <linux/security.h>
19 #include <linux/audit.h>
20 #include <linux/signal.h>
21 #include <linux/regset.h>
22 #include <linux/elf.h>
23 #include <linux/tracehook.h>
25 #include <asm/pgtable.h>
26 #include <asm/processor.h>
27 #include <asm/ptrace_offsets.h>
29 #include <linux/uaccess.h>
30 #include <asm/unwind.h>
32 #include <asm/perfmon.h>
38 * Bits in the PSR that we allow ptrace() to change:
39 * be, up, ac, mfl, mfh (the user mask; five bits total)
40 * db (debug breakpoint fault; one bit)
41 * id (instruction debug fault disable; one bit)
42 * dd (data debug fault disable; one bit)
43 * ri (restart instruction; two bits)
44 * is (instruction set; one bit)
46 #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \
47 | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
49 #define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */
50 #define PFM_MASK MASK(38)
52 #define PTRACE_DEBUG 0
55 # define dprintk(format...) printk(format)
58 # define dprintk(format...)
61 /* Return TRUE if PT was created due to kernel-entry via a system-call. */
64 in_syscall (struct pt_regs *pt)
66 return (long) pt->cr_ifs >= 0;
70 * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
71 * bitset where bit i is set iff the NaT bit of register i is set.
74 ia64_get_scratch_nat_bits (struct pt_regs *pt, unsigned long scratch_unat)
76 # define GET_BITS(first, last, unat) \
78 unsigned long bit = ia64_unat_pos(&pt->r##first); \
79 unsigned long nbits = (last - first + 1); \
80 unsigned long mask = MASK(nbits) << first; \
83 dist = 64 + bit - first; \
86 ia64_rotr(unat, dist) & mask; \
91 * Registers that are stored consecutively in struct pt_regs
92 * can be handled in parallel. If the register order in
93 * struct_pt_regs changes, this code MUST be updated.
95 val = GET_BITS( 1, 1, scratch_unat);
96 val |= GET_BITS( 2, 3, scratch_unat);
97 val |= GET_BITS(12, 13, scratch_unat);
98 val |= GET_BITS(14, 14, scratch_unat);
99 val |= GET_BITS(15, 15, scratch_unat);
100 val |= GET_BITS( 8, 11, scratch_unat);
101 val |= GET_BITS(16, 31, scratch_unat);
108 * Set the NaT bits for the scratch registers according to NAT and
109 * return the resulting unat (assuming the scratch registers are
113 ia64_put_scratch_nat_bits (struct pt_regs *pt, unsigned long nat)
115 # define PUT_BITS(first, last, nat) \
117 unsigned long bit = ia64_unat_pos(&pt->r##first); \
118 unsigned long nbits = (last - first + 1); \
119 unsigned long mask = MASK(nbits) << first; \
122 dist = 64 + bit - first; \
124 dist = bit - first; \
125 ia64_rotl(nat & mask, dist); \
127 unsigned long scratch_unat;
130 * Registers that are stored consecutively in struct pt_regs
131 * can be handled in parallel. If the register order in
132 * struct_pt_regs changes, this code MUST be updated.
134 scratch_unat = PUT_BITS( 1, 1, nat);
135 scratch_unat |= PUT_BITS( 2, 3, nat);
136 scratch_unat |= PUT_BITS(12, 13, nat);
137 scratch_unat |= PUT_BITS(14, 14, nat);
138 scratch_unat |= PUT_BITS(15, 15, nat);
139 scratch_unat |= PUT_BITS( 8, 11, nat);
140 scratch_unat |= PUT_BITS(16, 31, nat);
147 #define IA64_MLX_TEMPLATE 0x2
148 #define IA64_MOVL_OPCODE 6
151 ia64_increment_ip (struct pt_regs *regs)
153 unsigned long w0, ri = ia64_psr(regs)->ri + 1;
158 } else if (ri == 2) {
159 get_user(w0, (char __user *) regs->cr_iip + 0);
160 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
162 * rfi'ing to slot 2 of an MLX bundle causes
163 * an illegal operation fault. We don't want
170 ia64_psr(regs)->ri = ri;
174 ia64_decrement_ip (struct pt_regs *regs)
176 unsigned long w0, ri = ia64_psr(regs)->ri - 1;
178 if (ia64_psr(regs)->ri == 0) {
181 get_user(w0, (char __user *) regs->cr_iip + 0);
182 if (((w0 >> 1) & 0xf) == IA64_MLX_TEMPLATE) {
184 * rfi'ing to slot 2 of an MLX bundle causes
185 * an illegal operation fault. We don't want
191 ia64_psr(regs)->ri = ri;
195 * This routine is used to read an rnat bits that are stored on the
196 * kernel backing store. Since, in general, the alignment of the user
197 * and kernel are different, this is not completely trivial. In
198 * essence, we need to construct the user RNAT based on up to two
199 * kernel RNAT values and/or the RNAT value saved in the child's
204 * +--------+ <-- lowest address
211 * | slot01 | > child_regs->ar_rnat
213 * | slot02 | / kernel rbs
214 * +--------+ +--------+
215 * <- child_regs->ar_bspstore | slot61 | <-- krbs
216 * +- - - - + +--------+
218 * +- - - - + +--------+
220 * +- - - - + +--------+
222 * +- - - - + +--------+
227 * | slot01 | > child_stack->ar_rnat
231 * <--- child_stack->ar_bspstore
233 * The way to think of this code is as follows: bit 0 in the user rnat
234 * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
235 * value. The kernel rnat value holding this bit is stored in
236 * variable rnat0. rnat1 is loaded with the kernel rnat value that
237 * form the upper bits of the user rnat value.
241 * o when reading the rnat "below" the first rnat slot on the kernel
242 * backing store, rnat0/rnat1 are set to 0 and the low order bits are
243 * merged in from pt->ar_rnat.
245 * o when reading the rnat "above" the last rnat slot on the kernel
246 * backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
249 get_rnat (struct task_struct *task, struct switch_stack *sw,
250 unsigned long *krbs, unsigned long *urnat_addr,
251 unsigned long *urbs_end)
253 unsigned long rnat0 = 0, rnat1 = 0, urnat = 0, *slot0_kaddr;
254 unsigned long umask = 0, mask, m;
255 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
256 long num_regs, nbits;
259 pt = task_pt_regs(task);
260 kbsp = (unsigned long *) sw->ar_bspstore;
261 ubspstore = (unsigned long *) pt->ar_bspstore;
263 if (urbs_end < urnat_addr)
264 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_end);
269 * First, figure out which bit number slot 0 in user-land maps
270 * to in the kernel rnat. Do this by figuring out how many
271 * register slots we're beyond the user's backingstore and
272 * then computing the equivalent address in kernel space.
274 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
275 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
276 shift = ia64_rse_slot_num(slot0_kaddr);
277 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
278 rnat0_kaddr = rnat1_kaddr - 64;
280 if (ubspstore + 63 > urnat_addr) {
281 /* some bits need to be merged in from pt->ar_rnat */
282 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
283 urnat = (pt->ar_rnat & umask);
290 if (rnat0_kaddr >= kbsp)
292 else if (rnat0_kaddr > krbs)
293 rnat0 = *rnat0_kaddr;
294 urnat |= (rnat0 & m) >> shift;
296 m = mask >> (63 - shift);
297 if (rnat1_kaddr >= kbsp)
299 else if (rnat1_kaddr > krbs)
300 rnat1 = *rnat1_kaddr;
301 urnat |= (rnat1 & m) << (63 - shift);
306 * The reverse of get_rnat.
309 put_rnat (struct task_struct *task, struct switch_stack *sw,
310 unsigned long *krbs, unsigned long *urnat_addr, unsigned long urnat,
311 unsigned long *urbs_end)
313 unsigned long rnat0 = 0, rnat1 = 0, *slot0_kaddr, umask = 0, mask, m;
314 unsigned long *kbsp, *ubspstore, *rnat0_kaddr, *rnat1_kaddr, shift;
315 long num_regs, nbits;
317 unsigned long cfm, *urbs_kargs;
319 pt = task_pt_regs(task);
320 kbsp = (unsigned long *) sw->ar_bspstore;
321 ubspstore = (unsigned long *) pt->ar_bspstore;
323 urbs_kargs = urbs_end;
324 if (in_syscall(pt)) {
326 * If entered via syscall, don't allow user to set rnat bits
330 urbs_kargs = ia64_rse_skip_regs(urbs_end, -(cfm & 0x7f));
333 if (urbs_kargs >= urnat_addr)
336 if ((urnat_addr - 63) >= urbs_kargs)
338 nbits = ia64_rse_num_regs(urnat_addr - 63, urbs_kargs);
343 * First, figure out which bit number slot 0 in user-land maps
344 * to in the kernel rnat. Do this by figuring out how many
345 * register slots we're beyond the user's backingstore and
346 * then computing the equivalent address in kernel space.
348 num_regs = ia64_rse_num_regs(ubspstore, urnat_addr + 1);
349 slot0_kaddr = ia64_rse_skip_regs(krbs, num_regs);
350 shift = ia64_rse_slot_num(slot0_kaddr);
351 rnat1_kaddr = ia64_rse_rnat_addr(slot0_kaddr);
352 rnat0_kaddr = rnat1_kaddr - 64;
354 if (ubspstore + 63 > urnat_addr) {
355 /* some bits need to be place in pt->ar_rnat: */
356 umask = MASK(ia64_rse_slot_num(ubspstore)) & mask;
357 pt->ar_rnat = (pt->ar_rnat & ~umask) | (urnat & umask);
363 * Note: Section 11.1 of the EAS guarantees that bit 63 of an
364 * rnat slot is ignored. so we don't have to clear it here.
366 rnat0 = (urnat << shift);
368 if (rnat0_kaddr >= kbsp)
369 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat0 & m);
370 else if (rnat0_kaddr > krbs)
371 *rnat0_kaddr = ((*rnat0_kaddr & ~m) | (rnat0 & m));
373 rnat1 = (urnat >> (63 - shift));
374 m = mask >> (63 - shift);
375 if (rnat1_kaddr >= kbsp)
376 sw->ar_rnat = (sw->ar_rnat & ~m) | (rnat1 & m);
377 else if (rnat1_kaddr > krbs)
378 *rnat1_kaddr = ((*rnat1_kaddr & ~m) | (rnat1 & m));
382 on_kernel_rbs (unsigned long addr, unsigned long bspstore,
383 unsigned long urbs_end)
385 unsigned long *rnat_addr = ia64_rse_rnat_addr((unsigned long *)
387 return (addr >= bspstore && addr <= (unsigned long) rnat_addr);
391 * Read a word from the user-level backing store of task CHILD. ADDR
392 * is the user-level address to read the word from, VAL a pointer to
393 * the return value, and USER_BSP gives the end of the user-level
394 * backing store (i.e., it's the address that would be in ar.bsp after
395 * the user executed a "cover" instruction).
397 * This routine takes care of accessing the kernel register backing
398 * store for those registers that got spilled there. It also takes
399 * care of calculating the appropriate RNaT collection words.
402 ia64_peek (struct task_struct *child, struct switch_stack *child_stack,
403 unsigned long user_rbs_end, unsigned long addr, long *val)
405 unsigned long *bspstore, *krbs, regnum, *laddr, *urbs_end, *rnat_addr;
406 struct pt_regs *child_regs;
410 urbs_end = (long *) user_rbs_end;
411 laddr = (unsigned long *) addr;
412 child_regs = task_pt_regs(child);
413 bspstore = (unsigned long *) child_regs->ar_bspstore;
414 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
415 if (on_kernel_rbs(addr, (unsigned long) bspstore,
416 (unsigned long) urbs_end))
419 * Attempt to read the RBS in an area that's actually
420 * on the kernel RBS => read the corresponding bits in
423 rnat_addr = ia64_rse_rnat_addr(laddr);
424 ret = get_rnat(child, child_stack, krbs, rnat_addr, urbs_end);
426 if (laddr == rnat_addr) {
427 /* return NaT collection word itself */
432 if (((1UL << ia64_rse_slot_num(laddr)) & ret) != 0) {
434 * It is implementation dependent whether the
435 * data portion of a NaT value gets saved on a
436 * st8.spill or RSE spill (e.g., see EAS 2.6,
437 * 4.4.4.6 Register Spill and Fill). To get
438 * consistent behavior across all possible
439 * IA-64 implementations, we return zero in
446 if (laddr < urbs_end) {
448 * The desired word is on the kernel RBS and
451 regnum = ia64_rse_num_regs(bspstore, laddr);
452 *val = *ia64_rse_skip_regs(krbs, regnum);
456 copied = access_process_vm(child, addr, &ret, sizeof(ret), FOLL_FORCE);
457 if (copied != sizeof(ret))
464 ia64_poke (struct task_struct *child, struct switch_stack *child_stack,
465 unsigned long user_rbs_end, unsigned long addr, long val)
467 unsigned long *bspstore, *krbs, regnum, *laddr;
468 unsigned long *urbs_end = (long *) user_rbs_end;
469 struct pt_regs *child_regs;
471 laddr = (unsigned long *) addr;
472 child_regs = task_pt_regs(child);
473 bspstore = (unsigned long *) child_regs->ar_bspstore;
474 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
475 if (on_kernel_rbs(addr, (unsigned long) bspstore,
476 (unsigned long) urbs_end))
479 * Attempt to write the RBS in an area that's actually
480 * on the kernel RBS => write the corresponding bits
483 if (ia64_rse_is_rnat_slot(laddr))
484 put_rnat(child, child_stack, krbs, laddr, val,
487 if (laddr < urbs_end) {
488 regnum = ia64_rse_num_regs(bspstore, laddr);
489 *ia64_rse_skip_regs(krbs, regnum) = val;
492 } else if (access_process_vm(child, addr, &val, sizeof(val),
493 FOLL_FORCE | FOLL_WRITE)
500 * Calculate the address of the end of the user-level register backing
501 * store. This is the address that would have been stored in ar.bsp
502 * if the user had executed a "cover" instruction right before
503 * entering the kernel. If CFMP is not NULL, it is used to return the
504 * "current frame mask" that was active at the time the kernel was
508 ia64_get_user_rbs_end (struct task_struct *child, struct pt_regs *pt,
511 unsigned long *krbs, *bspstore, cfm = pt->cr_ifs;
514 krbs = (unsigned long *) child + IA64_RBS_OFFSET/8;
515 bspstore = (unsigned long *) pt->ar_bspstore;
516 ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
519 ndirty += (cfm & 0x7f);
521 cfm &= ~(1UL << 63); /* clear valid bit */
525 return (unsigned long) ia64_rse_skip_regs(bspstore, ndirty);
529 * Synchronize (i.e, write) the RSE backing store living in kernel
530 * space to the VM of the CHILD task. SW and PT are the pointers to
531 * the switch_stack and pt_regs structures, respectively.
532 * USER_RBS_END is the user-level address at which the backing store
536 ia64_sync_user_rbs (struct task_struct *child, struct switch_stack *sw,
537 unsigned long user_rbs_start, unsigned long user_rbs_end)
539 unsigned long addr, val;
542 /* now copy word for word from kernel rbs to user rbs: */
543 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
544 ret = ia64_peek(child, sw, user_rbs_end, addr, &val);
547 if (access_process_vm(child, addr, &val, sizeof(val),
548 FOLL_FORCE | FOLL_WRITE)
556 ia64_sync_kernel_rbs (struct task_struct *child, struct switch_stack *sw,
557 unsigned long user_rbs_start, unsigned long user_rbs_end)
559 unsigned long addr, val;
562 /* now copy word for word from user rbs to kernel rbs: */
563 for (addr = user_rbs_start; addr < user_rbs_end; addr += 8) {
564 if (access_process_vm(child, addr, &val, sizeof(val),
569 ret = ia64_poke(child, sw, user_rbs_end, addr, val);
576 typedef long (*syncfunc_t)(struct task_struct *, struct switch_stack *,
577 unsigned long, unsigned long);
579 static void do_sync_rbs(struct unw_frame_info *info, void *arg)
582 unsigned long urbs_end;
585 if (unw_unwind_to_user(info) < 0)
587 pt = task_pt_regs(info->task);
588 urbs_end = ia64_get_user_rbs_end(info->task, pt, NULL);
590 fn(info->task, info->sw, pt->ar_bspstore, urbs_end);
594 * when a thread is stopped (ptraced), debugger might change thread's user
595 * stack (change memory directly), and we must avoid the RSE stored in kernel
596 * to override user stack (user space's RSE is newer than kernel's in the
597 * case). To workaround the issue, we copy kernel RSE to user RSE before the
598 * task is stopped, so user RSE has updated data. we then copy user RSE to
599 * kernel after the task is resummed from traced stop and kernel will use the
600 * newer RSE to return to user. TIF_RESTORE_RSE is the flag to indicate we need
601 * synchronize user RSE to kernel.
603 void ia64_ptrace_stop(void)
605 if (test_and_set_tsk_thread_flag(current, TIF_RESTORE_RSE))
607 set_notify_resume(current);
608 unw_init_running(do_sync_rbs, ia64_sync_user_rbs);
612 * This is called to read back the register backing store.
614 void ia64_sync_krbs(void)
616 clear_tsk_thread_flag(current, TIF_RESTORE_RSE);
618 unw_init_running(do_sync_rbs, ia64_sync_kernel_rbs);
622 * After PTRACE_ATTACH, a thread's register backing store area in user
623 * space is assumed to contain correct data whenever the thread is
624 * stopped. arch_ptrace_stop takes care of this on tracing stops.
625 * But if the child was already stopped for job control when we attach
626 * to it, then it might not ever get into ptrace_stop by the time we
627 * want to examine the user memory containing the RBS.
630 ptrace_attach_sync_user_rbs (struct task_struct *child)
633 struct unw_frame_info info;
636 * If the child is in TASK_STOPPED, we need to change that to
637 * TASK_TRACED momentarily while we operate on it. This ensures
638 * that the child won't be woken up and return to user mode while
639 * we are doing the sync. (It can only be woken up for SIGKILL.)
642 read_lock(&tasklist_lock);
643 if (child->sighand) {
644 spin_lock_irq(&child->sighand->siglock);
645 if (child->state == TASK_STOPPED &&
646 !test_and_set_tsk_thread_flag(child, TIF_RESTORE_RSE)) {
647 set_notify_resume(child);
649 child->state = TASK_TRACED;
652 spin_unlock_irq(&child->sighand->siglock);
654 read_unlock(&tasklist_lock);
659 unw_init_from_blocked_task(&info, child);
660 do_sync_rbs(&info, ia64_sync_user_rbs);
663 * Now move the child back into TASK_STOPPED if it should be in a
664 * job control stop, so that SIGCONT can be used to wake it up.
666 read_lock(&tasklist_lock);
667 if (child->sighand) {
668 spin_lock_irq(&child->sighand->siglock);
669 if (child->state == TASK_TRACED &&
670 (child->signal->flags & SIGNAL_STOP_STOPPED)) {
671 child->state = TASK_STOPPED;
673 spin_unlock_irq(&child->sighand->siglock);
675 read_unlock(&tasklist_lock);
679 * Write f32-f127 back to task->thread.fph if it has been modified.
682 ia64_flush_fph (struct task_struct *task)
684 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
687 * Prevent migrating this task while
688 * we're fiddling with the FPU state
691 if (ia64_is_local_fpu_owner(task) && psr->mfh) {
693 task->thread.flags |= IA64_THREAD_FPH_VALID;
694 ia64_save_fpu(&task->thread.fph[0]);
700 * Sync the fph state of the task so that it can be manipulated
701 * through thread.fph. If necessary, f32-f127 are written back to
702 * thread.fph or, if the fph state hasn't been used before, thread.fph
703 * is cleared to zeroes. Also, access to f32-f127 is disabled to
704 * ensure that the task picks up the state from thread.fph when it
708 ia64_sync_fph (struct task_struct *task)
710 struct ia64_psr *psr = ia64_psr(task_pt_regs(task));
712 ia64_flush_fph(task);
713 if (!(task->thread.flags & IA64_THREAD_FPH_VALID)) {
714 task->thread.flags |= IA64_THREAD_FPH_VALID;
715 memset(&task->thread.fph, 0, sizeof(task->thread.fph));
722 * Change the machine-state of CHILD such that it will return via the normal
723 * kernel exit-path, rather than the syscall-exit path.
726 convert_to_non_syscall (struct task_struct *child, struct pt_regs *pt,
729 struct unw_frame_info info, prev_info;
730 unsigned long ip, sp, pr;
732 unw_init_from_blocked_task(&info, child);
735 if (unw_unwind(&info) < 0)
738 unw_get_sp(&info, &sp);
739 if ((long)((unsigned long)child + IA64_STK_OFFSET - sp)
740 < IA64_PT_REGS_SIZE) {
741 dprintk("ptrace.%s: ran off the top of the kernel "
742 "stack\n", __func__);
745 if (unw_get_pr (&prev_info, &pr) < 0) {
746 unw_get_rp(&prev_info, &ip);
747 dprintk("ptrace.%s: failed to read "
748 "predicate register (ip=0x%lx)\n",
752 if (unw_is_intr_frame(&info)
753 && (pr & (1UL << PRED_USER_STACK)))
758 * Note: at the time of this call, the target task is blocked
759 * in notify_resume_user() and by clearling PRED_LEAVE_SYSCALL
760 * (aka, "pLvSys") we redirect execution from
761 * .work_pending_syscall_end to .work_processed_kernel.
763 unw_get_pr(&prev_info, &pr);
764 pr &= ~((1UL << PRED_SYSCALL) | (1UL << PRED_LEAVE_SYSCALL));
765 pr |= (1UL << PRED_NON_SYSCALL);
766 unw_set_pr(&prev_info, pr);
768 pt->cr_ifs = (1UL << 63) | cfm;
770 * Clear the memory that is NOT written on syscall-entry to
771 * ensure we do not leak kernel-state to user when execution
777 memset(&pt->r16, 0, 16*8); /* clear r16-r31 */
778 memset(&pt->f6, 0, 6*16); /* clear f6-f11 */
786 access_nat_bits (struct task_struct *child, struct pt_regs *pt,
787 struct unw_frame_info *info,
788 unsigned long *data, int write_access)
790 unsigned long regnum, nat_bits, scratch_unat, dummy = 0;
795 scratch_unat = ia64_put_scratch_nat_bits(pt, nat_bits);
796 if (unw_set_ar(info, UNW_AR_UNAT, scratch_unat) < 0) {
797 dprintk("ptrace: failed to set ar.unat\n");
800 for (regnum = 4; regnum <= 7; ++regnum) {
801 unw_get_gr(info, regnum, &dummy, &nat);
802 unw_set_gr(info, regnum, dummy,
803 (nat_bits >> regnum) & 1);
806 if (unw_get_ar(info, UNW_AR_UNAT, &scratch_unat) < 0) {
807 dprintk("ptrace: failed to read ar.unat\n");
810 nat_bits = ia64_get_scratch_nat_bits(pt, scratch_unat);
811 for (regnum = 4; regnum <= 7; ++regnum) {
812 unw_get_gr(info, regnum, &dummy, &nat);
813 nat_bits |= (nat != 0) << regnum;
821 access_uarea (struct task_struct *child, unsigned long addr,
822 unsigned long *data, int write_access);
825 ptrace_getregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
827 unsigned long psr, ec, lc, rnat, bsp, cfm, nat_bits, val;
828 struct unw_frame_info info;
829 struct ia64_fpreg fpval;
830 struct switch_stack *sw;
832 long ret, retval = 0;
836 if (!access_ok(VERIFY_WRITE, ppr, sizeof(struct pt_all_user_regs)))
839 pt = task_pt_regs(child);
840 sw = (struct switch_stack *) (child->thread.ksp + 16);
841 unw_init_from_blocked_task(&info, child);
842 if (unw_unwind_to_user(&info) < 0) {
846 if (((unsigned long) ppr & 0x7) != 0) {
847 dprintk("ptrace:unaligned register address %p\n", ppr);
851 if (access_uarea(child, PT_CR_IPSR, &psr, 0) < 0
852 || access_uarea(child, PT_AR_EC, &ec, 0) < 0
853 || access_uarea(child, PT_AR_LC, &lc, 0) < 0
854 || access_uarea(child, PT_AR_RNAT, &rnat, 0) < 0
855 || access_uarea(child, PT_AR_BSP, &bsp, 0) < 0
856 || access_uarea(child, PT_CFM, &cfm, 0)
857 || access_uarea(child, PT_NAT_BITS, &nat_bits, 0))
862 retval |= __put_user(pt->cr_iip, &ppr->cr_iip);
863 retval |= __put_user(psr, &ppr->cr_ipsr);
867 retval |= __put_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
868 retval |= __put_user(pt->ar_rsc, &ppr->ar[PT_AUR_RSC]);
869 retval |= __put_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
870 retval |= __put_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
871 retval |= __put_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
872 retval |= __put_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
874 retval |= __put_user(ec, &ppr->ar[PT_AUR_EC]);
875 retval |= __put_user(lc, &ppr->ar[PT_AUR_LC]);
876 retval |= __put_user(rnat, &ppr->ar[PT_AUR_RNAT]);
877 retval |= __put_user(bsp, &ppr->ar[PT_AUR_BSP]);
878 retval |= __put_user(cfm, &ppr->cfm);
882 retval |= __copy_to_user(&ppr->gr[1], &pt->r1, sizeof(long));
883 retval |= __copy_to_user(&ppr->gr[2], &pt->r2, sizeof(long) *2);
887 for (i = 4; i < 8; i++) {
888 if (unw_access_gr(&info, i, &val, &nat, 0) < 0)
890 retval |= __put_user(val, &ppr->gr[i]);
895 retval |= __copy_to_user(&ppr->gr[8], &pt->r8, sizeof(long) * 4);
899 retval |= __copy_to_user(&ppr->gr[12], &pt->r12, sizeof(long) * 2);
900 retval |= __copy_to_user(&ppr->gr[14], &pt->r14, sizeof(long));
901 retval |= __copy_to_user(&ppr->gr[15], &pt->r15, sizeof(long));
905 retval |= __copy_to_user(&ppr->gr[16], &pt->r16, sizeof(long) * 16);
909 retval |= __put_user(pt->b0, &ppr->br[0]);
913 for (i = 1; i < 6; i++) {
914 if (unw_access_br(&info, i, &val, 0) < 0)
916 __put_user(val, &ppr->br[i]);
921 retval |= __put_user(pt->b6, &ppr->br[6]);
922 retval |= __put_user(pt->b7, &ppr->br[7]);
926 for (i = 2; i < 6; i++) {
927 if (unw_get_fr(&info, i, &fpval) < 0)
929 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
934 retval |= __copy_to_user(&ppr->fr[6], &pt->f6,
935 sizeof(struct ia64_fpreg) * 6);
937 /* fp scratch regs(12-15) */
939 retval |= __copy_to_user(&ppr->fr[12], &sw->f12,
940 sizeof(struct ia64_fpreg) * 4);
944 for (i = 16; i < 32; i++) {
945 if (unw_get_fr(&info, i, &fpval) < 0)
947 retval |= __copy_to_user(&ppr->fr[i], &fpval, sizeof (fpval));
952 ia64_flush_fph(child);
953 retval |= __copy_to_user(&ppr->fr[32], &child->thread.fph,
954 sizeof(ppr->fr[32]) * 96);
958 retval |= __put_user(pt->pr, &ppr->pr);
962 retval |= __put_user(nat_bits, &ppr->nat);
964 ret = retval ? -EIO : 0;
969 ptrace_setregs (struct task_struct *child, struct pt_all_user_regs __user *ppr)
971 unsigned long psr, rsc, ec, lc, rnat, bsp, cfm, nat_bits, val = 0;
972 struct unw_frame_info info;
973 struct switch_stack *sw;
974 struct ia64_fpreg fpval;
976 long ret, retval = 0;
979 memset(&fpval, 0, sizeof(fpval));
981 if (!access_ok(VERIFY_READ, ppr, sizeof(struct pt_all_user_regs)))
984 pt = task_pt_regs(child);
985 sw = (struct switch_stack *) (child->thread.ksp + 16);
986 unw_init_from_blocked_task(&info, child);
987 if (unw_unwind_to_user(&info) < 0) {
991 if (((unsigned long) ppr & 0x7) != 0) {
992 dprintk("ptrace:unaligned register address %p\n", ppr);
998 retval |= __get_user(pt->cr_iip, &ppr->cr_iip);
999 retval |= __get_user(psr, &ppr->cr_ipsr);
1003 retval |= __get_user(pt->ar_pfs, &ppr->ar[PT_AUR_PFS]);
1004 retval |= __get_user(rsc, &ppr->ar[PT_AUR_RSC]);
1005 retval |= __get_user(pt->ar_bspstore, &ppr->ar[PT_AUR_BSPSTORE]);
1006 retval |= __get_user(pt->ar_unat, &ppr->ar[PT_AUR_UNAT]);
1007 retval |= __get_user(pt->ar_ccv, &ppr->ar[PT_AUR_CCV]);
1008 retval |= __get_user(pt->ar_fpsr, &ppr->ar[PT_AUR_FPSR]);
1010 retval |= __get_user(ec, &ppr->ar[PT_AUR_EC]);
1011 retval |= __get_user(lc, &ppr->ar[PT_AUR_LC]);
1012 retval |= __get_user(rnat, &ppr->ar[PT_AUR_RNAT]);
1013 retval |= __get_user(bsp, &ppr->ar[PT_AUR_BSP]);
1014 retval |= __get_user(cfm, &ppr->cfm);
1018 retval |= __copy_from_user(&pt->r1, &ppr->gr[1], sizeof(long));
1019 retval |= __copy_from_user(&pt->r2, &ppr->gr[2], sizeof(long) * 2);
1023 for (i = 4; i < 8; i++) {
1024 retval |= __get_user(val, &ppr->gr[i]);
1025 /* NaT bit will be set via PT_NAT_BITS: */
1026 if (unw_set_gr(&info, i, val, 0) < 0)
1032 retval |= __copy_from_user(&pt->r8, &ppr->gr[8], sizeof(long) * 4);
1036 retval |= __copy_from_user(&pt->r12, &ppr->gr[12], sizeof(long) * 2);
1037 retval |= __copy_from_user(&pt->r14, &ppr->gr[14], sizeof(long));
1038 retval |= __copy_from_user(&pt->r15, &ppr->gr[15], sizeof(long));
1042 retval |= __copy_from_user(&pt->r16, &ppr->gr[16], sizeof(long) * 16);
1046 retval |= __get_user(pt->b0, &ppr->br[0]);
1050 for (i = 1; i < 6; i++) {
1051 retval |= __get_user(val, &ppr->br[i]);
1052 unw_set_br(&info, i, val);
1057 retval |= __get_user(pt->b6, &ppr->br[6]);
1058 retval |= __get_user(pt->b7, &ppr->br[7]);
1062 for (i = 2; i < 6; i++) {
1063 retval |= __copy_from_user(&fpval, &ppr->fr[i], sizeof(fpval));
1064 if (unw_set_fr(&info, i, fpval) < 0)
1070 retval |= __copy_from_user(&pt->f6, &ppr->fr[6],
1071 sizeof(ppr->fr[6]) * 6);
1073 /* fp scratch regs(12-15) */
1075 retval |= __copy_from_user(&sw->f12, &ppr->fr[12],
1076 sizeof(ppr->fr[12]) * 4);
1080 for (i = 16; i < 32; i++) {
1081 retval |= __copy_from_user(&fpval, &ppr->fr[i],
1083 if (unw_set_fr(&info, i, fpval) < 0)
1089 ia64_sync_fph(child);
1090 retval |= __copy_from_user(&child->thread.fph, &ppr->fr[32],
1091 sizeof(ppr->fr[32]) * 96);
1095 retval |= __get_user(pt->pr, &ppr->pr);
1099 retval |= __get_user(nat_bits, &ppr->nat);
1101 retval |= access_uarea(child, PT_CR_IPSR, &psr, 1);
1102 retval |= access_uarea(child, PT_AR_RSC, &rsc, 1);
1103 retval |= access_uarea(child, PT_AR_EC, &ec, 1);
1104 retval |= access_uarea(child, PT_AR_LC, &lc, 1);
1105 retval |= access_uarea(child, PT_AR_RNAT, &rnat, 1);
1106 retval |= access_uarea(child, PT_AR_BSP, &bsp, 1);
1107 retval |= access_uarea(child, PT_CFM, &cfm, 1);
1108 retval |= access_uarea(child, PT_NAT_BITS, &nat_bits, 1);
1110 ret = retval ? -EIO : 0;
1115 user_enable_single_step (struct task_struct *child)
1117 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1119 set_tsk_thread_flag(child, TIF_SINGLESTEP);
1124 user_enable_block_step (struct task_struct *child)
1126 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1128 set_tsk_thread_flag(child, TIF_SINGLESTEP);
1133 user_disable_single_step (struct task_struct *child)
1135 struct ia64_psr *child_psr = ia64_psr(task_pt_regs(child));
1137 /* make sure the single step/taken-branch trap bits are not set: */
1138 clear_tsk_thread_flag(child, TIF_SINGLESTEP);
1144 * Called by kernel/ptrace.c when detaching..
1146 * Make sure the single step bit is not set.
1149 ptrace_disable (struct task_struct *child)
1151 user_disable_single_step(child);
1155 arch_ptrace (struct task_struct *child, long request,
1156 unsigned long addr, unsigned long data)
1159 case PTRACE_PEEKTEXT:
1160 case PTRACE_PEEKDATA:
1161 /* read word at location addr */
1162 if (ptrace_access_vm(child, addr, &data, sizeof(data),
1166 /* ensure return value is not mistaken for error code */
1167 force_successful_syscall_return();
1170 /* PTRACE_POKETEXT and PTRACE_POKEDATA is handled
1171 * by the generic ptrace_request().
1174 case PTRACE_PEEKUSR:
1175 /* read the word at addr in the USER area */
1176 if (access_uarea(child, addr, &data, 0) < 0)
1178 /* ensure return value is not mistaken for error code */
1179 force_successful_syscall_return();
1182 case PTRACE_POKEUSR:
1183 /* write the word at addr in the USER area */
1184 if (access_uarea(child, addr, &data, 1) < 0)
1188 case PTRACE_OLD_GETSIGINFO:
1189 /* for backwards-compatibility */
1190 return ptrace_request(child, PTRACE_GETSIGINFO, addr, data);
1192 case PTRACE_OLD_SETSIGINFO:
1193 /* for backwards-compatibility */
1194 return ptrace_request(child, PTRACE_SETSIGINFO, addr, data);
1196 case PTRACE_GETREGS:
1197 return ptrace_getregs(child,
1198 (struct pt_all_user_regs __user *) data);
1200 case PTRACE_SETREGS:
1201 return ptrace_setregs(child,
1202 (struct pt_all_user_regs __user *) data);
1205 return ptrace_request(child, request, addr, data);
1210 /* "asmlinkage" so the input arguments are preserved... */
1213 syscall_trace_enter (long arg0, long arg1, long arg2, long arg3,
1214 long arg4, long arg5, long arg6, long arg7,
1215 struct pt_regs regs)
1217 if (test_thread_flag(TIF_SYSCALL_TRACE))
1218 if (tracehook_report_syscall_entry(®s))
1221 /* copy user rbs to kernel rbs */
1222 if (test_thread_flag(TIF_RESTORE_RSE))
1226 audit_syscall_entry(regs.r15, arg0, arg1, arg2, arg3);
1231 /* "asmlinkage" so the input arguments are preserved... */
1234 syscall_trace_leave (long arg0, long arg1, long arg2, long arg3,
1235 long arg4, long arg5, long arg6, long arg7,
1236 struct pt_regs regs)
1240 audit_syscall_exit(®s);
1242 step = test_thread_flag(TIF_SINGLESTEP);
1243 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
1244 tracehook_report_syscall_exit(®s, step);
1246 /* copy user rbs to kernel rbs */
1247 if (test_thread_flag(TIF_RESTORE_RSE))
1251 /* Utrace implementation starts here */
1259 const void __user *ubuf;
1262 struct regset_getset {
1263 struct task_struct *target;
1264 const struct user_regset *regset;
1266 struct regset_get get;
1267 struct regset_set set;
1275 access_elf_gpreg(struct task_struct *target, struct unw_frame_info *info,
1276 unsigned long addr, unsigned long *data, int write_access)
1279 unsigned long *ptr = NULL;
1283 pt = task_pt_regs(target);
1285 case ELF_GR_OFFSET(1):
1288 case ELF_GR_OFFSET(2):
1289 case ELF_GR_OFFSET(3):
1290 ptr = (void *)&pt->r2 + (addr - ELF_GR_OFFSET(2));
1292 case ELF_GR_OFFSET(4) ... ELF_GR_OFFSET(7):
1294 /* read NaT bit first: */
1295 unsigned long dummy;
1297 ret = unw_get_gr(info, addr/8, &dummy, &nat);
1301 return unw_access_gr(info, addr/8, data, &nat, write_access);
1302 case ELF_GR_OFFSET(8) ... ELF_GR_OFFSET(11):
1303 ptr = (void *)&pt->r8 + addr - ELF_GR_OFFSET(8);
1305 case ELF_GR_OFFSET(12):
1306 case ELF_GR_OFFSET(13):
1307 ptr = (void *)&pt->r12 + addr - ELF_GR_OFFSET(12);
1309 case ELF_GR_OFFSET(14):
1312 case ELF_GR_OFFSET(15):
1323 access_elf_breg(struct task_struct *target, struct unw_frame_info *info,
1324 unsigned long addr, unsigned long *data, int write_access)
1327 unsigned long *ptr = NULL;
1329 pt = task_pt_regs(target);
1331 case ELF_BR_OFFSET(0):
1334 case ELF_BR_OFFSET(1) ... ELF_BR_OFFSET(5):
1335 return unw_access_br(info, (addr - ELF_BR_OFFSET(0))/8,
1336 data, write_access);
1337 case ELF_BR_OFFSET(6):
1340 case ELF_BR_OFFSET(7):
1351 access_elf_areg(struct task_struct *target, struct unw_frame_info *info,
1352 unsigned long addr, unsigned long *data, int write_access)
1355 unsigned long cfm, urbs_end;
1356 unsigned long *ptr = NULL;
1358 pt = task_pt_regs(target);
1359 if (addr >= ELF_AR_RSC_OFFSET && addr <= ELF_AR_SSD_OFFSET) {
1361 case ELF_AR_RSC_OFFSET:
1364 pt->ar_rsc = *data | (3 << 2);
1368 case ELF_AR_BSP_OFFSET:
1370 * By convention, we use PT_AR_BSP to refer to
1371 * the end of the user-level backing store.
1372 * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
1373 * to get the real value of ar.bsp at the time
1374 * the kernel was entered.
1376 * Furthermore, when changing the contents of
1377 * PT_AR_BSP (or PT_CFM) while the task is
1378 * blocked in a system call, convert the state
1379 * so that the non-system-call exit
1380 * path is used. This ensures that the proper
1381 * state will be picked up when resuming
1382 * execution. However, it *also* means that
1383 * once we write PT_AR_BSP/PT_CFM, it won't be
1384 * possible to modify the syscall arguments of
1385 * the pending system call any longer. This
1386 * shouldn't be an issue because modifying
1387 * PT_AR_BSP/PT_CFM generally implies that
1388 * we're either abandoning the pending system
1389 * call or that we defer it's re-execution
1390 * (e.g., due to GDB doing an inferior
1393 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1395 if (*data != urbs_end) {
1397 convert_to_non_syscall(target,
1401 * Simulate user-level write
1405 pt->ar_bspstore = *data;
1410 case ELF_AR_BSPSTORE_OFFSET:
1411 ptr = &pt->ar_bspstore;
1413 case ELF_AR_RNAT_OFFSET:
1416 case ELF_AR_CCV_OFFSET:
1419 case ELF_AR_UNAT_OFFSET:
1422 case ELF_AR_FPSR_OFFSET:
1425 case ELF_AR_PFS_OFFSET:
1428 case ELF_AR_LC_OFFSET:
1429 return unw_access_ar(info, UNW_AR_LC, data,
1431 case ELF_AR_EC_OFFSET:
1432 return unw_access_ar(info, UNW_AR_EC, data,
1434 case ELF_AR_CSD_OFFSET:
1437 case ELF_AR_SSD_OFFSET:
1440 } else if (addr >= ELF_CR_IIP_OFFSET && addr <= ELF_CR_IPSR_OFFSET) {
1442 case ELF_CR_IIP_OFFSET:
1445 case ELF_CFM_OFFSET:
1446 urbs_end = ia64_get_user_rbs_end(target, pt, &cfm);
1448 if (((cfm ^ *data) & PFM_MASK) != 0) {
1450 convert_to_non_syscall(target,
1453 pt->cr_ifs = ((pt->cr_ifs & ~PFM_MASK)
1454 | (*data & PFM_MASK));
1459 case ELF_CR_IPSR_OFFSET:
1461 unsigned long tmp = *data;
1462 /* psr.ri==3 is a reserved value: SDM 2:25 */
1463 if ((tmp & IA64_PSR_RI) == IA64_PSR_RI)
1464 tmp &= ~IA64_PSR_RI;
1465 pt->cr_ipsr = ((tmp & IPSR_MASK)
1466 | (pt->cr_ipsr & ~IPSR_MASK));
1468 *data = (pt->cr_ipsr & IPSR_MASK);
1471 } else if (addr == ELF_NAT_OFFSET)
1472 return access_nat_bits(target, pt, info,
1473 data, write_access);
1474 else if (addr == ELF_PR_OFFSET)
1488 access_elf_reg(struct task_struct *target, struct unw_frame_info *info,
1489 unsigned long addr, unsigned long *data, int write_access)
1491 if (addr >= ELF_GR_OFFSET(1) && addr <= ELF_GR_OFFSET(15))
1492 return access_elf_gpreg(target, info, addr, data, write_access);
1493 else if (addr >= ELF_BR_OFFSET(0) && addr <= ELF_BR_OFFSET(7))
1494 return access_elf_breg(target, info, addr, data, write_access);
1496 return access_elf_areg(target, info, addr, data, write_access);
1499 void do_gpregs_get(struct unw_frame_info *info, void *arg)
1502 struct regset_getset *dst = arg;
1504 unsigned int i, index, min_copy;
1506 if (unw_unwind_to_user(info) < 0)
1512 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
1513 * predicate registers (p0-p63)
1516 * ar.rsc ar.bsp ar.bspstore ar.rnat
1517 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
1522 if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(1)) {
1523 dst->ret = user_regset_copyout_zero(&dst->pos, &dst->count,
1526 0, ELF_GR_OFFSET(1));
1527 if (dst->ret || dst->count == 0)
1532 if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(16)) {
1533 index = (dst->pos - ELF_GR_OFFSET(1)) / sizeof(elf_greg_t);
1534 min_copy = ELF_GR_OFFSET(16) > (dst->pos + dst->count) ?
1535 (dst->pos + dst->count) : ELF_GR_OFFSET(16);
1536 for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t),
1538 if (access_elf_reg(dst->target, info, i,
1539 &tmp[index], 0) < 0) {
1543 dst->ret = user_regset_copyout(&dst->pos, &dst->count,
1544 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1545 ELF_GR_OFFSET(1), ELF_GR_OFFSET(16));
1546 if (dst->ret || dst->count == 0)
1551 if (dst->count > 0 && dst->pos < ELF_NAT_OFFSET) {
1552 pt = task_pt_regs(dst->target);
1553 dst->ret = user_regset_copyout(&dst->pos, &dst->count,
1554 &dst->u.get.kbuf, &dst->u.get.ubuf, &pt->r16,
1555 ELF_GR_OFFSET(16), ELF_NAT_OFFSET);
1556 if (dst->ret || dst->count == 0)
1560 /* nat, pr, b0 - b7 */
1561 if (dst->count > 0 && dst->pos < ELF_CR_IIP_OFFSET) {
1562 index = (dst->pos - ELF_NAT_OFFSET) / sizeof(elf_greg_t);
1563 min_copy = ELF_CR_IIP_OFFSET > (dst->pos + dst->count) ?
1564 (dst->pos + dst->count) : ELF_CR_IIP_OFFSET;
1565 for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t),
1567 if (access_elf_reg(dst->target, info, i,
1568 &tmp[index], 0) < 0) {
1572 dst->ret = user_regset_copyout(&dst->pos, &dst->count,
1573 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1574 ELF_NAT_OFFSET, ELF_CR_IIP_OFFSET);
1575 if (dst->ret || dst->count == 0)
1579 /* ip cfm psr ar.rsc ar.bsp ar.bspstore ar.rnat
1580 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
1582 if (dst->count > 0 && dst->pos < (ELF_AR_END_OFFSET)) {
1583 index = (dst->pos - ELF_CR_IIP_OFFSET) / sizeof(elf_greg_t);
1584 min_copy = ELF_AR_END_OFFSET > (dst->pos + dst->count) ?
1585 (dst->pos + dst->count) : ELF_AR_END_OFFSET;
1586 for (i = dst->pos; i < min_copy; i += sizeof(elf_greg_t),
1588 if (access_elf_reg(dst->target, info, i,
1589 &tmp[index], 0) < 0) {
1593 dst->ret = user_regset_copyout(&dst->pos, &dst->count,
1594 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1595 ELF_CR_IIP_OFFSET, ELF_AR_END_OFFSET);
1599 void do_gpregs_set(struct unw_frame_info *info, void *arg)
1602 struct regset_getset *dst = arg;
1604 unsigned int i, index;
1606 if (unw_unwind_to_user(info) < 0)
1610 if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(1)) {
1611 dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1614 0, ELF_GR_OFFSET(1));
1615 if (dst->ret || dst->count == 0)
1620 if (dst->count > 0 && dst->pos < ELF_GR_OFFSET(16)) {
1622 index = (dst->pos - ELF_GR_OFFSET(1)) / sizeof(elf_greg_t);
1623 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1624 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1625 ELF_GR_OFFSET(1), ELF_GR_OFFSET(16));
1628 for ( ; i < dst->pos; i += sizeof(elf_greg_t), index++)
1629 if (access_elf_reg(dst->target, info, i,
1630 &tmp[index], 1) < 0) {
1634 if (dst->count == 0)
1639 if (dst->count > 0 && dst->pos < ELF_NAT_OFFSET) {
1640 pt = task_pt_regs(dst->target);
1641 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1642 &dst->u.set.kbuf, &dst->u.set.ubuf, &pt->r16,
1643 ELF_GR_OFFSET(16), ELF_NAT_OFFSET);
1644 if (dst->ret || dst->count == 0)
1648 /* nat, pr, b0 - b7 */
1649 if (dst->count > 0 && dst->pos < ELF_CR_IIP_OFFSET) {
1651 index = (dst->pos - ELF_NAT_OFFSET) / sizeof(elf_greg_t);
1652 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1653 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1654 ELF_NAT_OFFSET, ELF_CR_IIP_OFFSET);
1657 for (; i < dst->pos; i += sizeof(elf_greg_t), index++)
1658 if (access_elf_reg(dst->target, info, i,
1659 &tmp[index], 1) < 0) {
1663 if (dst->count == 0)
1667 /* ip cfm psr ar.rsc ar.bsp ar.bspstore ar.rnat
1668 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
1670 if (dst->count > 0 && dst->pos < (ELF_AR_END_OFFSET)) {
1672 index = (dst->pos - ELF_CR_IIP_OFFSET) / sizeof(elf_greg_t);
1673 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1674 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1675 ELF_CR_IIP_OFFSET, ELF_AR_END_OFFSET);
1678 for ( ; i < dst->pos; i += sizeof(elf_greg_t), index++)
1679 if (access_elf_reg(dst->target, info, i,
1680 &tmp[index], 1) < 0) {
1687 #define ELF_FP_OFFSET(i) (i * sizeof(elf_fpreg_t))
1689 void do_fpregs_get(struct unw_frame_info *info, void *arg)
1691 struct regset_getset *dst = arg;
1692 struct task_struct *task = dst->target;
1693 elf_fpreg_t tmp[30];
1694 int index, min_copy, i;
1696 if (unw_unwind_to_user(info) < 0)
1699 /* Skip pos 0 and 1 */
1700 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
1701 dst->ret = user_regset_copyout_zero(&dst->pos, &dst->count,
1704 0, ELF_FP_OFFSET(2));
1705 if (dst->count == 0 || dst->ret)
1710 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
1711 index = (dst->pos - ELF_FP_OFFSET(2)) / sizeof(elf_fpreg_t);
1713 min_copy = min(((unsigned int)ELF_FP_OFFSET(32)),
1714 dst->pos + dst->count);
1715 for (i = dst->pos; i < min_copy; i += sizeof(elf_fpreg_t),
1717 if (unw_get_fr(info, i / sizeof(elf_fpreg_t),
1722 dst->ret = user_regset_copyout(&dst->pos, &dst->count,
1723 &dst->u.get.kbuf, &dst->u.get.ubuf, tmp,
1724 ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
1725 if (dst->count == 0 || dst->ret)
1730 if (dst->count > 0) {
1731 ia64_flush_fph(dst->target);
1732 if (task->thread.flags & IA64_THREAD_FPH_VALID)
1733 dst->ret = user_regset_copyout(
1734 &dst->pos, &dst->count,
1735 &dst->u.get.kbuf, &dst->u.get.ubuf,
1736 &dst->target->thread.fph,
1737 ELF_FP_OFFSET(32), -1);
1739 /* Zero fill instead. */
1740 dst->ret = user_regset_copyout_zero(
1741 &dst->pos, &dst->count,
1742 &dst->u.get.kbuf, &dst->u.get.ubuf,
1743 ELF_FP_OFFSET(32), -1);
1747 void do_fpregs_set(struct unw_frame_info *info, void *arg)
1749 struct regset_getset *dst = arg;
1750 elf_fpreg_t fpreg, tmp[30];
1751 int index, start, end;
1753 if (unw_unwind_to_user(info) < 0)
1756 /* Skip pos 0 and 1 */
1757 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(2)) {
1758 dst->ret = user_regset_copyin_ignore(&dst->pos, &dst->count,
1761 0, ELF_FP_OFFSET(2));
1762 if (dst->count == 0 || dst->ret)
1767 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(32)) {
1769 end = min(((unsigned int)ELF_FP_OFFSET(32)),
1770 dst->pos + dst->count);
1771 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1772 &dst->u.set.kbuf, &dst->u.set.ubuf, tmp,
1773 ELF_FP_OFFSET(2), ELF_FP_OFFSET(32));
1777 if (start & 0xF) { /* only write high part */
1778 if (unw_get_fr(info, start / sizeof(elf_fpreg_t),
1783 tmp[start / sizeof(elf_fpreg_t) - 2].u.bits[0]
1787 if (end & 0xF) { /* only write low part */
1788 if (unw_get_fr(info, end / sizeof(elf_fpreg_t),
1793 tmp[end / sizeof(elf_fpreg_t) - 2].u.bits[1]
1795 end = (end + 0xF) & ~0xFUL;
1798 for ( ; start < end ; start += sizeof(elf_fpreg_t)) {
1799 index = start / sizeof(elf_fpreg_t);
1800 if (unw_set_fr(info, index, tmp[index - 2])) {
1805 if (dst->ret || dst->count == 0)
1810 if (dst->count > 0 && dst->pos < ELF_FP_OFFSET(128)) {
1811 ia64_sync_fph(dst->target);
1812 dst->ret = user_regset_copyin(&dst->pos, &dst->count,
1815 &dst->target->thread.fph,
1816 ELF_FP_OFFSET(32), -1);
1821 do_regset_call(void (*call)(struct unw_frame_info *, void *),
1822 struct task_struct *target,
1823 const struct user_regset *regset,
1824 unsigned int pos, unsigned int count,
1825 const void *kbuf, const void __user *ubuf)
1827 struct regset_getset info = { .target = target, .regset = regset,
1828 .pos = pos, .count = count,
1829 .u.set = { .kbuf = kbuf, .ubuf = ubuf },
1832 if (target == current)
1833 unw_init_running(call, &info);
1835 struct unw_frame_info ufi;
1836 memset(&ufi, 0, sizeof(ufi));
1837 unw_init_from_blocked_task(&ufi, target);
1838 (*call)(&ufi, &info);
1845 gpregs_get(struct task_struct *target,
1846 const struct user_regset *regset,
1847 unsigned int pos, unsigned int count,
1848 void *kbuf, void __user *ubuf)
1850 return do_regset_call(do_gpregs_get, target, regset, pos, count,
1854 static int gpregs_set(struct task_struct *target,
1855 const struct user_regset *regset,
1856 unsigned int pos, unsigned int count,
1857 const void *kbuf, const void __user *ubuf)
1859 return do_regset_call(do_gpregs_set, target, regset, pos, count,
1863 static void do_gpregs_writeback(struct unw_frame_info *info, void *arg)
1865 do_sync_rbs(info, ia64_sync_user_rbs);
1869 * This is called to write back the register backing store.
1870 * ptrace does this before it stops, so that a tracer reading the user
1871 * memory after the thread stops will get the current register data.
1874 gpregs_writeback(struct task_struct *target,
1875 const struct user_regset *regset,
1878 if (test_and_set_tsk_thread_flag(target, TIF_RESTORE_RSE))
1880 set_notify_resume(target);
1881 return do_regset_call(do_gpregs_writeback, target, regset, 0, 0,
1886 fpregs_active(struct task_struct *target, const struct user_regset *regset)
1888 return (target->thread.flags & IA64_THREAD_FPH_VALID) ? 128 : 32;
1891 static int fpregs_get(struct task_struct *target,
1892 const struct user_regset *regset,
1893 unsigned int pos, unsigned int count,
1894 void *kbuf, void __user *ubuf)
1896 return do_regset_call(do_fpregs_get, target, regset, pos, count,
1900 static int fpregs_set(struct task_struct *target,
1901 const struct user_regset *regset,
1902 unsigned int pos, unsigned int count,
1903 const void *kbuf, const void __user *ubuf)
1905 return do_regset_call(do_fpregs_set, target, regset, pos, count,
1910 access_uarea(struct task_struct *child, unsigned long addr,
1911 unsigned long *data, int write_access)
1913 unsigned int pos = -1; /* an invalid value */
1915 unsigned long *ptr, regnum;
1917 if ((addr & 0x7) != 0) {
1918 dprintk("ptrace: unaligned register address 0x%lx\n", addr);
1921 if ((addr >= PT_NAT_BITS + 8 && addr < PT_F2) ||
1922 (addr >= PT_R7 + 8 && addr < PT_B1) ||
1923 (addr >= PT_AR_LC + 8 && addr < PT_CR_IPSR) ||
1924 (addr >= PT_AR_SSD + 8 && addr < PT_DBR)) {
1925 dprintk("ptrace: rejecting access to register "
1926 "address 0x%lx\n", addr);
1931 case PT_F32 ... (PT_F127 + 15):
1932 pos = addr - PT_F32 + ELF_FP_OFFSET(32);
1934 case PT_F2 ... (PT_F5 + 15):
1935 pos = addr - PT_F2 + ELF_FP_OFFSET(2);
1937 case PT_F10 ... (PT_F31 + 15):
1938 pos = addr - PT_F10 + ELF_FP_OFFSET(10);
1940 case PT_F6 ... (PT_F9 + 15):
1941 pos = addr - PT_F6 + ELF_FP_OFFSET(6);
1947 ret = fpregs_set(child, NULL, pos,
1948 sizeof(unsigned long), data, NULL);
1950 ret = fpregs_get(child, NULL, pos,
1951 sizeof(unsigned long), data, NULL);
1959 pos = ELF_NAT_OFFSET;
1961 case PT_R4 ... PT_R7:
1962 pos = addr - PT_R4 + ELF_GR_OFFSET(4);
1964 case PT_B1 ... PT_B5:
1965 pos = addr - PT_B1 + ELF_BR_OFFSET(1);
1968 pos = ELF_AR_EC_OFFSET;
1971 pos = ELF_AR_LC_OFFSET;
1974 pos = ELF_CR_IPSR_OFFSET;
1977 pos = ELF_CR_IIP_OFFSET;
1980 pos = ELF_CFM_OFFSET;
1983 pos = ELF_AR_UNAT_OFFSET;
1986 pos = ELF_AR_PFS_OFFSET;
1989 pos = ELF_AR_RSC_OFFSET;
1992 pos = ELF_AR_RNAT_OFFSET;
1994 case PT_AR_BSPSTORE:
1995 pos = ELF_AR_BSPSTORE_OFFSET;
1998 pos = ELF_PR_OFFSET;
2001 pos = ELF_BR_OFFSET(6);
2004 pos = ELF_AR_BSP_OFFSET;
2006 case PT_R1 ... PT_R3:
2007 pos = addr - PT_R1 + ELF_GR_OFFSET(1);
2009 case PT_R12 ... PT_R15:
2010 pos = addr - PT_R12 + ELF_GR_OFFSET(12);
2012 case PT_R8 ... PT_R11:
2013 pos = addr - PT_R8 + ELF_GR_OFFSET(8);
2015 case PT_R16 ... PT_R31:
2016 pos = addr - PT_R16 + ELF_GR_OFFSET(16);
2019 pos = ELF_AR_CCV_OFFSET;
2022 pos = ELF_AR_FPSR_OFFSET;
2025 pos = ELF_BR_OFFSET(0);
2028 pos = ELF_BR_OFFSET(7);
2031 pos = ELF_AR_CSD_OFFSET;
2034 pos = ELF_AR_SSD_OFFSET;
2040 ret = gpregs_set(child, NULL, pos,
2041 sizeof(unsigned long), data, NULL);
2043 ret = gpregs_get(child, NULL, pos,
2044 sizeof(unsigned long), data, NULL);
2050 /* access debug registers */
2051 if (addr >= PT_IBR) {
2052 regnum = (addr - PT_IBR) >> 3;
2053 ptr = &child->thread.ibr[0];
2055 regnum = (addr - PT_DBR) >> 3;
2056 ptr = &child->thread.dbr[0];
2060 dprintk("ptrace: rejecting access to register "
2061 "address 0x%lx\n", addr);
2064 #ifdef CONFIG_PERFMON
2066 * Check if debug registers are used by perfmon. This
2067 * test must be done once we know that we can do the
2068 * operation, i.e. the arguments are all valid, but
2069 * before we start modifying the state.
2071 * Perfmon needs to keep a count of how many processes
2072 * are trying to modify the debug registers for system
2073 * wide monitoring sessions.
2075 * We also include read access here, because they may
2076 * cause the PMU-installed debug register state
2077 * (dbr[], ibr[]) to be reset. The two arrays are also
2078 * used by perfmon, but we do not use
2079 * IA64_THREAD_DBG_VALID. The registers are restored
2080 * by the PMU context switch code.
2082 if (pfm_use_debug_registers(child))
2086 if (!(child->thread.flags & IA64_THREAD_DBG_VALID)) {
2087 child->thread.flags |= IA64_THREAD_DBG_VALID;
2088 memset(child->thread.dbr, 0,
2089 sizeof(child->thread.dbr));
2090 memset(child->thread.ibr, 0,
2091 sizeof(child->thread.ibr));
2096 if ((regnum & 1) && write_access) {
2097 /* don't let the user set kernel-level breakpoints: */
2098 *ptr = *data & ~(7UL << 56);
2108 static const struct user_regset native_regsets[] = {
2110 .core_note_type = NT_PRSTATUS,
2112 .size = sizeof(elf_greg_t), .align = sizeof(elf_greg_t),
2113 .get = gpregs_get, .set = gpregs_set,
2114 .writeback = gpregs_writeback
2117 .core_note_type = NT_PRFPREG,
2119 .size = sizeof(elf_fpreg_t), .align = sizeof(elf_fpreg_t),
2120 .get = fpregs_get, .set = fpregs_set, .active = fpregs_active
2124 static const struct user_regset_view user_ia64_view = {
2126 .e_machine = EM_IA_64,
2127 .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
2130 const struct user_regset_view *task_user_regset_view(struct task_struct *tsk)
2132 return &user_ia64_view;
2135 struct syscall_get_set_args {
2138 unsigned long *args;
2139 struct pt_regs *regs;
2143 static void syscall_get_set_args_cb(struct unw_frame_info *info, void *data)
2145 struct syscall_get_set_args *args = data;
2146 struct pt_regs *pt = args->regs;
2147 unsigned long *krbs, cfm, ndirty;
2150 if (unw_unwind_to_user(info) < 0)
2154 krbs = (unsigned long *)info->task + IA64_RBS_OFFSET/8;
2155 ndirty = ia64_rse_num_regs(krbs, krbs + (pt->loadrs >> 19));
2159 count = min_t(int, args->n, cfm & 0x7f);
2161 for (i = 0; i < count; i++) {
2163 *ia64_rse_skip_regs(krbs, ndirty + i + args->i) =
2166 args->args[i] = *ia64_rse_skip_regs(krbs,
2167 ndirty + i + args->i);
2171 while (i < args->n) {
2178 void ia64_syscall_get_set_arguments(struct task_struct *task,
2179 struct pt_regs *regs, unsigned int i, unsigned int n,
2180 unsigned long *args, int rw)
2182 struct syscall_get_set_args data = {
2190 if (task == current)
2191 unw_init_running(syscall_get_set_args_cb, &data);
2193 struct unw_frame_info ufi;
2194 memset(&ufi, 0, sizeof(ufi));
2195 unw_init_from_blocked_task(&ufi, task);
2196 syscall_get_set_args_cb(&ufi, &data);