drivers/pci/controller/vmd.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Volume Management Device driver
   4  * Copyright (c) 2015, Intel Corporation.
   5  */
   6
   7 #include <linux/device.h>
   8 #include <linux/interrupt.h>
   9 #include <linux/irq.h>
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/msi.h>
  13 #include <linux/pci.h>
  14 #include <linux/srcu.h>
  15 #include <linux/rculist.h>
  16 #include <linux/rcupdate.h>
  17
  18 #include <asm/irqdomain.h>
  19 #include <asm/device.h>
  20 #include <asm/msi.h>
  21 #include <asm/msidef.h>
  22
  23 #define VMD_CFGBAR      0
  24 #define VMD_MEMBAR1     2
  25 #define VMD_MEMBAR2     4
  26
  27 #define PCI_REG_VMCAP           0x40
  28 #define BUS_RESTRICT_CAP(vmcap) (vmcap & 0x1)
  29 #define PCI_REG_VMCONFIG        0x44
  30 #define BUS_RESTRICT_CFG(vmcfg) ((vmcfg >> 8) & 0x3)
  31 #define PCI_REG_VMLOCK          0x70
  32 #define MB2_SHADOW_EN(vmlock)   (vmlock & 0x2)
  33
  34 #define MB2_SHADOW_OFFSET       0x2000
  35 #define MB2_SHADOW_SIZE         16
  36
  37 enum vmd_features {
  38         /*
  39          * Device may contain registers which hint the physical location of the
  40          * membars, in order to allow proper address translation during
  41          * resource assignment to enable guest virtualization
  42          */
  43         VMD_FEAT_HAS_MEMBAR_SHADOW              = (1 << 0),
  44
  45         /*
  46          * Device may provide root port configuration information which limits
  47          * bus numbering
  48          */
  49         VMD_FEAT_HAS_BUS_RESTRICTIONS           = (1 << 1),
  50
  51         /*
  52          * Device contains physical location shadow registers in
  53          * vendor-specific capability space
  54          */
  55         VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP        = (1 << 2),
  56
  57         /*
  58          * Device may use MSI-X vector 0 for software triggering and will not
  59          * be used for MSI remapping
  60          */
  61         VMD_FEAT_OFFSET_FIRST_VECTOR            = (1 << 3),
  62 };
  63
  64 /*
  65  * Lock for manipulating VMD IRQ lists.
  66  */
  67 static DEFINE_RAW_SPINLOCK(list_lock);
  68
  69 /**
  70  * struct vmd_irq - private data to map driver IRQ to the VMD shared vector
  71  * @node:       list item for parent traversal.
  72  * @irq:        back pointer to parent.
  73  * @enabled:    true if driver enabled IRQ
  74  * @virq:       the virtual IRQ value provided to the requesting driver.
  75  *
  76  * Every MSI/MSI-X IRQ requested for a device in a VMD domain will be mapped to
  77  * a VMD IRQ using this structure.
  78  */
  79 struct vmd_irq {
  80         struct list_head        node;
  81         struct vmd_irq_list     *irq;
  82         bool                    enabled;
  83         unsigned int            virq;
  84 };
  85
  86 /**
  87  * struct vmd_irq_list - list of driver requested IRQs mapping to a VMD vector
  88  * @irq_list:   the list of irq's the VMD one demuxes to.
  89  * @srcu:       SRCU struct for local synchronization.
  90  * @count:      number of child IRQs assigned to this vector; used to track
  91  *              sharing.
  92  */
  93 struct vmd_irq_list {
  94         struct list_head        irq_list;
  95         struct srcu_struct      srcu;
  96         unsigned int            count;
  97 };
  98
  99 struct vmd_dev {
 100         struct pci_dev          *dev;
 101
 102         spinlock_t              cfg_lock;
 103         char __iomem            *cfgbar;
 104
 105         int msix_count;
 106         struct vmd_irq_list     *irqs;
 107
 108         struct pci_sysdata      sysdata;
 109         struct resource         resources[3];
 110         struct irq_domain       *irq_domain;
 111         struct pci_bus          *bus;
 112         u8                      busn_start;
 113         u8                      first_vec;
 114 };
 115
 116 static inline struct vmd_dev *vmd_from_bus(struct pci_bus *bus)
 117 {
 118         return container_of(bus->sysdata, struct vmd_dev, sysdata);
 119 }
 120
 121 static inline unsigned int index_from_irqs(struct vmd_dev *vmd,
 122                                            struct vmd_irq_list *irqs)
 123 {
 124         return irqs - vmd->irqs;
 125 }
 126
 127 /*
 128  * Drivers managing a device in a VMD domain allocate their own IRQs as before,
 129  * but the MSI entry for the hardware it's driving will be programmed with a
 130  * destination ID for the VMD MSI-X table.  The VMD muxes interrupts in its
 131  * domain into one of its own, and the VMD driver de-muxes these for the
 132  * handlers sharing that VMD IRQ.  The vmd irq_domain provides the operations
 133  * and irq_chip to set this up.
 134  */
 135 static void vmd_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
 136 {
 137         struct vmd_irq *vmdirq = data->chip_data;
 138         struct vmd_irq_list *irq = vmdirq->irq;
 139         struct vmd_dev *vmd = irq_data_get_irq_handler_data(data);
 140
 141         msg->address_hi = MSI_ADDR_BASE_HI;
 142         msg->address_lo = MSI_ADDR_BASE_LO |
 143                           MSI_ADDR_DEST_ID(index_from_irqs(vmd, irq));
 144         msg->data = 0;
 145 }
 146
 147 /*
 148  * We rely on MSI_FLAG_USE_DEF_CHIP_OPS to set the IRQ mask/unmask ops.
 149  */
 150 static void vmd_irq_enable(struct irq_data *data)
 151 {
 152         struct vmd_irq *vmdirq = data->chip_data;
 153         unsigned long flags;
 154
 155         raw_spin_lock_irqsave(&list_lock, flags);
 156         WARN_ON(vmdirq->enabled);
 157         list_add_tail_rcu(&vmdirq->node, &vmdirq->irq->irq_list);
 158         vmdirq->enabled = true;
 159         raw_spin_unlock_irqrestore(&list_lock, flags);
 160
 161         data->chip->irq_unmask(data);
 162 }
 163
 164 static void vmd_irq_disable(struct irq_data *data)
 165 {
 166         struct vmd_irq *vmdirq = data->chip_data;
 167         unsigned long flags;
 168
 169         data->chip->irq_mask(data);
 170
 171         raw_spin_lock_irqsave(&list_lock, flags);
 172         if (vmdirq->enabled) {
 173                 list_del_rcu(&vmdirq->node);
 174                 vmdirq->enabled = false;
 175         }
 176         raw_spin_unlock_irqrestore(&list_lock, flags);
 177 }
 178
 179 /*
 180  * XXX: Stubbed until we develop acceptable way to not create conflicts with
 181  * other devices sharing the same vector.
 182  */
 183 static int vmd_irq_set_affinity(struct irq_data *data,
 184                                 const struct cpumask *dest, bool force)
 185 {
 186         return -EINVAL;
 187 }
 188
 189 static struct irq_chip vmd_msi_controller = {
 190         .name                   = "VMD-MSI",
 191         .irq_enable             = vmd_irq_enable,
 192         .irq_disable            = vmd_irq_disable,
 193         .irq_compose_msi_msg    = vmd_compose_msi_msg,
 194         .irq_set_affinity       = vmd_irq_set_affinity,
 195 };
 196
 197 static irq_hw_number_t vmd_get_hwirq(struct msi_domain_info *info,
 198                                      msi_alloc_info_t *arg)
 199 {
 200         return 0;
 201 }
 202
 203 /*
 204  * XXX: We can be even smarter selecting the best IRQ once we solve the
 205  * affinity problem.
 206  */
 207 static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *desc)
 208 {
 209         unsigned long flags;
 210         int i, best;
 211
 212         if (vmd->msix_count == 1 + vmd->first_vec)
 213                 return &vmd->irqs[vmd->first_vec];
 214
 215         /*
 216          * White list for fast-interrupt handlers. All others will share the
 217          * "slow" interrupt vector.
 218          */
 219         switch (msi_desc_to_pci_dev(desc)->class) {
 220         case PCI_CLASS_STORAGE_EXPRESS:
 221                 break;
 222         default:
 223                 return &vmd->irqs[vmd->first_vec];
 224         }
 225
 226         raw_spin_lock_irqsave(&list_lock, flags);
 227         best = vmd->first_vec + 1;
 228         for (i = best; i < vmd->msix_count; i++)
 229                 if (vmd->irqs[i].count < vmd->irqs[best].count)
 230                         best = i;
 231         vmd->irqs[best].count++;
 232         raw_spin_unlock_irqrestore(&list_lock, flags);
 233
 234         return &vmd->irqs[best];
 235 }
 236
 237 static int vmd_msi_init(struct irq_domain *domain, struct msi_domain_info *info,
 238                         unsigned int virq, irq_hw_number_t hwirq,
 239                         msi_alloc_info_t *arg)
 240 {
 241         struct msi_desc *desc = arg->desc;
 242         struct vmd_dev *vmd = vmd_from_bus(msi_desc_to_pci_dev(desc)->bus);
 243         struct vmd_irq *vmdirq = kzalloc(sizeof(*vmdirq), GFP_KERNEL);
 244         unsigned int index, vector;
 245
 246         if (!vmdirq)
 247                 return -ENOMEM;
 248
 249         INIT_LIST_HEAD(&vmdirq->node);
 250         vmdirq->irq = vmd_next_irq(vmd, desc);
 251         vmdirq->virq = virq;
 252         index = index_from_irqs(vmd, vmdirq->irq);
 253         vector = pci_irq_vector(vmd->dev, index);
 254
 255         irq_domain_set_info(domain, virq, vector, info->chip, vmdirq,
 256                             handle_untracked_irq, vmd, NULL);
 257         return 0;
 258 }
 259
 260 static void vmd_msi_free(struct irq_domain *domain,
 261                         struct msi_domain_info *info, unsigned int virq)
 262 {
 263         struct vmd_irq *vmdirq = irq_get_chip_data(virq);
 264         unsigned long flags;
 265
 266         synchronize_srcu(&vmdirq->irq->srcu);
 267
 268         /* XXX: Potential optimization to rebalance */
 269         raw_spin_lock_irqsave(&list_lock, flags);
 270         vmdirq->irq->count--;
 271         raw_spin_unlock_irqrestore(&list_lock, flags);
 272
 273         kfree(vmdirq);
 274 }
 275
 276 static int vmd_msi_prepare(struct irq_domain *domain, struct device *dev,
 277                            int nvec, msi_alloc_info_t *arg)
 278 {
 279         struct pci_dev *pdev = to_pci_dev(dev);
 280         struct vmd_dev *vmd = vmd_from_bus(pdev->bus);
 281
 282         if (nvec > vmd->msix_count)
 283                 return vmd->msix_count;
 284
 285         memset(arg, 0, sizeof(*arg));
 286         return 0;
 287 }
 288
 289 static void vmd_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
 290 {
 291         arg->desc = desc;
 292 }
 293
 294 static struct msi_domain_ops vmd_msi_domain_ops = {
 295         .get_hwirq      = vmd_get_hwirq,
 296         .msi_init       = vmd_msi_init,
 297         .msi_free       = vmd_msi_free,
 298         .msi_prepare    = vmd_msi_prepare,
 299         .set_desc       = vmd_set_desc,
 300 };
 301
 302 static struct msi_domain_info vmd_msi_domain_info = {
 303         .flags          = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
 304                           MSI_FLAG_PCI_MSIX,
 305         .ops            = &vmd_msi_domain_ops,
 306         .chip           = &vmd_msi_controller,
 307 };
 308
 309 static int vmd_create_irq_domain(struct vmd_dev *vmd)
 310 {
 311         struct fwnode_handle *fn;
 312
 313         fn = irq_domain_alloc_named_id_fwnode("VMD-MSI", vmd->sysdata.domain);
 314         if (!fn)
 315                 return -ENODEV;
 316
 317         vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info, NULL);
 318         if (!vmd->irq_domain) {
 319                 irq_domain_free_fwnode(fn);
 320                 return -ENODEV;
 321         }
 322
 323         return 0;
 324 }
 325
 326 static void vmd_remove_irq_domain(struct vmd_dev *vmd)
 327 {
 328         if (vmd->irq_domain) {
 329                 struct fwnode_handle *fn = vmd->irq_domain->fwnode;
 330
 331                 irq_domain_remove(vmd->irq_domain);
 332                 irq_domain_free_fwnode(fn);
 333         }
 334 }
 335
 336 static char __iomem *vmd_cfg_addr(struct vmd_dev *vmd, struct pci_bus *bus,
 337                                   unsigned int devfn, int reg, int len)
 338 {
 339         char __iomem *addr = vmd->cfgbar +
 340                              ((bus->number - vmd->busn_start) << 20) +
 341                              (devfn << 12) + reg;
 342
 343         if ((addr - vmd->cfgbar) + len >=
 344             resource_size(&vmd->dev->resource[VMD_CFGBAR]))
 345                 return NULL;
 346
 347         return addr;
 348 }
 349
 350 /*
 351  * CPU may deadlock if config space is not serialized on some versions of this
 352  * hardware, so all config space access is done under a spinlock.
 353  */
 354 static int vmd_pci_read(struct pci_bus *bus, unsigned int devfn, int reg,
 355                         int len, u32 *value)
 356 {
 357         struct vmd_dev *vmd = vmd_from_bus(bus);
 358         char __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
 359         unsigned long flags;
 360         int ret = 0;
 361
 362         if (!addr)
 363                 return -EFAULT;
 364
 365         spin_lock_irqsave(&vmd->cfg_lock, flags);
 366         switch (len) {
 367         case 1:
 368                 *value = readb(addr);
 369                 break;
 370         case 2:
 371                 *value = readw(addr);
 372                 break;
 373         case 4:
 374                 *value = readl(addr);
 375                 break;
 376         default:
 377                 ret = -EINVAL;
 378                 break;
 379         }
 380         spin_unlock_irqrestore(&vmd->cfg_lock, flags);
 381         return ret;
 382 }
 383
 384 /*
 385  * VMD h/w converts non-posted config writes to posted memory writes. The
 386  * read-back in this function forces the completion so it returns only after
 387  * the config space was written, as expected.
 388  */
 389 static int vmd_pci_write(struct pci_bus *bus, unsigned int devfn, int reg,
 390                          int len, u32 value)
 391 {
 392         struct vmd_dev *vmd = vmd_from_bus(bus);
 393         char __iomem *addr = vmd_cfg_addr(vmd, bus, devfn, reg, len);
 394         unsigned long flags;
 395         int ret = 0;
 396
 397         if (!addr)
 398                 return -EFAULT;
 399
 400         spin_lock_irqsave(&vmd->cfg_lock, flags);
 401         switch (len) {
 402         case 1:
 403                 writeb(value, addr);
 404                 readb(addr);
 405                 break;
 406         case 2:
 407                 writew(value, addr);
 408                 readw(addr);
 409                 break;
 410         case 4:
 411                 writel(value, addr);
 412                 readl(addr);
 413                 break;
 414         default:
 415                 ret = -EINVAL;
 416                 break;
 417         }
 418         spin_unlock_irqrestore(&vmd->cfg_lock, flags);
 419         return ret;
 420 }
 421
 422 static struct pci_ops vmd_ops = {
 423         .read           = vmd_pci_read,
 424         .write          = vmd_pci_write,
 425 };
 426
 427 static void vmd_attach_resources(struct vmd_dev *vmd)
 428 {
 429         vmd->dev->resource[VMD_MEMBAR1].child = &vmd->resources[1];
 430         vmd->dev->resource[VMD_MEMBAR2].child = &vmd->resources[2];
 431 }
 432
 433 static void vmd_detach_resources(struct vmd_dev *vmd)
 434 {
 435         vmd->dev->resource[VMD_MEMBAR1].child = NULL;
 436         vmd->dev->resource[VMD_MEMBAR2].child = NULL;
 437 }
 438
 439 /*
 440  * VMD domains start at 0x10000 to not clash with ACPI _SEG domains.
 441  * Per ACPI r6.0, sec 6.5.6,  _SEG returns an integer, of which the lower
 442  * 16 bits are the PCI Segment Group (domain) number.  Other bits are
 443  * currently reserved.
 444  */
 445 static int vmd_find_free_domain(void)
 446 {
 447         int domain = 0xffff;
 448         struct pci_bus *bus = NULL;
 449
 450         while ((bus = pci_find_next_bus(bus)) != NULL)
 451                 domain = max_t(int, domain, pci_domain_nr(bus));
 452         return domain + 1;
 453 }
 454
 455 static int vmd_get_phys_offsets(struct vmd_dev *vmd, bool native_hint,
 456                                 resource_size_t *offset1,
 457                                 resource_size_t *offset2)
 458 {
 459         struct pci_dev *dev = vmd->dev;
 460         u64 phys1, phys2;
 461
 462         if (native_hint) {
 463                 u32 vmlock;
 464                 int ret;
 465
 466                 ret = pci_read_config_dword(dev, PCI_REG_VMLOCK, &vmlock);
 467                 if (ret || vmlock == ~0)
 468                         return -ENODEV;
 469
 470                 if (MB2_SHADOW_EN(vmlock)) {
 471                         void __iomem *membar2;
 472
 473                         membar2 = pci_iomap(dev, VMD_MEMBAR2, 0);
 474                         if (!membar2)
 475                                 return -ENOMEM;
 476                         phys1 = readq(membar2 + MB2_SHADOW_OFFSET);
 477                         phys2 = readq(membar2 + MB2_SHADOW_OFFSET + 8);
 478                         pci_iounmap(dev, membar2);
 479                 } else
 480                         return 0;
 481         } else {
 482                 /* Hypervisor-Emulated Vendor-Specific Capability */
 483                 int pos = pci_find_capability(dev, PCI_CAP_ID_VNDR);
 484                 u32 reg, regu;
 485
 486                 pci_read_config_dword(dev, pos + 4, &reg);
 487
 488                 /* "SHDW" */
 489                 if (pos && reg == 0x53484457) {
 490                         pci_read_config_dword(dev, pos + 8, &reg);
 491                         pci_read_config_dword(dev, pos + 12, &regu);
 492                         phys1 = (u64) regu << 32 | reg;
 493
 494                         pci_read_config_dword(dev, pos + 16, &reg);
 495                         pci_read_config_dword(dev, pos + 20, &regu);
 496                         phys2 = (u64) regu << 32 | reg;
 497                 } else
 498                         return 0;
 499         }
 500
 501         *offset1 = dev->resource[VMD_MEMBAR1].start -
 502                         (phys1 & PCI_BASE_ADDRESS_MEM_MASK);
 503         *offset2 = dev->resource[VMD_MEMBAR2].start -
 504                         (phys2 & PCI_BASE_ADDRESS_MEM_MASK);
 505
 506         return 0;
 507 }
 508
 509 static int vmd_get_bus_number_start(struct vmd_dev *vmd)
 510 {
 511         struct pci_dev *dev = vmd->dev;
 512         u16 reg;
 513
 514         pci_read_config_word(dev, PCI_REG_VMCAP, &reg);
 515         if (BUS_RESTRICT_CAP(reg)) {
 516                 pci_read_config_word(dev, PCI_REG_VMCONFIG, &reg);
 517
 518                 switch (BUS_RESTRICT_CFG(reg)) {
 519                 case 0:
 520                         vmd->busn_start = 0;
 521                         break;
 522                 case 1:
 523                         vmd->busn_start = 128;
 524                         break;
 525                 case 2:
 526                         vmd->busn_start = 224;
 527                         break;
 528                 default:
 529                         pci_err(dev, "Unknown Bus Offset Setting (%d)\n",
 530                                 BUS_RESTRICT_CFG(reg));
 531                         return -ENODEV;
 532                 }
 533         }
 534
 535         return 0;
 536 }
 537
 538 static irqreturn_t vmd_irq(int irq, void *data)
 539 {
 540         struct vmd_irq_list *irqs = data;
 541         struct vmd_irq *vmdirq;
 542         int idx;
 543
 544         idx = srcu_read_lock(&irqs->srcu);
 545         list_for_each_entry_rcu(vmdirq, &irqs->irq_list, node)
 546                 generic_handle_irq(vmdirq->virq);
 547         srcu_read_unlock(&irqs->srcu, idx);
 548
 549         return IRQ_HANDLED;
 550 }
 551
 552 static int vmd_alloc_irqs(struct vmd_dev *vmd)
 553 {
 554         struct pci_dev *dev = vmd->dev;
 555         int i, err;
 556
 557         vmd->msix_count = pci_msix_vec_count(dev);
 558         if (vmd->msix_count < 0)
 559                 return -ENODEV;
 560
 561         vmd->msix_count = pci_alloc_irq_vectors(dev, vmd->first_vec + 1,
 562                                                 vmd->msix_count, PCI_IRQ_MSIX);
 563         if (vmd->msix_count < 0)
 564                 return vmd->msix_count;
 565
 566         vmd->irqs = devm_kcalloc(&dev->dev, vmd->msix_count, sizeof(*vmd->irqs),
 567                                  GFP_KERNEL);
 568         if (!vmd->irqs)
 569                 return -ENOMEM;
 570
 571         for (i = 0; i < vmd->msix_count; i++) {
 572                 err = init_srcu_struct(&vmd->irqs[i].srcu);
 573                 if (err)
 574                         return err;
 575
 576                 INIT_LIST_HEAD(&vmd->irqs[i].irq_list);
 577                 err = devm_request_irq(&dev->dev, pci_irq_vector(dev, i),
 578                                        vmd_irq, IRQF_NO_THREAD,
 579                                        "vmd", &vmd->irqs[i]);
 580                 if (err)
 581                         return err;
 582         }
 583
 584         return 0;
 585 }
 586
 587 static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features)
 588 {
 589         struct pci_sysdata *sd = &vmd->sysdata;
 590         struct resource *res;
 591         u32 upper_bits;
 592         unsigned long flags;
 593         LIST_HEAD(resources);
 594         resource_size_t offset[2] = {0};
 595         resource_size_t membar2_offset = 0x2000;
 596         struct pci_bus *child;
 597         int ret;
 598
 599         /*
 600          * Shadow registers may exist in certain VMD device ids which allow
 601          * guests to correctly assign host physical addresses to the root ports
 602          * and child devices. These registers will either return the host value
 603          * or 0, depending on an enable bit in the VMD device.
 604          */
 605         if (features & VMD_FEAT_HAS_MEMBAR_SHADOW) {
 606                 membar2_offset = MB2_SHADOW_OFFSET + MB2_SHADOW_SIZE;
 607                 ret = vmd_get_phys_offsets(vmd, true, &offset[0], &offset[1]);
 608                 if (ret)
 609                         return ret;
 610         } else if (features & VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP) {
 611                 ret = vmd_get_phys_offsets(vmd, false, &offset[0], &offset[1]);
 612                 if (ret)
 613                         return ret;
 614         }
 615
 616         /*
 617          * Certain VMD devices may have a root port configuration option which
 618          * limits the bus range to between 0-127, 128-255, or 224-255
 619          */
 620         if (features & VMD_FEAT_HAS_BUS_RESTRICTIONS) {
 621                 ret = vmd_get_bus_number_start(vmd);
 622                 if (ret)
 623                         return ret;
 624         }
 625
 626         res = &vmd->dev->resource[VMD_CFGBAR];
 627         vmd->resources[0] = (struct resource) {
 628                 .name  = "VMD CFGBAR",
 629                 .start = vmd->busn_start,
 630                 .end   = vmd->busn_start + (resource_size(res) >> 20) - 1,
 631                 .flags = IORESOURCE_BUS | IORESOURCE_PCI_FIXED,
 632         };
 633
 634         /*
 635          * If the window is below 4GB, clear IORESOURCE_MEM_64 so we can
 636          * put 32-bit resources in the window.
 637          *
 638          * There's no hardware reason why a 64-bit window *couldn't*
 639          * contain a 32-bit resource, but pbus_size_mem() computes the
 640          * bridge window size assuming a 64-bit window will contain no
 641          * 32-bit resources.  __pci_assign_resource() enforces that
 642          * artificial restriction to make sure everything will fit.
 643          *
 644          * The only way we could use a 64-bit non-prefetchable MEMBAR is
 645          * if its address is <4GB so that we can convert it to a 32-bit
 646          * resource.  To be visible to the host OS, all VMD endpoints must
 647          * be initially configured by platform BIOS, which includes setting
 648          * up these resources.  We can assume the device is configured
 649          * according to the platform needs.
 650          */
 651         res = &vmd->dev->resource[VMD_MEMBAR1];
 652         upper_bits = upper_32_bits(res->end);
 653         flags = res->flags & ~IORESOURCE_SIZEALIGN;
 654         if (!upper_bits)
 655                 flags &= ~IORESOURCE_MEM_64;
 656         vmd->resources[1] = (struct resource) {
 657                 .name  = "VMD MEMBAR1",
 658                 .start = res->start,
 659                 .end   = res->end,
 660                 .flags = flags,
 661                 .parent = res,
 662         };
 663
 664         res = &vmd->dev->resource[VMD_MEMBAR2];
 665         upper_bits = upper_32_bits(res->end);
 666         flags = res->flags & ~IORESOURCE_SIZEALIGN;
 667         if (!upper_bits)
 668                 flags &= ~IORESOURCE_MEM_64;
 669         vmd->resources[2] = (struct resource) {
 670                 .name  = "VMD MEMBAR2",
 671                 .start = res->start + membar2_offset,
 672                 .end   = res->end,
 673                 .flags = flags,
 674                 .parent = res,
 675         };
 676
 677         sd->vmd_dev = vmd->dev;
 678         sd->domain = vmd_find_free_domain();
 679         if (sd->domain < 0)
 680                 return sd->domain;
 681
 682         sd->node = pcibus_to_node(vmd->dev->bus);
 683
 684         ret = vmd_create_irq_domain(vmd);
 685         if (ret)
 686                 return ret;
 687
 688         /*
 689          * Override the irq domain bus token so the domain can be distinguished
 690          * from a regular PCI/MSI domain.
 691          */
 692         irq_domain_update_bus_token(vmd->irq_domain, DOMAIN_BUS_VMD_MSI);
 693
 694         pci_add_resource(&resources, &vmd->resources[0]);
 695         pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
 696         pci_add_resource_offset(&resources, &vmd->resources[2], offset[1]);
 697
 698         vmd->bus = pci_create_root_bus(&vmd->dev->dev, vmd->busn_start,
 699                                        &vmd_ops, sd, &resources);
 700         if (!vmd->bus) {
 701                 pci_free_resource_list(&resources);
 702                 vmd_remove_irq_domain(vmd);
 703                 return -ENODEV;
 704         }
 705
 706         vmd_attach_resources(vmd);
 707         if (vmd->irq_domain)
 708                 dev_set_msi_domain(&vmd->bus->dev, vmd->irq_domain);
 709
 710         pci_scan_child_bus(vmd->bus);
 711         pci_assign_unassigned_bus_resources(vmd->bus);
 712
 713         /*
 714          * VMD root buses are virtual and don't return true on pci_is_pcie()
 715          * and will fail pcie_bus_configure_settings() early. It can instead be
 716          * run on each of the real root ports.
 717          */
 718         list_for_each_entry(child, &vmd->bus->children, node)
 719                 pcie_bus_configure_settings(child);
 720
 721         pci_bus_add_devices(vmd->bus);
 722
 723         WARN(sysfs_create_link(&vmd->dev->dev.kobj, &vmd->bus->dev.kobj,
 724                                "domain"), "Can't create symlink to domain\n");
 725         return 0;
 726 }
 727
 728 static int vmd_probe(struct pci_dev *dev, const struct pci_device_id *id)
 729 {
 730         unsigned long features = (unsigned long) id->driver_data;
 731         struct vmd_dev *vmd;
 732         int err;
 733
 734         if (resource_size(&dev->resource[VMD_CFGBAR]) < (1 << 20))
 735                 return -ENOMEM;
 736
 737         vmd = devm_kzalloc(&dev->dev, sizeof(*vmd), GFP_KERNEL);
 738         if (!vmd)
 739                 return -ENOMEM;
 740
 741         vmd->dev = dev;
 742         err = pcim_enable_device(dev);
 743         if (err < 0)
 744                 return err;
 745
 746         vmd->cfgbar = pcim_iomap(dev, VMD_CFGBAR, 0);
 747         if (!vmd->cfgbar)
 748                 return -ENOMEM;
 749
 750         pci_set_master(dev);
 751         if (dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(64)) &&
 752             dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)))
 753                 return -ENODEV;
 754
 755         if (features & VMD_FEAT_OFFSET_FIRST_VECTOR)
 756                 vmd->first_vec = 1;
 757
 758         err = vmd_alloc_irqs(vmd);
 759         if (err)
 760                 return err;
 761
 762         spin_lock_init(&vmd->cfg_lock);
 763         pci_set_drvdata(dev, vmd);
 764         err = vmd_enable_domain(vmd, features);
 765         if (err)
 766                 return err;
 767
 768         dev_info(&vmd->dev->dev, "Bound to PCI domain %04x\n",
 769                  vmd->sysdata.domain);
 770         return 0;
 771 }
 772
 773 static void vmd_cleanup_srcu(struct vmd_dev *vmd)
 774 {
 775         int i;
 776
 777         for (i = 0; i < vmd->msix_count; i++)
 778                 cleanup_srcu_struct(&vmd->irqs[i].srcu);
 779 }
 780
 781 static void vmd_remove(struct pci_dev *dev)
 782 {
 783         struct vmd_dev *vmd = pci_get_drvdata(dev);
 784
 785         sysfs_remove_link(&vmd->dev->dev.kobj, "domain");
 786         pci_stop_root_bus(vmd->bus);
 787         pci_remove_root_bus(vmd->bus);
 788         vmd_cleanup_srcu(vmd);
 789         vmd_detach_resources(vmd);
 790         vmd_remove_irq_domain(vmd);
 791 }
 792
 793 #ifdef CONFIG_PM_SLEEP
 794 static int vmd_suspend(struct device *dev)
 795 {
 796         struct pci_dev *pdev = to_pci_dev(dev);
 797         struct vmd_dev *vmd = pci_get_drvdata(pdev);
 798         int i;
 799
 800         for (i = 0; i < vmd->msix_count; i++)
 801                 devm_free_irq(dev, pci_irq_vector(pdev, i), &vmd->irqs[i]);
 802
 803         return 0;
 804 }
 805
 806 static int vmd_resume(struct device *dev)
 807 {
 808         struct pci_dev *pdev = to_pci_dev(dev);
 809         struct vmd_dev *vmd = pci_get_drvdata(pdev);
 810         int err, i;
 811
 812         for (i = 0; i < vmd->msix_count; i++) {
 813                 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
 814                                        vmd_irq, IRQF_NO_THREAD,
 815                                        "vmd", &vmd->irqs[i]);
 816                 if (err)
 817                         return err;
 818         }
 819
 820         return 0;
 821 }
 822 #endif
 823 static SIMPLE_DEV_PM_OPS(vmd_dev_pm_ops, vmd_suspend, vmd_resume);
 824
 825 static const struct pci_device_id vmd_ids[] = {
 826         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_201D),
 827                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP,},
 828         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_28C0),
 829                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW |
 830                                 VMD_FEAT_HAS_BUS_RESTRICTIONS,},
 831         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x467f),
 832                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
 833                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
 834                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
 835         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4c3d),
 836                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
 837                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
 838                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
 839         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VMD_9A0B),
 840                 .driver_data = VMD_FEAT_HAS_MEMBAR_SHADOW_VSCAP |
 841                                 VMD_FEAT_HAS_BUS_RESTRICTIONS |
 842                                 VMD_FEAT_OFFSET_FIRST_VECTOR,},
 843         {0,}
 844 };
 845 MODULE_DEVICE_TABLE(pci, vmd_ids);
 846
 847 static struct pci_driver vmd_drv = {
 848         .name           = "vmd",
 849         .id_table       = vmd_ids,
 850         .probe          = vmd_probe,
 851         .remove         = vmd_remove,
 852         .driver         = {
 853                 .pm     = &vmd_dev_pm_ops,
 854         },
 855 };
 856 module_pci_driver(vmd_drv);
 857
 858 MODULE_AUTHOR("Intel Corporation");
 859 MODULE_LICENSE("GPL v2");
 860 MODULE_VERSION("0.6");