2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
42 #include <linux/sched/mm.h>
43 #include <linux/sched/task.h>
46 #include <net/addrconf.h>
47 #include <net/devlink.h>
49 #include <rdma/ib_smi.h>
50 #include <rdma/ib_user_verbs.h>
51 #include <rdma/ib_addr.h>
52 #include <rdma/ib_cache.h>
54 #include <net/bonding.h>
56 #include <linux/mlx4/driver.h>
57 #include <linux/mlx4/cmd.h>
58 #include <linux/mlx4/qp.h>
61 #include <rdma/mlx4-abi.h>
63 #define DRV_NAME MLX4_IB_DRV_NAME
64 #define DRV_VERSION "4.0-0"
66 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
67 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
68 #define MLX4_IB_CARD_REV_A0 0xA0
70 MODULE_AUTHOR("Roland Dreier");
71 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
72 MODULE_LICENSE("Dual BSD/GPL");
74 int mlx4_ib_sm_guid_assign = 0;
75 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
76 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
78 static const char mlx4_ib_version[] =
79 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
82 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
83 static enum rdma_link_layer mlx4_ib_port_link_layer(struct ib_device *device,
86 static struct workqueue_struct *wq;
88 static int check_flow_steering_support(struct mlx4_dev *dev)
90 int eth_num_ports = 0;
93 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
97 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
99 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
101 dmfs &= (!ib_num_ports ||
102 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
104 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
105 if (ib_num_ports && mlx4_is_mfunc(dev)) {
106 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
113 static int num_ib_ports(struct mlx4_dev *dev)
118 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
124 static struct net_device *mlx4_ib_get_netdev(struct ib_device *device,
127 struct mlx4_ib_dev *ibdev = to_mdev(device);
128 struct net_device *dev;
131 dev = mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port_num);
134 if (mlx4_is_bonded(ibdev->dev)) {
135 struct net_device *upper;
137 upper = netdev_master_upper_dev_get_rcu(dev);
139 struct net_device *active;
141 active = bond_option_active_slave_get_rcu(netdev_priv(upper));
153 static int mlx4_ib_update_gids_v1(struct gid_entry *gids,
154 struct mlx4_ib_dev *ibdev,
157 struct mlx4_cmd_mailbox *mailbox;
159 struct mlx4_dev *dev = ibdev->dev;
161 union ib_gid *gid_tbl;
163 mailbox = mlx4_alloc_cmd_mailbox(dev);
167 gid_tbl = mailbox->buf;
169 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
170 memcpy(&gid_tbl[i], &gids[i].gid, sizeof(union ib_gid));
172 err = mlx4_cmd(dev, mailbox->dma,
173 MLX4_SET_PORT_GID_TABLE << 8 | port_num,
174 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
176 if (mlx4_is_bonded(dev))
177 err += mlx4_cmd(dev, mailbox->dma,
178 MLX4_SET_PORT_GID_TABLE << 8 | 2,
179 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
182 mlx4_free_cmd_mailbox(dev, mailbox);
186 static int mlx4_ib_update_gids_v1_v2(struct gid_entry *gids,
187 struct mlx4_ib_dev *ibdev,
190 struct mlx4_cmd_mailbox *mailbox;
192 struct mlx4_dev *dev = ibdev->dev;
203 mailbox = mlx4_alloc_cmd_mailbox(dev);
207 gid_tbl = mailbox->buf;
208 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
209 memcpy(&gid_tbl[i].gid, &gids[i].gid, sizeof(union ib_gid));
210 if (gids[i].gid_type == IB_GID_TYPE_ROCE_UDP_ENCAP) {
211 gid_tbl[i].version = 2;
212 if (!ipv6_addr_v4mapped((struct in6_addr *)&gids[i].gid))
217 err = mlx4_cmd(dev, mailbox->dma,
218 MLX4_SET_PORT_ROCE_ADDR << 8 | port_num,
219 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
221 if (mlx4_is_bonded(dev))
222 err += mlx4_cmd(dev, mailbox->dma,
223 MLX4_SET_PORT_ROCE_ADDR << 8 | 2,
224 1, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
227 mlx4_free_cmd_mailbox(dev, mailbox);
231 static int mlx4_ib_update_gids(struct gid_entry *gids,
232 struct mlx4_ib_dev *ibdev,
235 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
236 return mlx4_ib_update_gids_v1_v2(gids, ibdev, port_num);
238 return mlx4_ib_update_gids_v1(gids, ibdev, port_num);
241 static void free_gid_entry(struct gid_entry *entry)
243 memset(&entry->gid, 0, sizeof(entry->gid));
248 static int mlx4_ib_add_gid(const struct ib_gid_attr *attr, void **context)
250 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
251 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
252 struct mlx4_port_gid_table *port_gid_table;
253 int free = -1, found = -1;
257 struct gid_entry *gids;
258 u16 vlan_id = 0xffff;
261 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
264 if (attr->port_num > MLX4_MAX_PORTS)
270 ret = rdma_read_gid_l2_fields(attr, &vlan_id, &mac[0]);
273 port_gid_table = &iboe->gids[attr->port_num - 1];
274 spin_lock_bh(&iboe->lock);
275 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i) {
276 if (!memcmp(&port_gid_table->gids[i].gid,
277 &attr->gid, sizeof(attr->gid)) &&
278 port_gid_table->gids[i].gid_type == attr->gid_type &&
279 port_gid_table->gids[i].vlan_id == vlan_id) {
283 if (free < 0 && rdma_is_zero_gid(&port_gid_table->gids[i].gid))
284 free = i; /* HW has space */
291 port_gid_table->gids[free].ctx = kmalloc(sizeof(*port_gid_table->gids[free].ctx), GFP_ATOMIC);
292 if (!port_gid_table->gids[free].ctx) {
295 *context = port_gid_table->gids[free].ctx;
296 port_gid_table->gids[free].gid = attr->gid;
297 port_gid_table->gids[free].gid_type = attr->gid_type;
298 port_gid_table->gids[free].vlan_id = vlan_id;
299 port_gid_table->gids[free].ctx->real_index = free;
300 port_gid_table->gids[free].ctx->refcount = 1;
305 struct gid_cache_context *ctx = port_gid_table->gids[found].ctx;
309 if (!ret && hw_update) {
310 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
315 free_gid_entry(&port_gid_table->gids[free]);
317 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
318 memcpy(&gids[i].gid, &port_gid_table->gids[i].gid, sizeof(union ib_gid));
319 gids[i].gid_type = port_gid_table->gids[i].gid_type;
323 spin_unlock_bh(&iboe->lock);
325 if (!ret && hw_update) {
326 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
328 spin_lock_bh(&iboe->lock);
330 free_gid_entry(&port_gid_table->gids[free]);
331 spin_unlock_bh(&iboe->lock);
339 static int mlx4_ib_del_gid(const struct ib_gid_attr *attr, void **context)
341 struct gid_cache_context *ctx = *context;
342 struct mlx4_ib_dev *ibdev = to_mdev(attr->device);
343 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
344 struct mlx4_port_gid_table *port_gid_table;
347 struct gid_entry *gids;
349 if (!rdma_cap_roce_gid_table(attr->device, attr->port_num))
352 if (attr->port_num > MLX4_MAX_PORTS)
355 port_gid_table = &iboe->gids[attr->port_num - 1];
356 spin_lock_bh(&iboe->lock);
359 if (!ctx->refcount) {
360 unsigned int real_index = ctx->real_index;
362 free_gid_entry(&port_gid_table->gids[real_index]);
366 if (!ret && hw_update) {
369 gids = kmalloc_array(MLX4_MAX_PORT_GIDS, sizeof(*gids),
374 for (i = 0; i < MLX4_MAX_PORT_GIDS; i++) {
376 &port_gid_table->gids[i].gid,
377 sizeof(union ib_gid));
379 port_gid_table->gids[i].gid_type;
383 spin_unlock_bh(&iboe->lock);
385 if (!ret && hw_update) {
386 ret = mlx4_ib_update_gids(gids, ibdev, attr->port_num);
392 int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
393 const struct ib_gid_attr *attr)
395 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
396 struct gid_cache_context *ctx = NULL;
397 struct mlx4_port_gid_table *port_gid_table;
398 int real_index = -EINVAL;
401 u32 port_num = attr->port_num;
403 if (port_num > MLX4_MAX_PORTS)
406 if (mlx4_is_bonded(ibdev->dev))
409 if (!rdma_cap_roce_gid_table(&ibdev->ib_dev, port_num))
412 spin_lock_irqsave(&iboe->lock, flags);
413 port_gid_table = &iboe->gids[port_num - 1];
415 for (i = 0; i < MLX4_MAX_PORT_GIDS; ++i)
416 if (!memcmp(&port_gid_table->gids[i].gid,
417 &attr->gid, sizeof(attr->gid)) &&
418 attr->gid_type == port_gid_table->gids[i].gid_type) {
419 ctx = port_gid_table->gids[i].ctx;
423 real_index = ctx->real_index;
424 spin_unlock_irqrestore(&iboe->lock, flags);
428 static int mlx4_ib_query_device(struct ib_device *ibdev,
429 struct ib_device_attr *props,
430 struct ib_udata *uhw)
432 struct mlx4_ib_dev *dev = to_mdev(ibdev);
433 struct ib_smp *in_mad;
434 struct ib_smp *out_mad;
437 struct mlx4_uverbs_ex_query_device cmd;
438 struct mlx4_uverbs_ex_query_device_resp resp = {};
439 struct mlx4_clock_params clock_params;
442 if (uhw->inlen < sizeof(cmd))
445 err = ib_copy_from_udata(&cmd, uhw, sizeof(cmd));
456 resp.response_length = offsetof(typeof(resp), response_length) +
457 sizeof(resp.response_length);
458 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
459 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
461 if (!in_mad || !out_mad)
464 ib_init_query_mad(in_mad);
465 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
467 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
468 1, NULL, NULL, in_mad, out_mad);
472 memset(props, 0, sizeof *props);
474 have_ib_ports = num_ib_ports(dev->dev);
476 props->fw_ver = dev->dev->caps.fw_ver;
477 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
478 IB_DEVICE_PORT_ACTIVE_EVENT |
479 IB_DEVICE_SYS_IMAGE_GUID |
480 IB_DEVICE_RC_RNR_NAK_GEN;
481 props->kernel_cap_flags = IBK_BLOCK_MULTICAST_LOOPBACK;
482 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
483 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
484 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
485 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
486 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
487 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
488 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
489 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
490 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
491 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
492 if (dev->dev->caps.max_gso_sz &&
493 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
494 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
495 props->kernel_cap_flags |= IBK_UD_TSO;
496 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
497 props->kernel_cap_flags |= IBK_LOCAL_DMA_LKEY;
498 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
499 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
500 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
501 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
502 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
503 props->device_cap_flags |= IB_DEVICE_XRC;
504 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
505 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
506 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
507 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
508 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
510 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
512 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
513 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
515 props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;
517 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
519 props->vendor_part_id = dev->dev->persist->pdev->device;
520 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
521 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
523 props->max_mr_size = ~0ull;
524 props->page_size_cap = dev->dev->caps.page_size_cap;
525 props->max_qp = dev->dev->quotas.qp;
526 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
527 props->max_send_sge =
528 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
529 props->max_recv_sge =
530 min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
531 props->max_sge_rd = MLX4_MAX_SGE_RD;
532 props->max_cq = dev->dev->quotas.cq;
533 props->max_cqe = dev->dev->caps.max_cqes;
534 props->max_mr = dev->dev->quotas.mpt;
535 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
536 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
537 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
538 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
539 props->max_srq = dev->dev->quotas.srq;
540 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
541 props->max_srq_sge = dev->dev->caps.max_srq_sge;
542 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
543 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
544 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
545 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
546 props->masked_atomic_cap = props->atomic_cap;
547 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
548 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
549 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
550 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
551 props->max_mcast_grp;
552 props->hca_core_clock = dev->dev->caps.hca_core_clock * 1000UL;
553 props->timestamp_mask = 0xFFFFFFFFFFFFULL;
554 props->max_ah = INT_MAX;
556 if (mlx4_ib_port_link_layer(ibdev, 1) == IB_LINK_LAYER_ETHERNET ||
557 mlx4_ib_port_link_layer(ibdev, 2) == IB_LINK_LAYER_ETHERNET) {
558 if (dev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) {
559 props->rss_caps.max_rwq_indirection_tables =
561 props->rss_caps.max_rwq_indirection_table_size =
562 dev->dev->caps.max_rss_tbl_sz;
563 props->rss_caps.supported_qpts = 1 << IB_QPT_RAW_PACKET;
564 props->max_wq_type_rq = props->max_qp;
567 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
568 props->raw_packet_caps |= IB_RAW_PACKET_CAP_SCATTER_FCS;
571 props->cq_caps.max_cq_moderation_count = MLX4_MAX_CQ_COUNT;
572 props->cq_caps.max_cq_moderation_period = MLX4_MAX_CQ_PERIOD;
574 if (uhw->outlen >= resp.response_length + sizeof(resp.hca_core_clock_offset)) {
575 resp.response_length += sizeof(resp.hca_core_clock_offset);
576 if (!mlx4_get_internal_clock_params(dev->dev, &clock_params)) {
577 resp.comp_mask |= MLX4_IB_QUERY_DEV_RESP_MASK_CORE_CLOCK_OFFSET;
578 resp.hca_core_clock_offset = clock_params.offset % PAGE_SIZE;
582 if (uhw->outlen >= resp.response_length +
583 sizeof(resp.max_inl_recv_sz)) {
584 resp.response_length += sizeof(resp.max_inl_recv_sz);
585 resp.max_inl_recv_sz = dev->dev->caps.max_rq_sg *
586 sizeof(struct mlx4_wqe_data_seg);
589 if (offsetofend(typeof(resp), rss_caps) <= uhw->outlen) {
590 if (props->rss_caps.supported_qpts) {
591 resp.rss_caps.rx_hash_function =
592 MLX4_IB_RX_HASH_FUNC_TOEPLITZ;
594 resp.rss_caps.rx_hash_fields_mask =
595 MLX4_IB_RX_HASH_SRC_IPV4 |
596 MLX4_IB_RX_HASH_DST_IPV4 |
597 MLX4_IB_RX_HASH_SRC_IPV6 |
598 MLX4_IB_RX_HASH_DST_IPV6 |
599 MLX4_IB_RX_HASH_SRC_PORT_TCP |
600 MLX4_IB_RX_HASH_DST_PORT_TCP |
601 MLX4_IB_RX_HASH_SRC_PORT_UDP |
602 MLX4_IB_RX_HASH_DST_PORT_UDP;
604 if (dev->dev->caps.tunnel_offload_mode ==
605 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
606 resp.rss_caps.rx_hash_fields_mask |=
607 MLX4_IB_RX_HASH_INNER;
609 resp.response_length = offsetof(typeof(resp), rss_caps) +
610 sizeof(resp.rss_caps);
613 if (offsetofend(typeof(resp), tso_caps) <= uhw->outlen) {
614 if (dev->dev->caps.max_gso_sz &&
615 ((mlx4_ib_port_link_layer(ibdev, 1) ==
616 IB_LINK_LAYER_ETHERNET) ||
617 (mlx4_ib_port_link_layer(ibdev, 2) ==
618 IB_LINK_LAYER_ETHERNET))) {
619 resp.tso_caps.max_tso = dev->dev->caps.max_gso_sz;
620 resp.tso_caps.supported_qpts |=
621 1 << IB_QPT_RAW_PACKET;
623 resp.response_length = offsetof(typeof(resp), tso_caps) +
624 sizeof(resp.tso_caps);
628 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
639 static enum rdma_link_layer
640 mlx4_ib_port_link_layer(struct ib_device *device, u32 port_num)
642 struct mlx4_dev *dev = to_mdev(device)->dev;
644 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
645 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
648 static int ib_link_query_port(struct ib_device *ibdev, u32 port,
649 struct ib_port_attr *props, int netw_view)
651 struct ib_smp *in_mad;
652 struct ib_smp *out_mad;
653 int ext_active_speed;
654 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
657 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
658 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
659 if (!in_mad || !out_mad)
662 ib_init_query_mad(in_mad);
663 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
664 in_mad->attr_mod = cpu_to_be32(port);
666 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
667 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
669 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
675 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
676 props->lmc = out_mad->data[34] & 0x7;
677 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
678 props->sm_sl = out_mad->data[36] & 0xf;
679 props->state = out_mad->data[32] & 0xf;
680 props->phys_state = out_mad->data[33] >> 4;
681 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
683 props->gid_tbl_len = out_mad->data[50];
685 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
686 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
687 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
688 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
689 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
690 props->active_width = out_mad->data[31] & 0xf;
691 props->active_speed = out_mad->data[35] >> 4;
692 props->max_mtu = out_mad->data[41] & 0xf;
693 props->active_mtu = out_mad->data[36] >> 4;
694 props->subnet_timeout = out_mad->data[51] & 0x1f;
695 props->max_vl_num = out_mad->data[37] >> 4;
696 props->init_type_reply = out_mad->data[41] >> 4;
698 /* Check if extended speeds (EDR/FDR/...) are supported */
699 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
700 ext_active_speed = out_mad->data[62] >> 4;
702 switch (ext_active_speed) {
704 props->active_speed = IB_SPEED_FDR;
707 props->active_speed = IB_SPEED_EDR;
712 /* If reported active speed is QDR, check if is FDR-10 */
713 if (props->active_speed == IB_SPEED_QDR) {
714 ib_init_query_mad(in_mad);
715 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
716 in_mad->attr_mod = cpu_to_be32(port);
718 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
719 NULL, NULL, in_mad, out_mad);
723 /* Checking LinkSpeedActive for FDR-10 */
724 if (out_mad->data[15] & 0x1)
725 props->active_speed = IB_SPEED_FDR10;
728 /* Avoid wrong speed value returned by FW if the IB link is down. */
729 if (props->state == IB_PORT_DOWN)
730 props->active_speed = IB_SPEED_SDR;
738 static u8 state_to_phys_state(enum ib_port_state state)
740 return state == IB_PORT_ACTIVE ?
741 IB_PORT_PHYS_STATE_LINK_UP : IB_PORT_PHYS_STATE_DISABLED;
744 static int eth_link_query_port(struct ib_device *ibdev, u32 port,
745 struct ib_port_attr *props)
748 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
749 struct mlx4_ib_iboe *iboe = &mdev->iboe;
750 struct net_device *ndev;
752 struct mlx4_cmd_mailbox *mailbox;
754 int is_bonded = mlx4_is_bonded(mdev->dev);
756 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
758 return PTR_ERR(mailbox);
760 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
761 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
766 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ||
767 (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
768 IB_WIDTH_4X : IB_WIDTH_1X;
769 props->active_speed = (((u8 *)mailbox->buf)[5] == 0x20 /*56Gb*/) ?
770 IB_SPEED_FDR : IB_SPEED_QDR;
771 props->port_cap_flags = IB_PORT_CM_SUP;
772 props->ip_gids = true;
773 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
774 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
775 if (mdev->dev->caps.pkey_table_len[port])
776 props->pkey_tbl_len = 1;
777 props->max_mtu = IB_MTU_4096;
778 props->max_vl_num = 2;
779 props->state = IB_PORT_DOWN;
780 props->phys_state = state_to_phys_state(props->state);
781 props->active_mtu = IB_MTU_256;
782 spin_lock_bh(&iboe->lock);
783 ndev = iboe->netdevs[port - 1];
784 if (ndev && is_bonded) {
785 rcu_read_lock(); /* required to get upper dev */
786 ndev = netdev_master_upper_dev_get_rcu(ndev);
792 tmp = iboe_get_mtu(ndev->mtu);
793 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
795 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
796 IB_PORT_ACTIVE : IB_PORT_DOWN;
797 props->phys_state = state_to_phys_state(props->state);
799 spin_unlock_bh(&iboe->lock);
801 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
805 int __mlx4_ib_query_port(struct ib_device *ibdev, u32 port,
806 struct ib_port_attr *props, int netw_view)
810 /* props being zeroed by the caller, avoid zeroing it here */
812 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
813 ib_link_query_port(ibdev, port, props, netw_view) :
814 eth_link_query_port(ibdev, port, props);
819 static int mlx4_ib_query_port(struct ib_device *ibdev, u32 port,
820 struct ib_port_attr *props)
822 /* returns host view */
823 return __mlx4_ib_query_port(ibdev, port, props, 0);
826 int __mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index,
827 union ib_gid *gid, int netw_view)
829 struct ib_smp *in_mad;
830 struct ib_smp *out_mad;
832 struct mlx4_ib_dev *dev = to_mdev(ibdev);
834 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
836 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
837 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
838 if (!in_mad || !out_mad)
841 ib_init_query_mad(in_mad);
842 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
843 in_mad->attr_mod = cpu_to_be32(port);
845 if (mlx4_is_mfunc(dev->dev) && netw_view)
846 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
848 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
852 memcpy(gid->raw, out_mad->data + 8, 8);
854 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
856 /* For any index > 0, return the null guid */
863 ib_init_query_mad(in_mad);
864 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
865 in_mad->attr_mod = cpu_to_be32(index / 8);
867 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
868 NULL, NULL, in_mad, out_mad);
872 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
876 memset(gid->raw + 8, 0, 8);
882 static int mlx4_ib_query_gid(struct ib_device *ibdev, u32 port, int index,
885 if (rdma_protocol_ib(ibdev, port))
886 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
890 static int mlx4_ib_query_sl2vl(struct ib_device *ibdev, u32 port,
893 union sl2vl_tbl_to_u64 sl2vl64;
894 struct ib_smp *in_mad;
895 struct ib_smp *out_mad;
896 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
900 if (mlx4_is_slave(to_mdev(ibdev)->dev)) {
905 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
906 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
907 if (!in_mad || !out_mad)
910 ib_init_query_mad(in_mad);
911 in_mad->attr_id = IB_SMP_ATTR_SL_TO_VL_TABLE;
912 in_mad->attr_mod = 0;
914 if (mlx4_is_mfunc(to_mdev(ibdev)->dev))
915 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
917 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
922 for (jj = 0; jj < 8; jj++)
923 sl2vl64.sl8[jj] = ((struct ib_smp *)out_mad)->data[jj];
924 *sl2vl_tbl = sl2vl64.sl64;
932 static void mlx4_init_sl2vl_tbl(struct mlx4_ib_dev *mdev)
938 for (i = 1; i <= mdev->dev->caps.num_ports; i++) {
939 if (mdev->dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH)
941 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, i, &sl2vl);
943 pr_err("Unable to get default sl to vl mapping for port %d. Using all zeroes (%d)\n",
947 atomic64_set(&mdev->sl2vl[i - 1], sl2vl);
951 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
952 u16 *pkey, int netw_view)
954 struct ib_smp *in_mad;
955 struct ib_smp *out_mad;
956 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
959 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
960 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
961 if (!in_mad || !out_mad)
964 ib_init_query_mad(in_mad);
965 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
966 in_mad->attr_mod = cpu_to_be32(index / 32);
968 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
969 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
971 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
976 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
984 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
987 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
990 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
991 struct ib_device_modify *props)
993 struct mlx4_cmd_mailbox *mailbox;
996 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
999 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
1002 if (mlx4_is_slave(to_mdev(ibdev)->dev))
1005 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
1006 memcpy(ibdev->node_desc, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1007 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
1010 * If possible, pass node desc to FW, so it can generate
1011 * a 144 trap. If cmd fails, just ignore.
1013 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
1014 if (IS_ERR(mailbox))
1017 memcpy(mailbox->buf, props->node_desc, IB_DEVICE_NODE_DESC_MAX);
1018 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
1019 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
1021 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
1026 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u32 port,
1027 int reset_qkey_viols, u32 cap_mask)
1029 struct mlx4_cmd_mailbox *mailbox;
1032 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
1033 if (IS_ERR(mailbox))
1034 return PTR_ERR(mailbox);
1036 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
1037 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
1038 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
1040 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
1041 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
1044 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
1045 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
1048 mlx4_free_cmd_mailbox(dev->dev, mailbox);
1052 static int mlx4_ib_modify_port(struct ib_device *ibdev, u32 port, int mask,
1053 struct ib_port_modify *props)
1055 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
1056 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
1057 struct ib_port_attr attr;
1061 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
1062 * of whether port link layer is ETH or IB. For ETH ports, qkey
1063 * violations and port capabilities are not meaningful.
1068 mutex_lock(&mdev->cap_mask_mutex);
1070 err = ib_query_port(ibdev, port, &attr);
1074 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
1075 ~props->clr_port_cap_mask;
1077 err = mlx4_ib_SET_PORT(mdev, port,
1078 !!(mask & IB_PORT_RESET_QKEY_CNTR),
1082 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
1086 static int mlx4_ib_alloc_ucontext(struct ib_ucontext *uctx,
1087 struct ib_udata *udata)
1089 struct ib_device *ibdev = uctx->device;
1090 struct mlx4_ib_dev *dev = to_mdev(ibdev);
1091 struct mlx4_ib_ucontext *context = to_mucontext(uctx);
1092 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
1093 struct mlx4_ib_alloc_ucontext_resp resp;
1096 if (!dev->ib_active)
1099 if (ibdev->ops.uverbs_abi_ver ==
1100 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
1101 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
1102 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
1103 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1105 resp.dev_caps = dev->dev->caps.userspace_caps;
1106 resp.qp_tab_size = dev->dev->caps.num_qps;
1107 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
1108 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
1109 resp.cqe_size = dev->dev->caps.cqe_size;
1112 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
1116 INIT_LIST_HEAD(&context->db_page_list);
1117 mutex_init(&context->db_page_mutex);
1119 INIT_LIST_HEAD(&context->wqn_ranges_list);
1120 mutex_init(&context->wqn_ranges_mutex);
1122 if (ibdev->ops.uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
1123 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
1125 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
1128 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
1135 static void mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
1137 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
1139 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
1142 static void mlx4_ib_disassociate_ucontext(struct ib_ucontext *ibcontext)
1146 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
1148 struct mlx4_ib_dev *dev = to_mdev(context->device);
1150 switch (vma->vm_pgoff) {
1152 return rdma_user_mmap_io(context, vma,
1153 to_mucontext(context)->uar.pfn,
1155 pgprot_noncached(vma->vm_page_prot),
1159 if (dev->dev->caps.bf_reg_size == 0)
1161 return rdma_user_mmap_io(
1163 to_mucontext(context)->uar.pfn +
1164 dev->dev->caps.num_uars,
1165 PAGE_SIZE, pgprot_writecombine(vma->vm_page_prot),
1169 struct mlx4_clock_params params;
1172 ret = mlx4_get_internal_clock_params(dev->dev, ¶ms);
1176 return rdma_user_mmap_io(
1178 (pci_resource_start(dev->dev->persist->pdev,
1182 PAGE_SIZE, pgprot_noncached(vma->vm_page_prot),
1191 static int mlx4_ib_alloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
1193 struct mlx4_ib_pd *pd = to_mpd(ibpd);
1194 struct ib_device *ibdev = ibpd->device;
1197 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
1201 if (udata && ib_copy_to_udata(udata, &pd->pdn, sizeof(__u32))) {
1202 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
1208 static int mlx4_ib_dealloc_pd(struct ib_pd *pd, struct ib_udata *udata)
1210 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
1214 static int mlx4_ib_alloc_xrcd(struct ib_xrcd *ibxrcd, struct ib_udata *udata)
1216 struct mlx4_ib_dev *dev = to_mdev(ibxrcd->device);
1217 struct mlx4_ib_xrcd *xrcd = to_mxrcd(ibxrcd);
1218 struct ib_cq_init_attr cq_attr = {};
1221 if (!(dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1224 err = mlx4_xrcd_alloc(dev->dev, &xrcd->xrcdn);
1228 xrcd->pd = ib_alloc_pd(ibxrcd->device, 0);
1229 if (IS_ERR(xrcd->pd)) {
1230 err = PTR_ERR(xrcd->pd);
1235 xrcd->cq = ib_create_cq(ibxrcd->device, NULL, NULL, xrcd, &cq_attr);
1236 if (IS_ERR(xrcd->cq)) {
1237 err = PTR_ERR(xrcd->cq);
1244 ib_dealloc_pd(xrcd->pd);
1246 mlx4_xrcd_free(dev->dev, xrcd->xrcdn);
1250 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd, struct ib_udata *udata)
1252 ib_destroy_cq(to_mxrcd(xrcd)->cq);
1253 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
1254 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
1258 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
1260 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1261 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1262 struct mlx4_ib_gid_entry *ge;
1264 ge = kzalloc(sizeof *ge, GFP_KERNEL);
1269 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
1270 ge->port = mqp->port;
1274 mutex_lock(&mqp->mutex);
1275 list_add_tail(&ge->list, &mqp->gid_list);
1276 mutex_unlock(&mqp->mutex);
1281 static void mlx4_ib_delete_counters_table(struct mlx4_ib_dev *ibdev,
1282 struct mlx4_ib_counters *ctr_table)
1284 struct counter_index *counter, *tmp_count;
1286 mutex_lock(&ctr_table->mutex);
1287 list_for_each_entry_safe(counter, tmp_count, &ctr_table->counters_list,
1289 if (counter->allocated)
1290 mlx4_counter_free(ibdev->dev, counter->index);
1291 list_del(&counter->list);
1294 mutex_unlock(&ctr_table->mutex);
1297 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
1300 struct net_device *ndev;
1306 spin_lock_bh(&mdev->iboe.lock);
1307 ndev = mdev->iboe.netdevs[mqp->port - 1];
1309 spin_unlock_bh(&mdev->iboe.lock);
1319 struct mlx4_ib_steering {
1320 struct list_head list;
1321 struct mlx4_flow_reg_id reg_id;
1325 #define LAST_ETH_FIELD vlan_tag
1326 #define LAST_IB_FIELD sl
1327 #define LAST_IPV4_FIELD dst_ip
1328 #define LAST_TCP_UDP_FIELD src_port
1330 /* Field is the last supported field */
1331 #define FIELDS_NOT_SUPPORTED(filter, field)\
1332 memchr_inv((void *)&filter.field +\
1333 sizeof(filter.field), 0,\
1335 offsetof(typeof(filter), field) -\
1336 sizeof(filter.field))
1338 static int parse_flow_attr(struct mlx4_dev *dev,
1340 union ib_flow_spec *ib_spec,
1341 struct _rule_hw *mlx4_spec)
1343 enum mlx4_net_trans_rule_id type;
1345 switch (ib_spec->type) {
1346 case IB_FLOW_SPEC_ETH:
1347 if (FIELDS_NOT_SUPPORTED(ib_spec->eth.mask, LAST_ETH_FIELD))
1350 type = MLX4_NET_TRANS_RULE_ID_ETH;
1351 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
1353 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
1355 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
1356 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
1358 case IB_FLOW_SPEC_IB:
1359 if (FIELDS_NOT_SUPPORTED(ib_spec->ib.mask, LAST_IB_FIELD))
1362 type = MLX4_NET_TRANS_RULE_ID_IB;
1363 mlx4_spec->ib.l3_qpn =
1364 cpu_to_be32(qp_num);
1365 mlx4_spec->ib.qpn_mask =
1366 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
1370 case IB_FLOW_SPEC_IPV4:
1371 if (FIELDS_NOT_SUPPORTED(ib_spec->ipv4.mask, LAST_IPV4_FIELD))
1374 type = MLX4_NET_TRANS_RULE_ID_IPV4;
1375 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
1376 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
1377 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
1378 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
1381 case IB_FLOW_SPEC_TCP:
1382 case IB_FLOW_SPEC_UDP:
1383 if (FIELDS_NOT_SUPPORTED(ib_spec->tcp_udp.mask, LAST_TCP_UDP_FIELD))
1386 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
1387 MLX4_NET_TRANS_RULE_ID_TCP :
1388 MLX4_NET_TRANS_RULE_ID_UDP;
1389 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
1390 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
1391 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
1392 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
1398 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
1399 mlx4_hw_rule_sz(dev, type) < 0)
1401 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
1402 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
1403 return mlx4_hw_rule_sz(dev, type);
1406 struct default_rules {
1407 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1408 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
1409 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
1412 static const struct default_rules default_table[] = {
1414 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
1415 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
1416 .rules_create_list = {IB_FLOW_SPEC_IB},
1417 .link_layer = IB_LINK_LAYER_INFINIBAND
1421 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
1422 struct ib_flow_attr *flow_attr)
1426 const struct default_rules *pdefault_rules = default_table;
1427 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
1429 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
1430 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
1431 memset(&field_types, 0, sizeof(field_types));
1433 if (link_layer != pdefault_rules->link_layer)
1436 ib_flow = flow_attr + 1;
1437 /* we assume the specs are sorted */
1438 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
1439 j < flow_attr->num_of_specs; k++) {
1440 union ib_flow_spec *current_flow =
1441 (union ib_flow_spec *)ib_flow;
1443 /* same layer but different type */
1444 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
1445 (pdefault_rules->mandatory_fields[k] &
1446 IB_FLOW_SPEC_LAYER_MASK)) &&
1447 (current_flow->type !=
1448 pdefault_rules->mandatory_fields[k]))
1451 /* same layer, try match next one */
1452 if (current_flow->type ==
1453 pdefault_rules->mandatory_fields[k]) {
1456 ((union ib_flow_spec *)ib_flow)->size;
1460 ib_flow = flow_attr + 1;
1461 for (j = 0; j < flow_attr->num_of_specs;
1462 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
1463 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
1464 /* same layer and same type */
1465 if (((union ib_flow_spec *)ib_flow)->type ==
1466 pdefault_rules->mandatory_not_fields[k])
1475 static int __mlx4_ib_create_default_rules(
1476 struct mlx4_ib_dev *mdev,
1478 const struct default_rules *pdefault_rules,
1479 struct _rule_hw *mlx4_spec) {
1483 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
1484 union ib_flow_spec ib_spec = {};
1487 switch (pdefault_rules->rules_create_list[i]) {
1491 case IB_FLOW_SPEC_IB:
1492 ib_spec.type = IB_FLOW_SPEC_IB;
1493 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1500 /* We must put empty rule, qpn is being ignored */
1501 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1504 pr_info("invalid parsing\n");
1508 mlx4_spec = (void *)mlx4_spec + ret;
1514 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1516 enum mlx4_net_trans_promisc_mode flow_type,
1522 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1523 struct mlx4_cmd_mailbox *mailbox;
1524 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1527 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1528 pr_err("Invalid priority value %d\n", flow_attr->priority);
1532 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1535 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1536 if (IS_ERR(mailbox))
1537 return PTR_ERR(mailbox);
1538 ctrl = mailbox->buf;
1540 ctrl->prio = cpu_to_be16(domain | flow_attr->priority);
1541 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1542 ctrl->port = flow_attr->port;
1543 ctrl->qpn = cpu_to_be32(qp->qp_num);
1545 ib_flow = flow_attr + 1;
1546 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1547 /* Add default flows */
1548 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1549 if (default_flow >= 0) {
1550 ret = __mlx4_ib_create_default_rules(
1551 mdev, qp, default_table + default_flow,
1552 mailbox->buf + size);
1554 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1559 for (i = 0; i < flow_attr->num_of_specs; i++) {
1560 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1561 mailbox->buf + size);
1563 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1566 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1570 if (mlx4_is_master(mdev->dev) && flow_type == MLX4_FS_REGULAR &&
1571 flow_attr->num_of_specs == 1) {
1572 struct _rule_hw *rule_header = (struct _rule_hw *)(ctrl + 1);
1573 enum ib_flow_spec_type header_spec =
1574 ((union ib_flow_spec *)(flow_attr + 1))->type;
1576 if (header_spec == IB_FLOW_SPEC_ETH)
1577 mlx4_handle_eth_header_mcast_prio(ctrl, rule_header);
1580 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1581 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1584 pr_err("mcg table is full. Fail to register network rule.\n");
1585 else if (ret == -ENXIO)
1586 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1588 pr_err("Invalid argument. Fail to register network rule.\n");
1590 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1594 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1597 err = mlx4_cmd(dev, reg_id, 0, 0,
1598 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1601 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1606 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1610 union ib_flow_spec *ib_spec;
1611 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1614 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1615 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1616 return 0; /* do nothing */
1618 ib_flow = flow_attr + 1;
1619 ib_spec = (union ib_flow_spec *)ib_flow;
1621 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1622 return 0; /* do nothing */
1624 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1625 flow_attr->port, qp->qp_num,
1626 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1631 static int mlx4_ib_add_dont_trap_rule(struct mlx4_dev *dev,
1632 struct ib_flow_attr *flow_attr,
1633 enum mlx4_net_trans_promisc_mode *type)
1637 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_UC_MC_SNIFFER) ||
1638 (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC) ||
1639 (flow_attr->num_of_specs > 1) || (flow_attr->priority != 0)) {
1643 if (flow_attr->num_of_specs == 0) {
1644 type[0] = MLX4_FS_MC_SNIFFER;
1645 type[1] = MLX4_FS_UC_SNIFFER;
1647 union ib_flow_spec *ib_spec;
1649 ib_spec = (union ib_flow_spec *)(flow_attr + 1);
1650 if (ib_spec->type != IB_FLOW_SPEC_ETH)
1653 /* if all is zero than MC and UC */
1654 if (is_zero_ether_addr(ib_spec->eth.mask.dst_mac)) {
1655 type[0] = MLX4_FS_MC_SNIFFER;
1656 type[1] = MLX4_FS_UC_SNIFFER;
1658 u8 mac[ETH_ALEN] = {ib_spec->eth.mask.dst_mac[0] ^ 0x01,
1659 ib_spec->eth.mask.dst_mac[1],
1660 ib_spec->eth.mask.dst_mac[2],
1661 ib_spec->eth.mask.dst_mac[3],
1662 ib_spec->eth.mask.dst_mac[4],
1663 ib_spec->eth.mask.dst_mac[5]};
1665 /* Above xor was only on MC bit, non empty mask is valid
1666 * only if this bit is set and rest are zero.
1668 if (!is_zero_ether_addr(&mac[0]))
1671 if (is_multicast_ether_addr(ib_spec->eth.val.dst_mac))
1672 type[0] = MLX4_FS_MC_SNIFFER;
1674 type[0] = MLX4_FS_UC_SNIFFER;
1681 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1682 struct ib_flow_attr *flow_attr,
1683 struct ib_udata *udata)
1685 int err = 0, i = 0, j = 0;
1686 struct mlx4_ib_flow *mflow;
1687 enum mlx4_net_trans_promisc_mode type[2];
1688 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1689 int is_bonded = mlx4_is_bonded(dev);
1691 if (flow_attr->flags & ~IB_FLOW_ATTR_FLAGS_DONT_TRAP)
1692 return ERR_PTR(-EOPNOTSUPP);
1694 if ((flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP) &&
1695 (flow_attr->type != IB_FLOW_ATTR_NORMAL))
1696 return ERR_PTR(-EOPNOTSUPP);
1699 udata->inlen && !ib_is_udata_cleared(udata, 0, udata->inlen))
1700 return ERR_PTR(-EOPNOTSUPP);
1702 memset(type, 0, sizeof(type));
1704 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1710 switch (flow_attr->type) {
1711 case IB_FLOW_ATTR_NORMAL:
1712 /* If dont trap flag (continue match) is set, under specific
1713 * condition traffic be replicated to given qp,
1714 * without stealing it
1716 if (unlikely(flow_attr->flags & IB_FLOW_ATTR_FLAGS_DONT_TRAP)) {
1717 err = mlx4_ib_add_dont_trap_rule(dev,
1723 type[0] = MLX4_FS_REGULAR;
1727 case IB_FLOW_ATTR_ALL_DEFAULT:
1728 type[0] = MLX4_FS_ALL_DEFAULT;
1731 case IB_FLOW_ATTR_MC_DEFAULT:
1732 type[0] = MLX4_FS_MC_DEFAULT;
1735 case IB_FLOW_ATTR_SNIFFER:
1736 type[0] = MLX4_FS_MIRROR_RX_PORT;
1737 type[1] = MLX4_FS_MIRROR_SX_PORT;
1745 while (i < ARRAY_SIZE(type) && type[i]) {
1746 err = __mlx4_ib_create_flow(qp, flow_attr, MLX4_DOMAIN_UVERBS,
1747 type[i], &mflow->reg_id[i].id);
1749 goto err_create_flow;
1751 /* Application always sees one port so the mirror rule
1752 * must be on port #2
1754 flow_attr->port = 2;
1755 err = __mlx4_ib_create_flow(qp, flow_attr,
1756 MLX4_DOMAIN_UVERBS, type[j],
1757 &mflow->reg_id[j].mirror);
1758 flow_attr->port = 1;
1760 goto err_create_flow;
1767 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1768 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1769 &mflow->reg_id[i].id);
1771 goto err_create_flow;
1774 flow_attr->port = 2;
1775 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1776 &mflow->reg_id[j].mirror);
1777 flow_attr->port = 1;
1779 goto err_create_flow;
1782 /* function to create mirror rule */
1786 return &mflow->ibflow;
1790 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1791 mflow->reg_id[i].id);
1796 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1797 mflow->reg_id[j].mirror);
1802 return ERR_PTR(err);
1805 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1809 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1810 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1812 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1813 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1816 if (mflow->reg_id[i].mirror) {
1817 err = __mlx4_ib_destroy_flow(mdev->dev,
1818 mflow->reg_id[i].mirror);
1829 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1832 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1833 struct mlx4_dev *dev = mdev->dev;
1834 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1835 struct mlx4_ib_steering *ib_steering = NULL;
1836 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1837 struct mlx4_flow_reg_id reg_id;
1839 if (mdev->dev->caps.steering_mode ==
1840 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1841 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1846 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1848 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1851 pr_err("multicast attach op failed, err %d\n", err);
1856 if (mlx4_is_bonded(dev)) {
1857 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1858 (mqp->port == 1) ? 2 : 1,
1860 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1861 prot, ®_id.mirror);
1866 err = add_gid_entry(ibqp, gid);
1871 memcpy(ib_steering->gid.raw, gid->raw, 16);
1872 ib_steering->reg_id = reg_id;
1873 mutex_lock(&mqp->mutex);
1874 list_add(&ib_steering->list, &mqp->steering_rules);
1875 mutex_unlock(&mqp->mutex);
1880 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1883 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1884 prot, reg_id.mirror);
1891 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1893 struct mlx4_ib_gid_entry *ge;
1894 struct mlx4_ib_gid_entry *tmp;
1895 struct mlx4_ib_gid_entry *ret = NULL;
1897 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1898 if (!memcmp(raw, ge->gid.raw, 16)) {
1907 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1910 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1911 struct mlx4_dev *dev = mdev->dev;
1912 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1913 struct net_device *ndev;
1914 struct mlx4_ib_gid_entry *ge;
1915 struct mlx4_flow_reg_id reg_id = {0, 0};
1916 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1918 if (mdev->dev->caps.steering_mode ==
1919 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1920 struct mlx4_ib_steering *ib_steering;
1922 mutex_lock(&mqp->mutex);
1923 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1924 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1925 list_del(&ib_steering->list);
1929 mutex_unlock(&mqp->mutex);
1930 if (&ib_steering->list == &mqp->steering_rules) {
1931 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1934 reg_id = ib_steering->reg_id;
1938 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1943 if (mlx4_is_bonded(dev)) {
1944 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1945 prot, reg_id.mirror);
1950 mutex_lock(&mqp->mutex);
1951 ge = find_gid_entry(mqp, gid->raw);
1953 spin_lock_bh(&mdev->iboe.lock);
1954 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1956 spin_unlock_bh(&mdev->iboe.lock);
1958 list_del(&ge->list);
1961 pr_warn("could not find mgid entry\n");
1963 mutex_unlock(&mqp->mutex);
1968 static int init_node_data(struct mlx4_ib_dev *dev)
1970 struct ib_smp *in_mad;
1971 struct ib_smp *out_mad;
1972 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
1975 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1976 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1977 if (!in_mad || !out_mad)
1980 ib_init_query_mad(in_mad);
1981 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
1982 if (mlx4_is_master(dev->dev))
1983 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
1985 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1989 memcpy(dev->ib_dev.node_desc, out_mad->data, IB_DEVICE_NODE_DESC_MAX);
1991 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1993 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1997 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
1998 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
2006 static ssize_t hca_type_show(struct device *device,
2007 struct device_attribute *attr, char *buf)
2009 struct mlx4_ib_dev *dev =
2010 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2012 return sysfs_emit(buf, "MT%d\n", dev->dev->persist->pdev->device);
2014 static DEVICE_ATTR_RO(hca_type);
2016 static ssize_t hw_rev_show(struct device *device,
2017 struct device_attribute *attr, char *buf)
2019 struct mlx4_ib_dev *dev =
2020 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2022 return sysfs_emit(buf, "%x\n", dev->dev->rev_id);
2024 static DEVICE_ATTR_RO(hw_rev);
2026 static ssize_t board_id_show(struct device *device,
2027 struct device_attribute *attr, char *buf)
2029 struct mlx4_ib_dev *dev =
2030 rdma_device_to_drv_device(device, struct mlx4_ib_dev, ib_dev);
2032 return sysfs_emit(buf, "%.*s\n", MLX4_BOARD_ID_LEN, dev->dev->board_id);
2034 static DEVICE_ATTR_RO(board_id);
2036 static struct attribute *mlx4_class_attributes[] = {
2037 &dev_attr_hw_rev.attr,
2038 &dev_attr_hca_type.attr,
2039 &dev_attr_board_id.attr,
2043 static const struct attribute_group mlx4_attr_group = {
2044 .attrs = mlx4_class_attributes,
2047 struct diag_counter {
2052 #define DIAG_COUNTER(_name, _offset) \
2053 { .name = #_name, .offset = _offset }
2055 static const struct diag_counter diag_basic[] = {
2056 DIAG_COUNTER(rq_num_lle, 0x00),
2057 DIAG_COUNTER(sq_num_lle, 0x04),
2058 DIAG_COUNTER(rq_num_lqpoe, 0x08),
2059 DIAG_COUNTER(sq_num_lqpoe, 0x0C),
2060 DIAG_COUNTER(rq_num_lpe, 0x18),
2061 DIAG_COUNTER(sq_num_lpe, 0x1C),
2062 DIAG_COUNTER(rq_num_wrfe, 0x20),
2063 DIAG_COUNTER(sq_num_wrfe, 0x24),
2064 DIAG_COUNTER(sq_num_mwbe, 0x2C),
2065 DIAG_COUNTER(sq_num_bre, 0x34),
2066 DIAG_COUNTER(sq_num_rire, 0x44),
2067 DIAG_COUNTER(rq_num_rire, 0x48),
2068 DIAG_COUNTER(sq_num_rae, 0x4C),
2069 DIAG_COUNTER(rq_num_rae, 0x50),
2070 DIAG_COUNTER(sq_num_roe, 0x54),
2071 DIAG_COUNTER(sq_num_tree, 0x5C),
2072 DIAG_COUNTER(sq_num_rree, 0x64),
2073 DIAG_COUNTER(rq_num_rnr, 0x68),
2074 DIAG_COUNTER(sq_num_rnr, 0x6C),
2075 DIAG_COUNTER(rq_num_oos, 0x100),
2076 DIAG_COUNTER(sq_num_oos, 0x104),
2079 static const struct diag_counter diag_ext[] = {
2080 DIAG_COUNTER(rq_num_dup, 0x130),
2081 DIAG_COUNTER(sq_num_to, 0x134),
2084 static const struct diag_counter diag_device_only[] = {
2085 DIAG_COUNTER(num_cqovf, 0x1A0),
2086 DIAG_COUNTER(rq_num_udsdprd, 0x118),
2089 static struct rdma_hw_stats *
2090 mlx4_ib_alloc_hw_device_stats(struct ib_device *ibdev)
2092 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2093 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2098 return rdma_alloc_hw_stats_struct(diag[0].descs, diag[0].num_counters,
2099 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2102 static struct rdma_hw_stats *
2103 mlx4_ib_alloc_hw_port_stats(struct ib_device *ibdev, u32 port_num)
2105 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2106 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2111 return rdma_alloc_hw_stats_struct(diag[1].descs, diag[1].num_counters,
2112 RDMA_HW_STATS_DEFAULT_LIFESPAN);
2115 static int mlx4_ib_get_hw_stats(struct ib_device *ibdev,
2116 struct rdma_hw_stats *stats,
2117 u32 port, int index)
2119 struct mlx4_ib_dev *dev = to_mdev(ibdev);
2120 struct mlx4_ib_diag_counters *diag = dev->diag_counters;
2121 u32 hw_value[ARRAY_SIZE(diag_device_only) +
2122 ARRAY_SIZE(diag_ext) + ARRAY_SIZE(diag_basic)] = {};
2126 ret = mlx4_query_diag_counters(dev->dev,
2127 MLX4_OP_MOD_QUERY_TRANSPORT_CI_ERRORS,
2128 diag[!!port].offset, hw_value,
2129 diag[!!port].num_counters, port);
2134 for (i = 0; i < diag[!!port].num_counters; i++)
2135 stats->value[i] = hw_value[i];
2137 return diag[!!port].num_counters;
2140 static int __mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev,
2141 struct rdma_stat_desc **pdescs,
2142 u32 **offset, u32 *num, bool port)
2146 num_counters = ARRAY_SIZE(diag_basic);
2148 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT)
2149 num_counters += ARRAY_SIZE(diag_ext);
2152 num_counters += ARRAY_SIZE(diag_device_only);
2154 *pdescs = kcalloc(num_counters, sizeof(struct rdma_stat_desc),
2159 *offset = kcalloc(num_counters, sizeof(**offset), GFP_KERNEL);
2163 *num = num_counters;
2172 static void mlx4_ib_fill_diag_counters(struct mlx4_ib_dev *ibdev,
2173 struct rdma_stat_desc *descs,
2174 u32 *offset, bool port)
2179 for (i = 0, j = 0; i < ARRAY_SIZE(diag_basic); i++, j++) {
2180 descs[i].name = diag_basic[i].name;
2181 offset[i] = diag_basic[i].offset;
2184 if (ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT) {
2185 for (i = 0; i < ARRAY_SIZE(diag_ext); i++, j++) {
2186 descs[j].name = diag_ext[i].name;
2187 offset[j] = diag_ext[i].offset;
2192 for (i = 0; i < ARRAY_SIZE(diag_device_only); i++, j++) {
2193 descs[j].name = diag_device_only[i].name;
2194 offset[j] = diag_device_only[i].offset;
2199 static const struct ib_device_ops mlx4_ib_hw_stats_ops = {
2200 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats,
2201 .alloc_hw_port_stats = mlx4_ib_alloc_hw_port_stats,
2202 .get_hw_stats = mlx4_ib_get_hw_stats,
2205 static const struct ib_device_ops mlx4_ib_hw_stats_ops1 = {
2206 .alloc_hw_device_stats = mlx4_ib_alloc_hw_device_stats,
2207 .get_hw_stats = mlx4_ib_get_hw_stats,
2210 static int mlx4_ib_alloc_diag_counters(struct mlx4_ib_dev *ibdev)
2212 struct mlx4_ib_diag_counters *diag = ibdev->diag_counters;
2215 bool per_port = !!(ibdev->dev->caps.flags2 &
2216 MLX4_DEV_CAP_FLAG2_DIAG_PER_PORT);
2218 if (mlx4_is_slave(ibdev->dev))
2221 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2223 * i == 1 means we are building port counters, set a different
2224 * stats ops without port stats callback.
2226 if (i && !per_port) {
2227 ib_set_device_ops(&ibdev->ib_dev,
2228 &mlx4_ib_hw_stats_ops1);
2233 ret = __mlx4_ib_alloc_diag_counters(ibdev, &diag[i].descs,
2235 &diag[i].num_counters, i);
2239 mlx4_ib_fill_diag_counters(ibdev, diag[i].descs,
2243 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_hw_stats_ops);
2249 kfree(diag[i - 1].descs);
2250 kfree(diag[i - 1].offset);
2256 static void mlx4_ib_diag_cleanup(struct mlx4_ib_dev *ibdev)
2260 for (i = 0; i < MLX4_DIAG_COUNTERS_TYPES; i++) {
2261 kfree(ibdev->diag_counters[i].offset);
2262 kfree(ibdev->diag_counters[i].descs);
2266 #define MLX4_IB_INVALID_MAC ((u64)-1)
2267 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
2268 struct net_device *dev,
2272 u64 release_mac = MLX4_IB_INVALID_MAC;
2273 struct mlx4_ib_qp *qp;
2275 new_smac = ether_addr_to_u64(dev->dev_addr);
2276 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
2278 /* no need for update QP1 and mac registration in non-SRIOV */
2279 if (!mlx4_is_mfunc(ibdev->dev))
2282 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
2283 qp = ibdev->qp1_proxy[port - 1];
2287 struct mlx4_update_qp_params update_params;
2289 mutex_lock(&qp->mutex);
2290 old_smac = qp->pri.smac;
2291 if (new_smac == old_smac)
2294 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
2296 if (new_smac_index < 0)
2299 update_params.smac_index = new_smac_index;
2300 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
2302 release_mac = new_smac;
2305 /* if old port was zero, no mac was yet registered for this QP */
2306 if (qp->pri.smac_port)
2307 release_mac = old_smac;
2308 qp->pri.smac = new_smac;
2309 qp->pri.smac_port = port;
2310 qp->pri.smac_index = new_smac_index;
2314 if (release_mac != MLX4_IB_INVALID_MAC)
2315 mlx4_unregister_mac(ibdev->dev, port, release_mac);
2317 mutex_unlock(&qp->mutex);
2318 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
2321 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
2322 struct net_device *dev,
2323 unsigned long event)
2326 struct mlx4_ib_iboe *iboe;
2327 int update_qps_port = -1;
2332 iboe = &ibdev->iboe;
2334 spin_lock_bh(&iboe->lock);
2335 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
2337 iboe->netdevs[port - 1] =
2338 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
2340 if (dev == iboe->netdevs[port - 1] &&
2341 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
2342 event == NETDEV_UP || event == NETDEV_CHANGE))
2343 update_qps_port = port;
2345 if (dev == iboe->netdevs[port - 1] &&
2346 (event == NETDEV_UP || event == NETDEV_DOWN)) {
2347 enum ib_port_state port_state;
2348 struct ib_event ibev = { };
2350 if (ib_get_cached_port_state(&ibdev->ib_dev, port,
2354 if (event == NETDEV_UP &&
2355 (port_state != IB_PORT_ACTIVE ||
2356 iboe->last_port_state[port - 1] != IB_PORT_DOWN))
2358 if (event == NETDEV_DOWN &&
2359 (port_state != IB_PORT_DOWN ||
2360 iboe->last_port_state[port - 1] != IB_PORT_ACTIVE))
2362 iboe->last_port_state[port - 1] = port_state;
2364 ibev.device = &ibdev->ib_dev;
2365 ibev.element.port_num = port;
2366 ibev.event = event == NETDEV_UP ? IB_EVENT_PORT_ACTIVE :
2368 ib_dispatch_event(&ibev);
2372 spin_unlock_bh(&iboe->lock);
2374 if (update_qps_port > 0)
2375 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
2378 static int mlx4_ib_netdev_event(struct notifier_block *this,
2379 unsigned long event, void *ptr)
2381 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2382 struct mlx4_ib_dev *ibdev;
2384 if (!net_eq(dev_net(dev), &init_net))
2387 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2388 mlx4_ib_scan_netdevs(ibdev, dev, event);
2393 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2399 if (mlx4_is_master(ibdev->dev)) {
2400 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2402 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2404 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2406 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2407 /* master has the identity virt2phys pkey mapping */
2408 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2409 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2410 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2411 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2415 /* initialize pkey cache */
2416 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2418 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2420 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2426 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2428 int i, j, eq = 0, total_eqs = 0;
2430 ibdev->eq_table = kcalloc(dev->caps.num_comp_vectors,
2431 sizeof(ibdev->eq_table[0]), GFP_KERNEL);
2432 if (!ibdev->eq_table)
2435 for (i = 1; i <= dev->caps.num_ports; i++) {
2436 for (j = 0; j < mlx4_get_eqs_per_port(dev, i);
2438 if (i > 1 && mlx4_is_eq_shared(dev, total_eqs))
2440 ibdev->eq_table[eq] = total_eqs;
2441 if (!mlx4_assign_eq(dev, i,
2442 &ibdev->eq_table[eq]))
2445 ibdev->eq_table[eq] = -1;
2449 for (i = eq; i < dev->caps.num_comp_vectors;
2450 ibdev->eq_table[i++] = -1)
2453 /* Advertise the new number of EQs to clients */
2454 ibdev->ib_dev.num_comp_vectors = eq;
2457 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2460 int total_eqs = ibdev->ib_dev.num_comp_vectors;
2462 /* no eqs were allocated */
2463 if (!ibdev->eq_table)
2466 /* Reset the advertised EQ number */
2467 ibdev->ib_dev.num_comp_vectors = 0;
2469 for (i = 0; i < total_eqs; i++)
2470 mlx4_release_eq(dev, ibdev->eq_table[i]);
2472 kfree(ibdev->eq_table);
2473 ibdev->eq_table = NULL;
2476 static int mlx4_port_immutable(struct ib_device *ibdev, u32 port_num,
2477 struct ib_port_immutable *immutable)
2479 struct ib_port_attr attr;
2480 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
2483 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND) {
2484 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2485 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2487 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)
2488 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2489 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2)
2490 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE |
2491 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
2492 immutable->core_cap_flags |= RDMA_CORE_PORT_RAW_PACKET;
2493 if (immutable->core_cap_flags & (RDMA_CORE_PORT_IBA_ROCE |
2494 RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP))
2495 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
2498 err = ib_query_port(ibdev, port_num, &attr);
2502 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2503 immutable->gid_tbl_len = attr.gid_tbl_len;
2508 static void get_fw_ver_str(struct ib_device *device, char *str)
2510 struct mlx4_ib_dev *dev =
2511 container_of(device, struct mlx4_ib_dev, ib_dev);
2512 snprintf(str, IB_FW_VERSION_NAME_MAX, "%d.%d.%d",
2513 (int) (dev->dev->caps.fw_ver >> 32),
2514 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
2515 (int) dev->dev->caps.fw_ver & 0xffff);
2518 static const struct ib_device_ops mlx4_ib_dev_ops = {
2519 .owner = THIS_MODULE,
2520 .driver_id = RDMA_DRIVER_MLX4,
2521 .uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION,
2523 .add_gid = mlx4_ib_add_gid,
2524 .alloc_mr = mlx4_ib_alloc_mr,
2525 .alloc_pd = mlx4_ib_alloc_pd,
2526 .alloc_ucontext = mlx4_ib_alloc_ucontext,
2527 .attach_mcast = mlx4_ib_mcg_attach,
2528 .create_ah = mlx4_ib_create_ah,
2529 .create_cq = mlx4_ib_create_cq,
2530 .create_qp = mlx4_ib_create_qp,
2531 .create_srq = mlx4_ib_create_srq,
2532 .dealloc_pd = mlx4_ib_dealloc_pd,
2533 .dealloc_ucontext = mlx4_ib_dealloc_ucontext,
2534 .del_gid = mlx4_ib_del_gid,
2535 .dereg_mr = mlx4_ib_dereg_mr,
2536 .destroy_ah = mlx4_ib_destroy_ah,
2537 .destroy_cq = mlx4_ib_destroy_cq,
2538 .destroy_qp = mlx4_ib_destroy_qp,
2539 .destroy_srq = mlx4_ib_destroy_srq,
2540 .detach_mcast = mlx4_ib_mcg_detach,
2541 .device_group = &mlx4_attr_group,
2542 .disassociate_ucontext = mlx4_ib_disassociate_ucontext,
2543 .drain_rq = mlx4_ib_drain_rq,
2544 .drain_sq = mlx4_ib_drain_sq,
2545 .get_dev_fw_str = get_fw_ver_str,
2546 .get_dma_mr = mlx4_ib_get_dma_mr,
2547 .get_link_layer = mlx4_ib_port_link_layer,
2548 .get_netdev = mlx4_ib_get_netdev,
2549 .get_port_immutable = mlx4_port_immutable,
2550 .map_mr_sg = mlx4_ib_map_mr_sg,
2551 .mmap = mlx4_ib_mmap,
2552 .modify_cq = mlx4_ib_modify_cq,
2553 .modify_device = mlx4_ib_modify_device,
2554 .modify_port = mlx4_ib_modify_port,
2555 .modify_qp = mlx4_ib_modify_qp,
2556 .modify_srq = mlx4_ib_modify_srq,
2557 .poll_cq = mlx4_ib_poll_cq,
2558 .post_recv = mlx4_ib_post_recv,
2559 .post_send = mlx4_ib_post_send,
2560 .post_srq_recv = mlx4_ib_post_srq_recv,
2561 .process_mad = mlx4_ib_process_mad,
2562 .query_ah = mlx4_ib_query_ah,
2563 .query_device = mlx4_ib_query_device,
2564 .query_gid = mlx4_ib_query_gid,
2565 .query_pkey = mlx4_ib_query_pkey,
2566 .query_port = mlx4_ib_query_port,
2567 .query_qp = mlx4_ib_query_qp,
2568 .query_srq = mlx4_ib_query_srq,
2569 .reg_user_mr = mlx4_ib_reg_user_mr,
2570 .req_notify_cq = mlx4_ib_arm_cq,
2571 .rereg_user_mr = mlx4_ib_rereg_user_mr,
2572 .resize_cq = mlx4_ib_resize_cq,
2574 INIT_RDMA_OBJ_SIZE(ib_ah, mlx4_ib_ah, ibah),
2575 INIT_RDMA_OBJ_SIZE(ib_cq, mlx4_ib_cq, ibcq),
2576 INIT_RDMA_OBJ_SIZE(ib_pd, mlx4_ib_pd, ibpd),
2577 INIT_RDMA_OBJ_SIZE(ib_qp, mlx4_ib_qp, ibqp),
2578 INIT_RDMA_OBJ_SIZE(ib_srq, mlx4_ib_srq, ibsrq),
2579 INIT_RDMA_OBJ_SIZE(ib_ucontext, mlx4_ib_ucontext, ibucontext),
2582 static const struct ib_device_ops mlx4_ib_dev_wq_ops = {
2583 .create_rwq_ind_table = mlx4_ib_create_rwq_ind_table,
2584 .create_wq = mlx4_ib_create_wq,
2585 .destroy_rwq_ind_table = mlx4_ib_destroy_rwq_ind_table,
2586 .destroy_wq = mlx4_ib_destroy_wq,
2587 .modify_wq = mlx4_ib_modify_wq,
2589 INIT_RDMA_OBJ_SIZE(ib_rwq_ind_table, mlx4_ib_rwq_ind_table,
2593 static const struct ib_device_ops mlx4_ib_dev_mw_ops = {
2594 .alloc_mw = mlx4_ib_alloc_mw,
2595 .dealloc_mw = mlx4_ib_dealloc_mw,
2597 INIT_RDMA_OBJ_SIZE(ib_mw, mlx4_ib_mw, ibmw),
2600 static const struct ib_device_ops mlx4_ib_dev_xrc_ops = {
2601 .alloc_xrcd = mlx4_ib_alloc_xrcd,
2602 .dealloc_xrcd = mlx4_ib_dealloc_xrcd,
2604 INIT_RDMA_OBJ_SIZE(ib_xrcd, mlx4_ib_xrcd, ibxrcd),
2607 static const struct ib_device_ops mlx4_ib_dev_fs_ops = {
2608 .create_flow = mlx4_ib_create_flow,
2609 .destroy_flow = mlx4_ib_destroy_flow,
2612 static void *mlx4_ib_add(struct mlx4_dev *dev)
2614 struct mlx4_ib_dev *ibdev;
2618 struct mlx4_ib_iboe *iboe;
2619 int ib_num_ports = 0;
2620 int num_req_counters;
2623 struct counter_index *new_counter_index;
2625 pr_info_once("%s", mlx4_ib_version);
2628 mlx4_foreach_ib_transport_port(i, dev)
2631 /* No point in registering a device with no ports... */
2635 ibdev = ib_alloc_device(mlx4_ib_dev, ib_dev);
2637 dev_err(&dev->persist->pdev->dev,
2638 "Device struct alloc failed\n");
2642 iboe = &ibdev->iboe;
2644 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2647 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2650 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2652 if (!ibdev->uar_map)
2654 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2657 ibdev->bond_next_port = 0;
2659 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2660 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2661 ibdev->num_ports = num_ports;
2662 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2663 1 : ibdev->num_ports;
2664 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2665 ibdev->ib_dev.dev.parent = &dev->persist->pdev->dev;
2667 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_ops);
2669 if ((dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS) &&
2670 ((mlx4_ib_port_link_layer(&ibdev->ib_dev, 1) ==
2671 IB_LINK_LAYER_ETHERNET) ||
2672 (mlx4_ib_port_link_layer(&ibdev->ib_dev, 2) ==
2673 IB_LINK_LAYER_ETHERNET)))
2674 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_wq_ops);
2676 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2677 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN)
2678 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_mw_ops);
2680 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2681 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_xrc_ops);
2684 if (check_flow_steering_support(dev)) {
2685 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2686 ib_set_device_ops(&ibdev->ib_dev, &mlx4_ib_dev_fs_ops);
2689 if (!dev->caps.userspace_caps)
2690 ibdev->ib_dev.ops.uverbs_abi_ver =
2691 MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2693 mlx4_ib_alloc_eqs(dev, ibdev);
2695 spin_lock_init(&iboe->lock);
2697 if (init_node_data(ibdev))
2699 mlx4_init_sl2vl_tbl(ibdev);
2701 for (i = 0; i < ibdev->num_ports; ++i) {
2702 mutex_init(&ibdev->counters_table[i].mutex);
2703 INIT_LIST_HEAD(&ibdev->counters_table[i].counters_list);
2704 iboe->last_port_state[i] = IB_PORT_DOWN;
2707 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2708 for (i = 0; i < num_req_counters; ++i) {
2709 mutex_init(&ibdev->qp1_proxy_lock[i]);
2711 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2712 IB_LINK_LAYER_ETHERNET) {
2713 err = mlx4_counter_alloc(ibdev->dev, &counter_index,
2714 MLX4_RES_USAGE_DRIVER);
2715 /* if failed to allocate a new counter, use default */
2718 mlx4_get_default_counter_index(dev,
2722 } else { /* IB_LINK_LAYER_INFINIBAND use the default counter */
2723 counter_index = mlx4_get_default_counter_index(dev,
2726 new_counter_index = kmalloc(sizeof(*new_counter_index),
2728 if (!new_counter_index) {
2730 mlx4_counter_free(ibdev->dev, counter_index);
2733 new_counter_index->index = counter_index;
2734 new_counter_index->allocated = allocated;
2735 list_add_tail(&new_counter_index->list,
2736 &ibdev->counters_table[i].counters_list);
2737 ibdev->counters_table[i].default_counter = counter_index;
2738 pr_info("counter index %d for port %d allocated %d\n",
2739 counter_index, i + 1, allocated);
2741 if (mlx4_is_bonded(dev))
2742 for (i = 1; i < ibdev->num_ports ; ++i) {
2744 kmalloc(sizeof(struct counter_index),
2746 if (!new_counter_index)
2748 new_counter_index->index = counter_index;
2749 new_counter_index->allocated = 0;
2750 list_add_tail(&new_counter_index->list,
2751 &ibdev->counters_table[i].counters_list);
2752 ibdev->counters_table[i].default_counter =
2756 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2759 spin_lock_init(&ibdev->sm_lock);
2760 mutex_init(&ibdev->cap_mask_mutex);
2761 INIT_LIST_HEAD(&ibdev->qp_list);
2762 spin_lock_init(&ibdev->reset_flow_resource_lock);
2764 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2766 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2767 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2768 MLX4_IB_UC_STEER_QPN_ALIGN,
2769 &ibdev->steer_qpn_base, 0,
2770 MLX4_RES_USAGE_DRIVER);
2774 ibdev->ib_uc_qpns_bitmap = bitmap_alloc(ibdev->steer_qpn_count,
2776 if (!ibdev->ib_uc_qpns_bitmap)
2777 goto err_steer_qp_release;
2779 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB) {
2780 bitmap_zero(ibdev->ib_uc_qpns_bitmap,
2781 ibdev->steer_qpn_count);
2782 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2783 dev, ibdev->steer_qpn_base,
2784 ibdev->steer_qpn_base +
2785 ibdev->steer_qpn_count - 1);
2787 goto err_steer_free_bitmap;
2789 bitmap_fill(ibdev->ib_uc_qpns_bitmap,
2790 ibdev->steer_qpn_count);
2794 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2795 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2797 if (mlx4_ib_alloc_diag_counters(ibdev))
2798 goto err_steer_free_bitmap;
2800 if (ib_register_device(&ibdev->ib_dev, "mlx4_%d",
2801 &dev->persist->pdev->dev))
2802 goto err_diag_counters;
2804 if (mlx4_ib_mad_init(ibdev))
2807 if (mlx4_ib_init_sriov(ibdev))
2810 if (!iboe->nb.notifier_call) {
2811 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2812 err = register_netdevice_notifier(&iboe->nb);
2814 iboe->nb.notifier_call = NULL;
2818 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) {
2819 err = mlx4_config_roce_v2_port(dev, ROCE_V2_UDP_DPORT);
2824 ibdev->ib_active = true;
2825 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2826 devlink_port_type_ib_set(mlx4_get_devlink_port(dev, i),
2829 if (mlx4_is_mfunc(ibdev->dev))
2832 /* create paravirt contexts for any VFs which are active */
2833 if (mlx4_is_master(ibdev->dev)) {
2834 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2835 if (j == mlx4_master_func_num(ibdev->dev))
2837 if (mlx4_is_slave_active(ibdev->dev, j))
2838 do_slave_init(ibdev, j, 1);
2844 if (ibdev->iboe.nb.notifier_call) {
2845 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2846 pr_warn("failure unregistering notifier\n");
2847 ibdev->iboe.nb.notifier_call = NULL;
2849 flush_workqueue(wq);
2851 mlx4_ib_close_sriov(ibdev);
2854 mlx4_ib_mad_cleanup(ibdev);
2857 ib_unregister_device(&ibdev->ib_dev);
2860 mlx4_ib_diag_cleanup(ibdev);
2862 err_steer_free_bitmap:
2863 bitmap_free(ibdev->ib_uc_qpns_bitmap);
2865 err_steer_qp_release:
2866 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2867 ibdev->steer_qpn_count);
2869 for (i = 0; i < ibdev->num_ports; ++i)
2870 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[i]);
2873 mlx4_ib_free_eqs(dev, ibdev);
2874 iounmap(ibdev->uar_map);
2877 mlx4_uar_free(dev, &ibdev->priv_uar);
2880 mlx4_pd_free(dev, ibdev->priv_pdn);
2883 ib_dealloc_device(&ibdev->ib_dev);
2888 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2892 WARN_ON(!dev->ib_uc_qpns_bitmap);
2894 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2895 dev->steer_qpn_count,
2896 get_count_order(count));
2900 *qpn = dev->steer_qpn_base + offset;
2904 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2907 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2910 if (WARN(qpn < dev->steer_qpn_base, "qpn = %u, steer_qpn_base = %u\n",
2911 qpn, dev->steer_qpn_base))
2912 /* not supposed to be here */
2915 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2916 qpn - dev->steer_qpn_base,
2917 get_count_order(count));
2920 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2925 struct ib_flow_attr *flow;
2926 struct ib_flow_spec_ib *ib_spec;
2929 flow_size = sizeof(struct ib_flow_attr) +
2930 sizeof(struct ib_flow_spec_ib);
2931 flow = kzalloc(flow_size, GFP_KERNEL);
2934 flow->port = mqp->port;
2935 flow->num_of_specs = 1;
2936 flow->size = flow_size;
2937 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2938 ib_spec->type = IB_FLOW_SPEC_IB;
2939 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2940 /* Add an empty rule for IB L2 */
2941 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2943 err = __mlx4_ib_create_flow(&mqp->ibqp, flow, MLX4_DOMAIN_NIC,
2944 MLX4_FS_REGULAR, &mqp->reg_id);
2949 return __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2952 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2954 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2958 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2959 devlink_port_type_clear(mlx4_get_devlink_port(dev, i));
2960 ibdev->ib_active = false;
2961 flush_workqueue(wq);
2963 if (ibdev->iboe.nb.notifier_call) {
2964 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2965 pr_warn("failure unregistering notifier\n");
2966 ibdev->iboe.nb.notifier_call = NULL;
2969 mlx4_ib_close_sriov(ibdev);
2970 mlx4_ib_mad_cleanup(ibdev);
2971 ib_unregister_device(&ibdev->ib_dev);
2972 mlx4_ib_diag_cleanup(ibdev);
2974 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2975 ibdev->steer_qpn_count);
2976 bitmap_free(ibdev->ib_uc_qpns_bitmap);
2978 iounmap(ibdev->uar_map);
2979 for (p = 0; p < ibdev->num_ports; ++p)
2980 mlx4_ib_delete_counters_table(ibdev, &ibdev->counters_table[p]);
2982 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
2983 mlx4_CLOSE_PORT(dev, p);
2985 mlx4_ib_free_eqs(dev, ibdev);
2987 mlx4_uar_free(dev, &ibdev->priv_uar);
2988 mlx4_pd_free(dev, ibdev->priv_pdn);
2989 ib_dealloc_device(&ibdev->ib_dev);
2992 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2994 struct mlx4_ib_demux_work **dm;
2995 struct mlx4_dev *dev = ibdev->dev;
2997 unsigned long flags;
2998 struct mlx4_active_ports actv_ports;
3000 unsigned int first_port;
3002 if (!mlx4_is_master(dev))
3005 actv_ports = mlx4_get_active_ports(dev, slave);
3006 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
3007 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
3009 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
3013 for (i = 0; i < ports; i++) {
3014 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
3020 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
3021 dm[i]->port = first_port + i + 1;
3022 dm[i]->slave = slave;
3023 dm[i]->do_init = do_init;
3026 /* initialize or tear down tunnel QPs for the slave */
3027 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
3028 if (!ibdev->sriov.is_going_down) {
3029 for (i = 0; i < ports; i++)
3030 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
3031 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3033 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
3034 for (i = 0; i < ports; i++)
3042 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
3044 struct mlx4_ib_qp *mqp;
3045 unsigned long flags_qp;
3046 unsigned long flags_cq;
3047 struct mlx4_ib_cq *send_mcq, *recv_mcq;
3048 struct list_head cq_notify_list;
3049 struct mlx4_cq *mcq;
3050 unsigned long flags;
3052 pr_warn("mlx4_ib_handle_catas_error was started\n");
3053 INIT_LIST_HEAD(&cq_notify_list);
3055 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
3056 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
3058 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
3059 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
3060 if (mqp->sq.tail != mqp->sq.head) {
3061 send_mcq = to_mcq(mqp->ibqp.send_cq);
3062 spin_lock_irqsave(&send_mcq->lock, flags_cq);
3063 if (send_mcq->mcq.comp &&
3064 mqp->ibqp.send_cq->comp_handler) {
3065 if (!send_mcq->mcq.reset_notify_added) {
3066 send_mcq->mcq.reset_notify_added = 1;
3067 list_add_tail(&send_mcq->mcq.reset_notify,
3071 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
3073 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
3074 /* Now, handle the QP's receive queue */
3075 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
3076 /* no handling is needed for SRQ */
3077 if (!mqp->ibqp.srq) {
3078 if (mqp->rq.tail != mqp->rq.head) {
3079 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
3080 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
3081 if (recv_mcq->mcq.comp &&
3082 mqp->ibqp.recv_cq->comp_handler) {
3083 if (!recv_mcq->mcq.reset_notify_added) {
3084 recv_mcq->mcq.reset_notify_added = 1;
3085 list_add_tail(&recv_mcq->mcq.reset_notify,
3089 spin_unlock_irqrestore(&recv_mcq->lock,
3093 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
3096 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
3099 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
3100 pr_warn("mlx4_ib_handle_catas_error ended\n");
3103 static void handle_bonded_port_state_event(struct work_struct *work)
3105 struct ib_event_work *ew =
3106 container_of(work, struct ib_event_work, work);
3107 struct mlx4_ib_dev *ibdev = ew->ib_dev;
3108 enum ib_port_state bonded_port_state = IB_PORT_NOP;
3110 struct ib_event ibev;
3113 spin_lock_bh(&ibdev->iboe.lock);
3114 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
3115 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
3116 enum ib_port_state curr_port_state;
3122 (netif_running(curr_netdev) &&
3123 netif_carrier_ok(curr_netdev)) ?
3124 IB_PORT_ACTIVE : IB_PORT_DOWN;
3126 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
3127 curr_port_state : IB_PORT_ACTIVE;
3129 spin_unlock_bh(&ibdev->iboe.lock);
3131 ibev.device = &ibdev->ib_dev;
3132 ibev.element.port_num = 1;
3133 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
3134 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
3136 ib_dispatch_event(&ibev);
3139 void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port)
3144 err = mlx4_ib_query_sl2vl(&mdev->ib_dev, port, &sl2vl);
3146 pr_err("Unable to get current sl to vl mapping for port %d. Using all zeroes (%d)\n",
3150 atomic64_set(&mdev->sl2vl[port - 1], sl2vl);
3153 static void ib_sl2vl_update_work(struct work_struct *work)
3155 struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
3156 struct mlx4_ib_dev *mdev = ew->ib_dev;
3157 int port = ew->port;
3159 mlx4_ib_sl2vl_update(mdev, port);
3164 void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
3167 struct ib_event_work *ew;
3169 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3171 INIT_WORK(&ew->work, ib_sl2vl_update_work);
3174 queue_work(wq, &ew->work);
3178 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
3179 enum mlx4_dev_event event, unsigned long param)
3181 struct ib_event ibev;
3182 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
3183 struct mlx4_eqe *eqe = NULL;
3184 struct ib_event_work *ew;
3187 if (mlx4_is_bonded(dev) &&
3188 ((event == MLX4_DEV_EVENT_PORT_UP) ||
3189 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
3190 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
3193 INIT_WORK(&ew->work, handle_bonded_port_state_event);
3195 queue_work(wq, &ew->work);
3199 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
3200 eqe = (struct mlx4_eqe *)param;
3205 case MLX4_DEV_EVENT_PORT_UP:
3206 if (p > ibdev->num_ports)
3208 if (!mlx4_is_slave(dev) &&
3209 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
3210 IB_LINK_LAYER_INFINIBAND) {
3211 if (mlx4_is_master(dev))
3212 mlx4_ib_invalidate_all_guid_record(ibdev, p);
3213 if (ibdev->dev->flags & MLX4_FLAG_SECURE_HOST &&
3214 !(ibdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SL_TO_VL_CHANGE_EVENT))
3215 mlx4_sched_ib_sl2vl_update_work(ibdev, p);
3217 ibev.event = IB_EVENT_PORT_ACTIVE;
3220 case MLX4_DEV_EVENT_PORT_DOWN:
3221 if (p > ibdev->num_ports)
3223 ibev.event = IB_EVENT_PORT_ERR;
3226 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
3227 ibdev->ib_active = false;
3228 ibev.event = IB_EVENT_DEVICE_FATAL;
3229 mlx4_ib_handle_catas_error(ibdev);
3232 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
3233 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
3237 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
3238 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
3240 /* need to queue only for port owner, which uses GEN_EQE */
3241 if (mlx4_is_master(dev))
3242 queue_work(wq, &ew->work);
3244 handle_port_mgmt_change_event(&ew->work);
3247 case MLX4_DEV_EVENT_SLAVE_INIT:
3248 /* here, p is the slave id */
3249 do_slave_init(ibdev, p, 1);
3250 if (mlx4_is_master(dev)) {
3253 for (i = 1; i <= ibdev->num_ports; i++) {
3254 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3255 == IB_LINK_LAYER_INFINIBAND)
3256 mlx4_ib_slave_alias_guid_event(ibdev,
3263 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
3264 if (mlx4_is_master(dev)) {
3267 for (i = 1; i <= ibdev->num_ports; i++) {
3268 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
3269 == IB_LINK_LAYER_INFINIBAND)
3270 mlx4_ib_slave_alias_guid_event(ibdev,
3275 /* here, p is the slave id */
3276 do_slave_init(ibdev, p, 0);
3283 ibev.device = ibdev_ptr;
3284 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
3286 ib_dispatch_event(&ibev);
3289 static struct mlx4_interface mlx4_ib_interface = {
3291 .remove = mlx4_ib_remove,
3292 .event = mlx4_ib_event,
3293 .protocol = MLX4_PROT_IB_IPV6,
3294 .flags = MLX4_INTFF_BONDING
3297 static int __init mlx4_ib_init(void)
3301 wq = alloc_ordered_workqueue("mlx4_ib", WQ_MEM_RECLAIM);
3305 err = mlx4_ib_qp_event_init();
3307 goto clean_qp_event;
3309 err = mlx4_ib_cm_init();
3313 err = mlx4_ib_mcg_init();
3317 err = mlx4_register_interface(&mlx4_ib_interface);
3324 mlx4_ib_mcg_destroy();
3327 mlx4_ib_cm_destroy();
3330 mlx4_ib_qp_event_cleanup();
3333 destroy_workqueue(wq);
3337 static void __exit mlx4_ib_cleanup(void)
3339 mlx4_unregister_interface(&mlx4_ib_interface);
3340 mlx4_ib_mcg_destroy();
3341 mlx4_ib_cm_destroy();
3342 mlx4_ib_qp_event_cleanup();
3343 destroy_workqueue(wq);
3346 module_init(mlx4_ib_init);
3347 module_exit(mlx4_ib_cleanup);