1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the MMC / SD / SDIO IP found in:
5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
7 * Copyright (C) 2015-19 Renesas Electronics Corporation
8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9 * Copyright (C) 2017 Horms Solutions, Simon Horman
10 * Copyright (C) 2011 Guennadi Liakhovetski
11 * Copyright (C) 2007 Ian Molton
12 * Copyright (C) 2004 Ian Molton
14 * This driver draws mainly on scattered spec sheets, Reverse engineering
15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16 * support). (Further 4 bit support from a later datasheet).
19 * Investigate using a workqueue for PIO transfers
21 * Better Power management
22 * Handle MMC errors better
23 * double buffer support
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/mmc/sdio.h>
46 #include <linux/scatterlist.h>
47 #include <linux/sizes.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
57 host->dma_ops->start(host, data);
60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
62 if (host->dma_ops && host->dma_ops->end)
63 host->dma_ops->end(host);
66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
69 host->dma_ops->enable(host, enable);
72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 struct tmio_mmc_data *pdata)
76 host->dma_ops->request(host, pdata);
83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
86 host->dma_ops->release(host);
89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
92 host->dma_ops->abort(host);
95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
98 host->dma_ops->dataend(host);
101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
103 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
110 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
117 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
122 host->sg_len = data->sg_len;
123 host->sg_ptr = data->sg;
124 host->sg_orig = data->sg;
128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
130 host->sg_ptr = sg_next(host->sg_ptr);
132 return --host->sg_len;
135 #define CMDREQ_TIMEOUT 5000
137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
139 struct tmio_mmc_host *host = mmc_priv(mmc);
141 if (enable && !host->sdio_irq_enabled) {
144 /* Keep device active while SDIO irq is enabled */
145 pm_runtime_get_sync(mmc_dev(mmc));
147 host->sdio_irq_enabled = true;
148 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
150 /* Clear obsolete interrupts before enabling */
151 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
156 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 } else if (!enable && host->sdio_irq_enabled) {
158 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
161 host->sdio_irq_enabled = false;
162 pm_runtime_mark_last_busy(mmc_dev(mmc));
163 pm_runtime_put_autosuspend(mmc_dev(mmc));
167 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
168 unsigned char bus_width)
170 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
171 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
173 /* reg now applies to MMC_BUS_WIDTH_4 */
174 if (bus_width == MMC_BUS_WIDTH_1)
175 reg |= CARD_OPT_WIDTH;
176 else if (bus_width == MMC_BUS_WIDTH_8)
177 reg |= CARD_OPT_WIDTH8;
179 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
182 static void tmio_mmc_reset(struct tmio_mmc_host *host)
184 /* FIXME - should we set stop clock reg here */
185 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
186 usleep_range(10000, 11000);
187 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
188 usleep_range(10000, 11000);
190 tmio_mmc_abort_dma(host);
195 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
196 host->sdcard_irq_mask = host->sdcard_irq_mask_all;
198 if (host->native_hotplug)
199 tmio_mmc_enable_mmc_irqs(host,
200 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
202 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
204 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
205 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
206 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
210 mmc_retune_needed(host->mmc);
213 static void tmio_mmc_reset_work(struct work_struct *work)
215 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
216 delayed_reset_work.work);
217 struct mmc_request *mrq;
220 spin_lock_irqsave(&host->lock, flags);
224 * is request already finished? Since we use a non-blocking
225 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
226 * us, so, have to check for IS_ERR(host->mrq)
228 if (IS_ERR_OR_NULL(mrq) ||
229 time_is_after_jiffies(host->last_req_ts +
230 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
231 spin_unlock_irqrestore(&host->lock, flags);
235 dev_warn(&host->pdev->dev,
236 "timeout waiting for hardware interrupt (CMD%u)\n",
240 host->data->error = -ETIMEDOUT;
242 host->cmd->error = -ETIMEDOUT;
244 mrq->cmd->error = -ETIMEDOUT;
249 spin_unlock_irqrestore(&host->lock, flags);
251 tmio_mmc_reset(host);
253 /* Ready for new calls */
255 mmc_request_done(host->mmc, mrq);
258 /* These are the bitmasks the tmio chip requires to implement the MMC response
259 * types. Note that R1 and R6 are the same in this scheme. */
260 #define APP_CMD 0x0040
261 #define RESP_NONE 0x0300
262 #define RESP_R1 0x0400
263 #define RESP_R1B 0x0500
264 #define RESP_R2 0x0600
265 #define RESP_R3 0x0700
266 #define DATA_PRESENT 0x0800
267 #define TRANSFER_READ 0x1000
268 #define TRANSFER_MULTI 0x2000
269 #define SECURITY_CMD 0x4000
270 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
272 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
273 struct mmc_command *cmd)
275 struct mmc_data *data = host->data;
278 switch (mmc_resp_type(cmd)) {
279 case MMC_RSP_NONE: c |= RESP_NONE; break;
281 case MMC_RSP_R1_NO_CRC:
283 case MMC_RSP_R1B: c |= RESP_R1B; break;
284 case MMC_RSP_R2: c |= RESP_R2; break;
285 case MMC_RSP_R3: c |= RESP_R3; break;
287 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
293 /* FIXME - this seems to be ok commented out but the spec suggest this bit
294 * should be set when issuing app commands.
295 * if(cmd->flags & MMC_FLAG_ACMD)
300 if (data->blocks > 1) {
301 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
305 * Disable auto CMD12 at IO_RW_EXTENDED and
306 * SET_BLOCK_COUNT when doing multiple block transfer
308 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
309 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
312 if (data->flags & MMC_DATA_READ)
316 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
318 /* Fire off the command */
319 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
320 sd_ctrl_write16(host, CTL_SD_CMD, c);
325 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
329 int is_read = host->data->flags & MMC_DATA_READ;
335 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
337 u32 *buf32 = (u32 *)buf;
340 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
343 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
346 /* if count was multiple of 4 */
354 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
355 memcpy(buf32, &data, count);
357 memcpy(&data, buf32, count);
358 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
365 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
367 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
369 /* if count was even number */
373 /* if count was odd number */
374 buf8 = (u8 *)(buf + (count >> 1));
379 * driver and this function are assuming that
380 * it is used as little endian
383 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
385 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
389 * This chip always returns (at least?) as much data as you ask for.
390 * I'm unsure what happens if you ask for less than a block. This should be
391 * looked into to ensure that a funny length read doesn't hose the controller.
393 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
395 struct mmc_data *data = host->data;
402 pr_err("PIO IRQ in DMA mode!\n");
405 pr_debug("Spurious PIO IRQ\n");
409 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
410 buf = (unsigned short *)(sg_virt + host->sg_off);
412 count = host->sg_ptr->length - host->sg_off;
413 if (count > data->blksz)
416 pr_debug("count: %08x offset: %08x flags %08x\n",
417 count, host->sg_off, data->flags);
419 /* Transfer the data */
420 tmio_mmc_transfer_data(host, buf, count);
422 host->sg_off += count;
424 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
426 if (host->sg_off == host->sg_ptr->length)
427 tmio_mmc_next_sg(host);
430 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
432 if (host->sg_ptr == &host->bounce_sg) {
434 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
436 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
437 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
441 /* needs to be called with host->lock held */
442 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
444 struct mmc_data *data = host->data;
445 struct mmc_command *stop;
450 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
455 /* FIXME - return correct transfer count on errors */
457 data->bytes_xfered = data->blocks * data->blksz;
459 data->bytes_xfered = 0;
461 pr_debug("Completed data request\n");
464 * FIXME: other drivers allow an optional stop command of any given type
465 * which we dont do, as the chip can auto generate them.
466 * Perhaps we can be smarter about when to use auto CMD12 and
467 * only issue the auto request when we know this is the desired
468 * stop command, allowing fallback to the stop command the
469 * upper layers expect. For now, we do what works.
472 if (data->flags & MMC_DATA_READ) {
474 tmio_mmc_check_bounce_buffer(host);
475 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
478 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
482 if (stop && !host->mrq->sbc) {
483 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
484 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
485 stop->opcode, stop->arg);
487 /* fill in response from auto CMD12 */
488 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
490 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
493 schedule_work(&host->done);
495 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
497 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
499 struct mmc_data *data;
501 spin_lock(&host->lock);
507 if (stat & TMIO_STAT_DATATIMEOUT)
508 data->error = -ETIMEDOUT;
509 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
510 stat & TMIO_STAT_TXUNDERRUN)
511 data->error = -EILSEQ;
512 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
513 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
517 * Has all data been written out yet? Testing on SuperH showed,
518 * that in most cases the first interrupt comes already with the
519 * BUSY status bit clear, but on some operations, like mount or
520 * in the beginning of a write / sync / umount, there is one
521 * DATAEND interrupt with the BUSY bit set, in this cases
522 * waiting for one more interrupt fixes the problem.
524 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
525 if (status & TMIO_STAT_SCLKDIVEN)
528 if (!(status & TMIO_STAT_CMD_BUSY))
533 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
534 tmio_mmc_dataend_dma(host);
536 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
537 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
538 tmio_mmc_dataend_dma(host);
540 tmio_mmc_do_data_irq(host);
541 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
544 spin_unlock(&host->lock);
547 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
549 struct mmc_command *cmd = host->cmd;
552 spin_lock(&host->lock);
555 pr_debug("Spurious CMD irq\n");
559 /* This controller is sicker than the PXA one. Not only do we need to
560 * drop the top 8 bits of the first response word, we also need to
561 * modify the order of the response for short response command types.
564 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
565 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
567 if (cmd->flags & MMC_RSP_136) {
568 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
569 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
570 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
572 } else if (cmd->flags & MMC_RSP_R3) {
573 cmd->resp[0] = cmd->resp[3];
576 if (stat & TMIO_STAT_CMDTIMEOUT)
577 cmd->error = -ETIMEDOUT;
578 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
579 stat & TMIO_STAT_STOPBIT_ERR ||
580 stat & TMIO_STAT_CMD_IDX_ERR)
581 cmd->error = -EILSEQ;
583 /* If there is data to handle we enable data IRQs here, and
584 * we will ultimatley finish the request in the data_end handler.
585 * If theres no data or we encountered an error, finish now.
587 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
588 if (host->data->flags & MMC_DATA_READ) {
590 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
592 tmio_mmc_disable_mmc_irqs(host,
594 tasklet_schedule(&host->dma_issue);
598 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
600 tmio_mmc_disable_mmc_irqs(host,
602 tasklet_schedule(&host->dma_issue);
606 schedule_work(&host->done);
610 spin_unlock(&host->lock);
613 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
614 int ireg, int status)
616 struct mmc_host *mmc = host->mmc;
618 /* Card insert / remove attempts */
619 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
620 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
621 TMIO_STAT_CARD_REMOVE);
622 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
623 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
624 !work_pending(&mmc->detect.work))
625 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
632 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
635 /* Command completion */
636 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
637 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
638 TMIO_STAT_CMDTIMEOUT);
639 tmio_mmc_cmd_irq(host, status);
644 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
645 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
646 tmio_mmc_pio_irq(host);
650 /* Data transfer completion */
651 if (ireg & TMIO_STAT_DATAEND) {
652 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
653 tmio_mmc_data_irq(host, status);
660 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
662 struct mmc_host *mmc = host->mmc;
663 struct tmio_mmc_data *pdata = host->pdata;
664 unsigned int ireg, status;
665 unsigned int sdio_status;
667 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
670 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
671 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
673 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
674 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
675 sdio_status |= TMIO_SDIO_SETBITS_MASK;
677 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
679 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
680 mmc_signal_sdio_irq(mmc);
685 irqreturn_t tmio_mmc_irq(int irq, void *devid)
687 struct tmio_mmc_host *host = devid;
688 unsigned int ireg, status;
690 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
691 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
693 /* Clear the status except the interrupt status */
694 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
696 if (__tmio_mmc_card_detect_irq(host, ireg, status))
698 if (__tmio_mmc_sdcard_irq(host, ireg, status))
701 if (__tmio_mmc_sdio_irq(host))
706 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
708 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
709 struct mmc_data *data)
711 struct tmio_mmc_data *pdata = host->pdata;
713 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
714 data->blksz, data->blocks);
716 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
717 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
718 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
719 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
721 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
722 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
723 mmc_hostname(host->mmc), data->blksz);
728 tmio_mmc_init_sg(host, data);
730 host->dma_on = false;
732 /* Set transfer length / blocksize */
733 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
734 if (host->mmc->max_blk_count >= SZ_64K)
735 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
737 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
739 tmio_mmc_start_dma(host, data);
744 static void tmio_process_mrq(struct tmio_mmc_host *host,
745 struct mmc_request *mrq)
747 struct mmc_command *cmd;
750 if (mrq->sbc && host->cmd != mrq->sbc) {
755 ret = tmio_mmc_start_data(host, mrq->data);
761 ret = tmio_mmc_start_command(host, cmd);
765 schedule_delayed_work(&host->delayed_reset_work,
766 msecs_to_jiffies(CMDREQ_TIMEOUT));
771 mrq->cmd->error = ret;
772 mmc_request_done(host->mmc, mrq);
775 /* Process requests from the MMC layer */
776 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
778 struct tmio_mmc_host *host = mmc_priv(mmc);
781 spin_lock_irqsave(&host->lock, flags);
784 pr_debug("request not null\n");
785 if (IS_ERR(host->mrq)) {
786 spin_unlock_irqrestore(&host->lock, flags);
787 mrq->cmd->error = -EAGAIN;
788 mmc_request_done(mmc, mrq);
793 host->last_req_ts = jiffies;
797 spin_unlock_irqrestore(&host->lock, flags);
799 tmio_process_mrq(host, mrq);
802 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
804 struct mmc_request *mrq;
807 spin_lock_irqsave(&host->lock, flags);
809 tmio_mmc_end_dma(host);
812 if (IS_ERR_OR_NULL(mrq)) {
813 spin_unlock_irqrestore(&host->lock, flags);
817 /* If not SET_BLOCK_COUNT, clear old data */
818 if (host->cmd != mrq->sbc) {
824 cancel_delayed_work(&host->delayed_reset_work);
826 spin_unlock_irqrestore(&host->lock, flags);
828 if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
829 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
830 tmio_mmc_abort_dma(host);
833 /* Error means retune, but executed command was still successful */
834 if (host->check_retune && host->check_retune(host, mrq))
835 mmc_retune_needed(host->mmc);
837 /* If SET_BLOCK_COUNT, continue with main command */
838 if (host->mrq && !mrq->cmd->error) {
839 tmio_process_mrq(host, mrq);
843 if (host->fixup_request)
844 host->fixup_request(host, mrq);
846 mmc_request_done(host->mmc, mrq);
849 static void tmio_mmc_done_work(struct work_struct *work)
851 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
853 tmio_mmc_finish_request(host);
856 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
858 struct mmc_host *mmc = host->mmc;
861 /* .set_ios() is returning void, so, no chance to report an error */
864 host->set_pwr(host->pdev, 1);
866 if (!IS_ERR(mmc->supply.vmmc)) {
867 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
869 * Attention: empiric value. With a b43 WiFi SDIO card this
870 * delay proved necessary for reliable card-insertion probing.
871 * 100us were not enough. Is this the same 140us delay, as in
872 * tmio_mmc_set_ios()?
874 usleep_range(200, 300);
877 * It seems, VccQ should be switched on after Vcc, this is also what the
878 * omap_hsmmc.c driver does.
880 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
881 ret = regulator_enable(mmc->supply.vqmmc);
882 usleep_range(200, 300);
886 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
890 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
892 struct mmc_host *mmc = host->mmc;
894 if (!IS_ERR(mmc->supply.vqmmc))
895 regulator_disable(mmc->supply.vqmmc);
897 if (!IS_ERR(mmc->supply.vmmc))
898 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
901 host->set_pwr(host->pdev, 0);
904 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
906 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
908 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
909 return 1 << (13 + val);
912 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
914 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
916 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
917 (clk_rate / MSEC_PER_SEC);
920 /* Set MMC clock / power.
921 * Note: This controller uses a simple divider scheme therefore it cannot
922 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
923 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
926 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
928 struct tmio_mmc_host *host = mmc_priv(mmc);
929 struct device *dev = &host->pdev->dev;
932 mutex_lock(&host->ios_lock);
934 spin_lock_irqsave(&host->lock, flags);
936 if (IS_ERR(host->mrq)) {
938 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
939 current->comm, task_pid_nr(current),
940 ios->clock, ios->power_mode);
941 host->mrq = ERR_PTR(-EINTR);
944 "%s.%d: CMD%u active since %lu, now %lu!\n",
945 current->comm, task_pid_nr(current),
946 host->mrq->cmd->opcode, host->last_req_ts,
949 spin_unlock_irqrestore(&host->lock, flags);
951 mutex_unlock(&host->ios_lock);
955 host->mrq = ERR_PTR(-EBUSY);
957 spin_unlock_irqrestore(&host->lock, flags);
959 switch (ios->power_mode) {
961 tmio_mmc_power_off(host);
962 /* For R-Car Gen2+, we need to reset SDHI specific SCC */
963 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) {
966 if (host->native_hotplug)
967 tmio_mmc_enable_mmc_irqs(host,
968 TMIO_STAT_CARD_REMOVE |
969 TMIO_STAT_CARD_INSERT);
972 host->set_clock(host, 0);
975 tmio_mmc_power_on(host, ios->vdd);
976 host->set_clock(host, ios->clock);
977 tmio_mmc_set_bus_width(host, ios->bus_width);
980 host->set_clock(host, ios->clock);
981 tmio_mmc_set_bus_width(host, ios->bus_width);
985 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
986 tmio_mmc_max_busy_timeout(host);
988 /* Let things settle. delay taken from winCE driver */
989 usleep_range(140, 200);
990 if (PTR_ERR(host->mrq) == -EINTR)
991 dev_dbg(&host->pdev->dev,
992 "%s.%d: IOS interrupted: clk %u, mode %u",
993 current->comm, task_pid_nr(current),
994 ios->clock, ios->power_mode);
997 host->clk_cache = ios->clock;
999 mutex_unlock(&host->ios_lock);
1002 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1004 struct tmio_mmc_host *host = mmc_priv(mmc);
1006 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1007 TMIO_STAT_WRPROTECT);
1010 static int tmio_mmc_get_cd(struct mmc_host *mmc)
1012 struct tmio_mmc_host *host = mmc_priv(mmc);
1014 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1015 TMIO_STAT_SIGSTATE);
1018 static int tmio_multi_io_quirk(struct mmc_card *card,
1019 unsigned int direction, int blk_size)
1021 struct tmio_mmc_host *host = mmc_priv(card->host);
1023 if (host->multi_io_quirk)
1024 return host->multi_io_quirk(card, direction, blk_size);
1029 static struct mmc_host_ops tmio_mmc_ops = {
1030 .request = tmio_mmc_request,
1031 .set_ios = tmio_mmc_set_ios,
1032 .get_ro = tmio_mmc_get_ro,
1033 .get_cd = tmio_mmc_get_cd,
1034 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1035 .multi_io_quirk = tmio_multi_io_quirk,
1038 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1040 struct tmio_mmc_data *pdata = host->pdata;
1041 struct mmc_host *mmc = host->mmc;
1044 err = mmc_regulator_get_supply(mmc);
1048 /* use ocr_mask if no regulator */
1049 if (!mmc->ocr_avail)
1050 mmc->ocr_avail = pdata->ocr_mask;
1054 * There is possibility that regulator has not been probed
1056 if (!mmc->ocr_avail)
1057 return -EPROBE_DEFER;
1062 static void tmio_mmc_of_parse(struct platform_device *pdev,
1063 struct mmc_host *mmc)
1065 const struct device_node *np = pdev->dev.of_node;
1072 * For new platforms, please use "disable-wp" instead of
1073 * "toshiba,mmc-wrprotect-disable"
1075 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1076 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1079 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1080 struct tmio_mmc_data *pdata)
1082 struct tmio_mmc_host *host;
1083 struct mmc_host *mmc;
1087 ctl = devm_platform_ioremap_resource(pdev, 0);
1089 return ERR_CAST(ctl);
1091 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1093 return ERR_PTR(-ENOMEM);
1095 host = mmc_priv(mmc);
1099 host->pdata = pdata;
1100 host->ops = tmio_mmc_ops;
1101 mmc->ops = &host->ops;
1103 ret = mmc_of_parse(host->mmc);
1105 host = ERR_PTR(ret);
1109 tmio_mmc_of_parse(pdev, mmc);
1111 platform_set_drvdata(pdev, host);
1119 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1121 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1123 mmc_free_host(host->mmc);
1125 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1127 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1129 struct platform_device *pdev = _host->pdev;
1130 struct tmio_mmc_data *pdata = _host->pdata;
1131 struct mmc_host *mmc = _host->mmc;
1135 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1136 * looping forever...
1138 if (mmc->f_min == 0)
1141 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1142 _host->write16_hook = NULL;
1144 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
1145 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
1147 _host->set_pwr = pdata->set_pwr;
1149 ret = tmio_mmc_init_ocr(_host);
1154 * Look for a card detect GPIO, if it fails with anything
1155 * else than a probe deferral, just live without it.
1157 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1158 if (ret == -EPROBE_DEFER)
1161 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1162 mmc->caps2 |= pdata->capabilities2;
1163 mmc->max_segs = pdata->max_segs ? : 32;
1164 mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1165 mmc->max_blk_count = pdata->max_blk_count ? :
1166 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1167 mmc->max_req_size = min_t(size_t,
1168 mmc->max_blk_size * mmc->max_blk_count,
1169 dma_max_mapping_size(&pdev->dev));
1170 mmc->max_seg_size = mmc->max_req_size;
1172 if (mmc_can_gpio_ro(mmc))
1173 _host->ops.get_ro = mmc_gpio_get_ro;
1175 if (mmc_can_gpio_cd(mmc))
1176 _host->ops.get_cd = mmc_gpio_get_cd;
1178 _host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1179 mmc->caps & MMC_CAP_NEEDS_POLL ||
1180 !mmc_card_is_removable(mmc));
1183 * While using internal tmio hardware logic for card detection, we need
1184 * to ensure it stays powered for it to work.
1186 if (_host->native_hotplug)
1187 pm_runtime_get_noresume(&pdev->dev);
1189 _host->sdio_irq_enabled = false;
1190 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1191 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1193 if (!_host->sdcard_irq_mask_all)
1194 _host->sdcard_irq_mask_all = TMIO_MASK_ALL;
1196 _host->set_clock(_host, 0);
1197 tmio_mmc_reset(_host);
1199 spin_lock_init(&_host->lock);
1200 mutex_init(&_host->ios_lock);
1202 /* Init delayed work for request timeouts */
1203 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1204 INIT_WORK(&_host->done, tmio_mmc_done_work);
1206 /* See if we also get DMA */
1207 tmio_mmc_request_dma(_host, pdata);
1209 pm_runtime_get_noresume(&pdev->dev);
1210 pm_runtime_set_active(&pdev->dev);
1211 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1212 pm_runtime_use_autosuspend(&pdev->dev);
1213 pm_runtime_enable(&pdev->dev);
1215 ret = mmc_add_host(mmc);
1219 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1220 pm_runtime_put(&pdev->dev);
1225 pm_runtime_put_noidle(&pdev->dev);
1226 tmio_mmc_host_remove(_host);
1229 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1231 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1233 struct platform_device *pdev = host->pdev;
1234 struct mmc_host *mmc = host->mmc;
1236 pm_runtime_get_sync(&pdev->dev);
1238 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1239 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1241 dev_pm_qos_hide_latency_limit(&pdev->dev);
1243 mmc_remove_host(mmc);
1244 cancel_work_sync(&host->done);
1245 cancel_delayed_work_sync(&host->delayed_reset_work);
1246 tmio_mmc_release_dma(host);
1247 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1249 if (host->native_hotplug)
1250 pm_runtime_put_noidle(&pdev->dev);
1252 pm_runtime_disable(&pdev->dev);
1253 pm_runtime_dont_use_autosuspend(&pdev->dev);
1254 pm_runtime_put_noidle(&pdev->dev);
1256 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1259 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1261 if (!host->clk_enable)
1264 return host->clk_enable(host);
1267 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1269 if (host->clk_disable)
1270 host->clk_disable(host);
1273 int tmio_mmc_host_runtime_suspend(struct device *dev)
1275 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1277 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1279 if (host->clk_cache)
1280 host->set_clock(host, 0);
1282 tmio_mmc_clk_disable(host);
1286 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1288 int tmio_mmc_host_runtime_resume(struct device *dev)
1290 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1292 tmio_mmc_clk_enable(host);
1293 tmio_mmc_reset(host);
1295 if (host->clk_cache)
1296 host->set_clock(host, host->clk_cache);
1298 if (host->native_hotplug)
1299 tmio_mmc_enable_mmc_irqs(host,
1300 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1302 tmio_mmc_enable_dma(host, true);
1306 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1309 MODULE_LICENSE("GPL v2");