1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SiFive FU540 Platform DMA driver
4 * Copyright (C) 2019 SiFive
7 * - drivers/dma/fsl-edma.c
8 * - drivers/dma/dw-edma/
9 * - drivers/dma/pxa-dma.c
11 * See the following sources for further documentation:
12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
13 * SiFive FU540-C000 v1.0
14 * https://static.dev.sifive.com/FU540-C000-v1.0.pdf
16 #include <linux/module.h>
17 #include <linux/device.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/mod_devicetable.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/slab.h>
28 static inline unsigned long long readq(void __iomem *addr)
30 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
35 static inline void writeq(unsigned long long v, void __iomem *addr)
37 writel(lower_32_bits(v), addr);
38 writel(upper_32_bits(v), addr + 4);
42 static inline struct sf_pdma_chan *to_sf_pdma_chan(struct dma_chan *dchan)
44 return container_of(dchan, struct sf_pdma_chan, vchan.chan);
47 static inline struct sf_pdma_desc *to_sf_pdma_desc(struct virt_dma_desc *vd)
49 return container_of(vd, struct sf_pdma_desc, vdesc);
52 static struct sf_pdma_desc *sf_pdma_alloc_desc(struct sf_pdma_chan *chan)
54 struct sf_pdma_desc *desc;
57 spin_lock_irqsave(&chan->lock, flags);
59 if (chan->desc && !chan->desc->in_use) {
60 spin_unlock_irqrestore(&chan->lock, flags);
64 spin_unlock_irqrestore(&chan->lock, flags);
66 desc = kzalloc(sizeof(*desc), GFP_NOWAIT);
75 static void sf_pdma_fill_desc(struct sf_pdma_desc *desc,
76 u64 dst, u64 src, u64 size)
78 desc->xfer_type = PDMA_FULL_SPEED;
79 desc->xfer_size = size;
84 static void sf_pdma_disclaim_chan(struct sf_pdma_chan *chan)
86 struct pdma_regs *regs = &chan->regs;
88 writel(PDMA_CLEAR_CTRL, regs->ctrl);
91 static struct dma_async_tx_descriptor *
92 sf_pdma_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t dest, dma_addr_t src,
93 size_t len, unsigned long flags)
95 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan);
96 struct sf_pdma_desc *desc;
99 if (chan && (!len || !dest || !src)) {
100 dev_err(chan->pdma->dma_dev.dev,
101 "Please check dma len, dest, src!\n");
105 desc = sf_pdma_alloc_desc(chan);
110 desc->dirn = DMA_MEM_TO_MEM;
111 desc->async_tx = vchan_tx_prep(&chan->vchan, &desc->vdesc, flags);
113 spin_lock_irqsave(&chan->vchan.lock, iflags);
115 sf_pdma_fill_desc(desc, dest, src, len);
116 spin_unlock_irqrestore(&chan->vchan.lock, iflags);
118 return desc->async_tx;
121 static int sf_pdma_slave_config(struct dma_chan *dchan,
122 struct dma_slave_config *cfg)
124 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan);
126 memcpy(&chan->cfg, cfg, sizeof(*cfg));
131 static int sf_pdma_alloc_chan_resources(struct dma_chan *dchan)
133 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan);
134 struct pdma_regs *regs = &chan->regs;
136 dma_cookie_init(dchan);
137 writel(PDMA_CLAIM_MASK, regs->ctrl);
142 static void sf_pdma_disable_request(struct sf_pdma_chan *chan)
144 struct pdma_regs *regs = &chan->regs;
146 writel(readl(regs->ctrl) & ~PDMA_RUN_MASK, regs->ctrl);
149 static void sf_pdma_free_chan_resources(struct dma_chan *dchan)
151 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan);
155 spin_lock_irqsave(&chan->vchan.lock, flags);
156 sf_pdma_disable_request(chan);
159 vchan_get_all_descriptors(&chan->vchan, &head);
160 sf_pdma_disclaim_chan(chan);
161 spin_unlock_irqrestore(&chan->vchan.lock, flags);
162 vchan_dma_desc_free_list(&chan->vchan, &head);
165 static size_t sf_pdma_desc_residue(struct sf_pdma_chan *chan,
168 struct virt_dma_desc *vd = NULL;
169 struct pdma_regs *regs = &chan->regs;
172 struct sf_pdma_desc *desc;
173 struct dma_async_tx_descriptor *tx;
175 spin_lock_irqsave(&chan->vchan.lock, flags);
177 tx = &chan->desc->vdesc.tx;
178 if (cookie == tx->chan->completed_cookie)
181 if (cookie == tx->cookie) {
182 residue = readq(regs->residue);
184 vd = vchan_find_desc(&chan->vchan, cookie);
188 desc = to_sf_pdma_desc(vd);
189 residue = desc->xfer_size;
193 spin_unlock_irqrestore(&chan->vchan.lock, flags);
197 static enum dma_status
198 sf_pdma_tx_status(struct dma_chan *dchan,
200 struct dma_tx_state *txstate)
202 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan);
203 enum dma_status status;
205 status = dma_cookie_status(dchan, cookie, txstate);
207 if (txstate && status != DMA_ERROR)
208 dma_set_residue(txstate, sf_pdma_desc_residue(chan, cookie));
213 static int sf_pdma_terminate_all(struct dma_chan *dchan)
215 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan);
219 spin_lock_irqsave(&chan->vchan.lock, flags);
220 sf_pdma_disable_request(chan);
223 chan->xfer_err = false;
224 vchan_get_all_descriptors(&chan->vchan, &head);
225 spin_unlock_irqrestore(&chan->vchan.lock, flags);
226 vchan_dma_desc_free_list(&chan->vchan, &head);
231 static void sf_pdma_enable_request(struct sf_pdma_chan *chan)
233 struct pdma_regs *regs = &chan->regs;
236 v = PDMA_CLAIM_MASK |
237 PDMA_ENABLE_DONE_INT_MASK |
238 PDMA_ENABLE_ERR_INT_MASK |
241 writel(v, regs->ctrl);
244 static void sf_pdma_xfer_desc(struct sf_pdma_chan *chan)
246 struct sf_pdma_desc *desc = chan->desc;
247 struct pdma_regs *regs = &chan->regs;
250 dev_err(chan->pdma->dma_dev.dev, "NULL desc.\n");
254 writel(desc->xfer_type, regs->xfer_type);
255 writeq(desc->xfer_size, regs->xfer_size);
256 writeq(desc->dst_addr, regs->dst_addr);
257 writeq(desc->src_addr, regs->src_addr);
260 chan->status = DMA_IN_PROGRESS;
261 sf_pdma_enable_request(chan);
264 static void sf_pdma_issue_pending(struct dma_chan *dchan)
266 struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan);
269 spin_lock_irqsave(&chan->vchan.lock, flags);
271 if (vchan_issue_pending(&chan->vchan) && chan->desc)
272 sf_pdma_xfer_desc(chan);
274 spin_unlock_irqrestore(&chan->vchan.lock, flags);
277 static void sf_pdma_free_desc(struct virt_dma_desc *vdesc)
279 struct sf_pdma_desc *desc;
281 desc = to_sf_pdma_desc(vdesc);
282 desc->in_use = false;
285 static void sf_pdma_donebh_tasklet(struct tasklet_struct *t)
287 struct sf_pdma_chan *chan = from_tasklet(chan, t, done_tasklet);
290 spin_lock_irqsave(&chan->lock, flags);
291 if (chan->xfer_err) {
292 chan->retries = MAX_RETRY;
293 chan->status = DMA_COMPLETE;
294 chan->xfer_err = false;
296 spin_unlock_irqrestore(&chan->lock, flags);
298 spin_lock_irqsave(&chan->vchan.lock, flags);
299 list_del(&chan->desc->vdesc.node);
300 vchan_cookie_complete(&chan->desc->vdesc);
301 spin_unlock_irqrestore(&chan->vchan.lock, flags);
304 static void sf_pdma_errbh_tasklet(struct tasklet_struct *t)
306 struct sf_pdma_chan *chan = from_tasklet(chan, t, err_tasklet);
307 struct sf_pdma_desc *desc = chan->desc;
310 spin_lock_irqsave(&chan->lock, flags);
311 if (chan->retries <= 0) {
312 /* fail to recover */
313 spin_unlock_irqrestore(&chan->lock, flags);
314 dmaengine_desc_get_callback_invoke(desc->async_tx, NULL);
318 chan->xfer_err = true;
319 chan->status = DMA_ERROR;
321 sf_pdma_enable_request(chan);
322 spin_unlock_irqrestore(&chan->lock, flags);
326 static irqreturn_t sf_pdma_done_isr(int irq, void *dev_id)
328 struct sf_pdma_chan *chan = dev_id;
329 struct pdma_regs *regs = &chan->regs;
332 spin_lock(&chan->vchan.lock);
333 writel((readl(regs->ctrl)) & ~PDMA_DONE_STATUS_MASK, regs->ctrl);
334 residue = readq(regs->residue);
337 tasklet_hi_schedule(&chan->done_tasklet);
339 /* submit next trascatioin if possible */
340 struct sf_pdma_desc *desc = chan->desc;
342 desc->src_addr += desc->xfer_size - residue;
343 desc->dst_addr += desc->xfer_size - residue;
344 desc->xfer_size = residue;
346 sf_pdma_xfer_desc(chan);
349 spin_unlock(&chan->vchan.lock);
354 static irqreturn_t sf_pdma_err_isr(int irq, void *dev_id)
356 struct sf_pdma_chan *chan = dev_id;
357 struct pdma_regs *regs = &chan->regs;
359 spin_lock(&chan->lock);
360 writel((readl(regs->ctrl)) & ~PDMA_ERR_STATUS_MASK, regs->ctrl);
361 spin_unlock(&chan->lock);
363 tasklet_schedule(&chan->err_tasklet);
369 * sf_pdma_irq_init() - Init PDMA IRQ Handlers
370 * @pdev: pointer of platform_device
371 * @pdma: pointer of PDMA engine. Caller should check NULL
373 * Initialize DONE and ERROR interrupt handler for 4 channels. Caller should
374 * make sure the pointer passed in are non-NULL. This function should be called
375 * only one time during the device probe.
377 * Context: Any context.
380 * * 0 - OK to init all IRQ handlers
381 * * -EINVAL - Fail to request IRQ
383 static int sf_pdma_irq_init(struct platform_device *pdev, struct sf_pdma *pdma)
386 struct sf_pdma_chan *chan;
388 for (i = 0; i < pdma->n_chans; i++) {
389 chan = &pdma->chans[i];
391 irq = platform_get_irq(pdev, i * 2);
393 dev_err(&pdev->dev, "ch(%d) Can't get done irq.\n", i);
397 r = devm_request_irq(&pdev->dev, irq, sf_pdma_done_isr, 0,
398 dev_name(&pdev->dev), (void *)chan);
400 dev_err(&pdev->dev, "Fail to attach done ISR: %d\n", r);
406 irq = platform_get_irq(pdev, (i * 2) + 1);
408 dev_err(&pdev->dev, "ch(%d) Can't get err irq.\n", i);
412 r = devm_request_irq(&pdev->dev, irq, sf_pdma_err_isr, 0,
413 dev_name(&pdev->dev), (void *)chan);
415 dev_err(&pdev->dev, "Fail to attach err ISR: %d\n", r);
426 * sf_pdma_setup_chans() - Init settings of each channel
427 * @pdma: pointer of PDMA engine. Caller should check NULL
429 * Initialize all data structure and register base. Caller should make sure
430 * the pointer passed in are non-NULL. This function should be called only
431 * one time during the device probe.
433 * Context: Any context.
437 static void sf_pdma_setup_chans(struct sf_pdma *pdma)
440 struct sf_pdma_chan *chan;
442 INIT_LIST_HEAD(&pdma->dma_dev.channels);
444 for (i = 0; i < pdma->n_chans; i++) {
445 chan = &pdma->chans[i];
448 SF_PDMA_REG_BASE(i) + PDMA_CTRL;
449 chan->regs.xfer_type =
450 SF_PDMA_REG_BASE(i) + PDMA_XFER_TYPE;
451 chan->regs.xfer_size =
452 SF_PDMA_REG_BASE(i) + PDMA_XFER_SIZE;
453 chan->regs.dst_addr =
454 SF_PDMA_REG_BASE(i) + PDMA_DST_ADDR;
455 chan->regs.src_addr =
456 SF_PDMA_REG_BASE(i) + PDMA_SRC_ADDR;
457 chan->regs.act_type =
458 SF_PDMA_REG_BASE(i) + PDMA_ACT_TYPE;
460 SF_PDMA_REG_BASE(i) + PDMA_REMAINING_BYTE;
461 chan->regs.cur_dst_addr =
462 SF_PDMA_REG_BASE(i) + PDMA_CUR_DST_ADDR;
463 chan->regs.cur_src_addr =
464 SF_PDMA_REG_BASE(i) + PDMA_CUR_SRC_ADDR;
467 chan->pm_state = RUNNING;
469 chan->xfer_err = false;
470 spin_lock_init(&chan->lock);
472 chan->vchan.desc_free = sf_pdma_free_desc;
473 vchan_init(&chan->vchan, &pdma->dma_dev);
475 writel(PDMA_CLEAR_CTRL, chan->regs.ctrl);
477 tasklet_setup(&chan->done_tasklet, sf_pdma_donebh_tasklet);
478 tasklet_setup(&chan->err_tasklet, sf_pdma_errbh_tasklet);
482 static int sf_pdma_probe(struct platform_device *pdev)
484 struct sf_pdma *pdma;
485 struct sf_pdma_chan *chan;
486 struct resource *res;
489 const enum dma_slave_buswidth widths =
490 DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES |
491 DMA_SLAVE_BUSWIDTH_4_BYTES | DMA_SLAVE_BUSWIDTH_8_BYTES |
492 DMA_SLAVE_BUSWIDTH_16_BYTES | DMA_SLAVE_BUSWIDTH_32_BYTES |
493 DMA_SLAVE_BUSWIDTH_64_BYTES;
496 len = sizeof(*pdma) + sizeof(*chan) * chans;
497 pdma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
501 pdma->n_chans = chans;
503 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
504 pdma->membase = devm_ioremap_resource(&pdev->dev, res);
505 if (IS_ERR(pdma->membase))
506 return PTR_ERR(pdma->membase);
508 ret = sf_pdma_irq_init(pdev, pdma);
512 sf_pdma_setup_chans(pdma);
514 pdma->dma_dev.dev = &pdev->dev;
516 /* Setup capability */
517 dma_cap_set(DMA_MEMCPY, pdma->dma_dev.cap_mask);
518 pdma->dma_dev.copy_align = 2;
519 pdma->dma_dev.src_addr_widths = widths;
520 pdma->dma_dev.dst_addr_widths = widths;
521 pdma->dma_dev.directions = BIT(DMA_MEM_TO_MEM);
522 pdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
523 pdma->dma_dev.descriptor_reuse = true;
526 pdma->dma_dev.device_alloc_chan_resources =
527 sf_pdma_alloc_chan_resources;
528 pdma->dma_dev.device_free_chan_resources =
529 sf_pdma_free_chan_resources;
530 pdma->dma_dev.device_tx_status = sf_pdma_tx_status;
531 pdma->dma_dev.device_prep_dma_memcpy = sf_pdma_prep_dma_memcpy;
532 pdma->dma_dev.device_config = sf_pdma_slave_config;
533 pdma->dma_dev.device_terminate_all = sf_pdma_terminate_all;
534 pdma->dma_dev.device_issue_pending = sf_pdma_issue_pending;
536 platform_set_drvdata(pdev, pdma);
538 ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
541 "Failed to set DMA mask. Fall back to default.\n");
543 ret = dma_async_device_register(&pdma->dma_dev);
546 "Can't register SiFive Platform DMA. (%d)\n", ret);
553 static int sf_pdma_remove(struct platform_device *pdev)
555 struct sf_pdma *pdma = platform_get_drvdata(pdev);
556 struct sf_pdma_chan *ch;
559 for (i = 0; i < PDMA_NR_CH; i++) {
560 ch = &pdma->chans[i];
562 devm_free_irq(&pdev->dev, ch->txirq, ch);
563 devm_free_irq(&pdev->dev, ch->errirq, ch);
564 list_del(&ch->vchan.chan.device_node);
565 tasklet_kill(&ch->vchan.task);
566 tasklet_kill(&ch->done_tasklet);
567 tasklet_kill(&ch->err_tasklet);
570 dma_async_device_unregister(&pdma->dma_dev);
575 static const struct of_device_id sf_pdma_dt_ids[] = {
576 { .compatible = "sifive,fu540-c000-pdma" },
579 MODULE_DEVICE_TABLE(of, sf_pdma_dt_ids);
581 static struct platform_driver sf_pdma_driver = {
582 .probe = sf_pdma_probe,
583 .remove = sf_pdma_remove,
586 .of_match_table = sf_pdma_dt_ids,
590 static int __init sf_pdma_init(void)
592 return platform_driver_register(&sf_pdma_driver);
595 static void __exit sf_pdma_exit(void)
597 platform_driver_unregister(&sf_pdma_driver);
601 subsys_initcall(sf_pdma_init);
602 module_exit(sf_pdma_exit);
604 MODULE_LICENSE("GPL v2");
605 MODULE_DESCRIPTION("SiFive Platform DMA driver");