1 # SPDX-License-Identifier: GPL-2.0
2 # Intel pin control drivers
3 menu "Intel pinctrl drivers"
4 depends on ACPI && (X86 || COMPILE_TEST)
6 config PINCTRL_BAYTRAIL
7 bool "Intel Baytrail GPIO pin control"
10 driver for memory mapped GPIO functionality on Intel Baytrail
11 platforms. Supports 3 banks with 102, 28 and 44 gpios.
12 Most pins are usually muxed to some other functionality by firmware,
13 so only a small amount is available for gpio use.
15 Requires ACPI device enumeration code to set up a platform device.
17 config PINCTRL_CHERRYVIEW
18 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
21 Cherryview/Braswell pinctrl driver provides an interface that
22 allows configuring of SoC pins and using them as GPIOs.
24 config PINCTRL_LYNXPOINT
25 tristate "Intel Lynxpoint pinctrl and GPIO driver"
28 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
29 provides an interface that allows configuring of PCH pins and
36 select GENERIC_PINCONF
38 select GPIOLIB_IRQCHIP
40 config PINCTRL_ALDERLAKE
41 tristate "Intel Alder Lake pinctrl and GPIO driver"
44 This pinctrl driver provides an interface that allows configuring
45 of Intel Alder Lake PCH pins and using them as GPIOs.
47 config PINCTRL_BROXTON
48 tristate "Intel Broxton pinctrl and GPIO driver"
51 Broxton pinctrl driver provides an interface that allows
52 configuring of SoC pins and using them as GPIOs.
54 config PINCTRL_CANNONLAKE
55 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
58 This pinctrl driver provides an interface that allows configuring
59 of Intel Cannon Lake PCH pins and using them as GPIOs.
61 config PINCTRL_CEDARFORK
62 tristate "Intel Cedar Fork pinctrl and GPIO driver"
65 This pinctrl driver provides an interface that allows configuring
66 of Intel Cedar Fork PCH pins and using them as GPIOs.
68 config PINCTRL_DENVERTON
69 tristate "Intel Denverton pinctrl and GPIO driver"
72 This pinctrl driver provides an interface that allows configuring
73 of Intel Denverton SoC pins and using them as GPIOs.
75 config PINCTRL_ELKHARTLAKE
76 tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver"
79 This pinctrl driver provides an interface that allows configuring
80 of Intel Elkhart Lake SoC pins and using them as GPIOs.
82 config PINCTRL_EMMITSBURG
83 tristate "Intel Emmitsburg pinctrl and GPIO driver"
86 This pinctrl driver provides an interface that allows configuring
87 of Intel Emmitsburg pins and using them as GPIOs.
89 config PINCTRL_GEMINILAKE
90 tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
93 This pinctrl driver provides an interface that allows configuring
94 of Intel Gemini Lake SoC pins and using them as GPIOs.
96 config PINCTRL_ICELAKE
97 tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
100 This pinctrl driver provides an interface that allows configuring
101 of Intel Ice Lake PCH pins and using them as GPIOs.
103 config PINCTRL_JASPERLAKE
104 tristate "Intel Jasper Lake PCH pinctrl and GPIO driver"
107 This pinctrl driver provides an interface that allows configuring
108 of Intel Jasper Lake PCH pins and using them as GPIOs.
110 config PINCTRL_LAKEFIELD
111 tristate "Intel Lakefield SoC pinctrl and GPIO driver"
114 This pinctrl driver provides an interface that allows configuring
115 of Intel Lakefield SoC pins and using them as GPIOs.
117 config PINCTRL_LEWISBURG
118 tristate "Intel Lewisburg pinctrl and GPIO driver"
121 This pinctrl driver provides an interface that allows configuring
122 of Intel Lewisburg pins and using them as GPIOs.
124 config PINCTRL_METEORLAKE
125 tristate "Intel Meteor Lake pinctrl and GPIO driver"
128 This pinctrl driver provides an interface that allows configuring
129 of Intel Meteor Lake pins and using them as GPIOs.
131 config PINCTRL_SUNRISEPOINT
132 tristate "Intel Sunrisepoint pinctrl and GPIO driver"
135 Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
136 provides an interface that allows configuring of PCH pins and
139 config PINCTRL_TIGERLAKE
140 tristate "Intel Tiger Lake pinctrl and GPIO driver"
143 This pinctrl driver provides an interface that allows configuring
144 of Intel Tiger Lake PCH pins and using them as GPIOs.
146 source "drivers/pinctrl/intel/Kconfig.tng"