1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Cadence Design Systems Inc.
8 #include <linux/atomic.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/spinlock.h>
19 #include <linux/workqueue.h>
21 #include "internals.h"
23 static DEFINE_IDR(i3c_bus_idr);
24 static DEFINE_MUTEX(i3c_core_lock);
25 static int __i3c_first_dynamic_bus_num;
26 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
29 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
30 * @bus: I3C bus to take the lock on
32 * This function takes the bus lock so that no other operations can occur on
33 * the bus. This is needed for all kind of bus maintenance operation, like
34 * - enabling/disabling slave events
36 * - changing the dynamic address of a device
37 * - relinquishing mastership
40 * The reason for this kind of locking is that we don't want drivers and core
41 * logic to rely on I3C device information that could be changed behind their
44 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
46 down_write(&bus->lock);
50 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
52 * @bus: I3C bus to release the lock on
54 * Should be called when the bus maintenance operation is done. See
55 * i3c_bus_maintenance_lock() for more details on what these maintenance
58 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
64 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
65 * @bus: I3C bus to take the lock on
67 * This function takes the bus lock for any operation that is not a maintenance
68 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
69 * maintenance operations). Basically all communications with I3C devices are
70 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
71 * state or I3C dynamic address).
73 * Note that this lock is not guaranteeing serialization of normal operations.
74 * In other words, transfer requests passed to the I3C master can be submitted
75 * in parallel and I3C master drivers have to use their own locking to make
76 * sure two different communications are not inter-mixed, or access to the
77 * output/input queue is not done while the engine is busy.
79 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
81 down_read(&bus->lock);
85 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
86 * @bus: I3C bus to release the lock on
88 * Should be called when a normal operation is done. See
89 * i3c_bus_normaluse_lock() for more details on what these normal operations
92 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
97 static struct i3c_master_controller *
98 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
100 return container_of(i3cbus, struct i3c_master_controller, bus);
103 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
105 return container_of(dev, struct i3c_master_controller, dev);
108 static const struct device_type i3c_device_type;
110 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
112 struct i3c_master_controller *master;
114 if (dev->type == &i3c_device_type)
115 return dev_to_i3cdev(dev)->bus;
117 master = dev_to_i3cmaster(dev);
122 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
124 struct i3c_master_controller *master;
126 if (dev->type == &i3c_device_type)
127 return dev_to_i3cdev(dev)->desc;
129 master = dev_to_i3cmaster(dev);
134 static ssize_t bcr_show(struct device *dev,
135 struct device_attribute *da,
138 struct i3c_bus *bus = dev_to_i3cbus(dev);
139 struct i3c_dev_desc *desc;
142 i3c_bus_normaluse_lock(bus);
143 desc = dev_to_i3cdesc(dev);
144 ret = sprintf(buf, "%x\n", desc->info.bcr);
145 i3c_bus_normaluse_unlock(bus);
149 static DEVICE_ATTR_RO(bcr);
151 static ssize_t dcr_show(struct device *dev,
152 struct device_attribute *da,
155 struct i3c_bus *bus = dev_to_i3cbus(dev);
156 struct i3c_dev_desc *desc;
159 i3c_bus_normaluse_lock(bus);
160 desc = dev_to_i3cdesc(dev);
161 ret = sprintf(buf, "%x\n", desc->info.dcr);
162 i3c_bus_normaluse_unlock(bus);
166 static DEVICE_ATTR_RO(dcr);
168 static ssize_t pid_show(struct device *dev,
169 struct device_attribute *da,
172 struct i3c_bus *bus = dev_to_i3cbus(dev);
173 struct i3c_dev_desc *desc;
176 i3c_bus_normaluse_lock(bus);
177 desc = dev_to_i3cdesc(dev);
178 ret = sprintf(buf, "%llx\n", desc->info.pid);
179 i3c_bus_normaluse_unlock(bus);
183 static DEVICE_ATTR_RO(pid);
185 static ssize_t dynamic_address_show(struct device *dev,
186 struct device_attribute *da,
189 struct i3c_bus *bus = dev_to_i3cbus(dev);
190 struct i3c_dev_desc *desc;
193 i3c_bus_normaluse_lock(bus);
194 desc = dev_to_i3cdesc(dev);
195 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
196 i3c_bus_normaluse_unlock(bus);
200 static DEVICE_ATTR_RO(dynamic_address);
202 static const char * const hdrcap_strings[] = {
203 "hdr-ddr", "hdr-tsp", "hdr-tsl",
206 static ssize_t hdrcap_show(struct device *dev,
207 struct device_attribute *da,
210 struct i3c_bus *bus = dev_to_i3cbus(dev);
211 struct i3c_dev_desc *desc;
212 ssize_t offset = 0, ret;
216 i3c_bus_normaluse_lock(bus);
217 desc = dev_to_i3cdesc(dev);
218 caps = desc->info.hdr_cap;
219 for_each_set_bit(mode, &caps, 8) {
220 if (mode >= ARRAY_SIZE(hdrcap_strings))
223 if (!hdrcap_strings[mode])
226 ret = sprintf(buf + offset, offset ? " %s" : "%s",
227 hdrcap_strings[mode]);
234 ret = sprintf(buf + offset, "\n");
241 i3c_bus_normaluse_unlock(bus);
245 static DEVICE_ATTR_RO(hdrcap);
247 static ssize_t modalias_show(struct device *dev,
248 struct device_attribute *da, char *buf)
250 struct i3c_device *i3c = dev_to_i3cdev(dev);
251 struct i3c_device_info devinfo;
252 u16 manuf, part, ext;
254 i3c_device_get_info(i3c, &devinfo);
255 manuf = I3C_PID_MANUF_ID(devinfo.pid);
256 part = I3C_PID_PART_ID(devinfo.pid);
257 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
259 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
263 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
264 devinfo.dcr, manuf, part, ext);
266 static DEVICE_ATTR_RO(modalias);
268 static struct attribute *i3c_device_attrs[] = {
272 &dev_attr_dynamic_address.attr,
273 &dev_attr_hdrcap.attr,
274 &dev_attr_modalias.attr,
277 ATTRIBUTE_GROUPS(i3c_device);
279 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
281 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
282 struct i3c_device_info devinfo;
283 u16 manuf, part, ext;
285 i3c_device_get_info(i3cdev, &devinfo);
286 manuf = I3C_PID_MANUF_ID(devinfo.pid);
287 part = I3C_PID_PART_ID(devinfo.pid);
288 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
290 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
291 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
294 return add_uevent_var(env,
295 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
296 devinfo.dcr, manuf, part, ext);
299 static const struct device_type i3c_device_type = {
300 .groups = i3c_device_groups,
301 .uevent = i3c_device_uevent,
304 static int i3c_device_match(struct device *dev, const struct device_driver *drv)
306 struct i3c_device *i3cdev;
307 const struct i3c_driver *i3cdrv;
309 if (dev->type != &i3c_device_type)
312 i3cdev = dev_to_i3cdev(dev);
313 i3cdrv = drv_to_i3cdrv(drv);
314 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
320 static int i3c_device_probe(struct device *dev)
322 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
323 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
325 return driver->probe(i3cdev);
328 static void i3c_device_remove(struct device *dev)
330 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
331 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
334 driver->remove(i3cdev);
336 i3c_device_free_ibi(i3cdev);
339 const struct bus_type i3c_bus_type = {
341 .match = i3c_device_match,
342 .probe = i3c_device_probe,
343 .remove = i3c_device_remove,
345 EXPORT_SYMBOL_GPL(i3c_bus_type);
347 static enum i3c_addr_slot_status
348 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
350 unsigned long status;
351 int bitpos = addr * 2;
353 if (addr > I2C_MAX_ADDR)
354 return I3C_ADDR_SLOT_RSVD;
356 status = bus->addrslots[bitpos / BITS_PER_LONG];
357 status >>= bitpos % BITS_PER_LONG;
359 return status & I3C_ADDR_SLOT_STATUS_MASK;
362 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
363 enum i3c_addr_slot_status status)
365 int bitpos = addr * 2;
368 if (addr > I2C_MAX_ADDR)
371 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
372 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
373 (bitpos % BITS_PER_LONG));
374 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
377 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
379 enum i3c_addr_slot_status status;
381 status = i3c_bus_get_addr_slot_status(bus, addr);
383 return status == I3C_ADDR_SLOT_FREE;
386 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
388 enum i3c_addr_slot_status status;
391 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
392 status = i3c_bus_get_addr_slot_status(bus, addr);
393 if (status == I3C_ADDR_SLOT_FREE)
400 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
404 /* Addresses 0 to 7 are reserved. */
405 for (i = 0; i < 8; i++)
406 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
409 * Reserve broadcast address and all addresses that might collide
410 * with the broadcast address when facing a single bit error.
412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
414 for (i = 0; i < 7; i++)
415 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
419 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
421 mutex_lock(&i3c_core_lock);
422 idr_remove(&i3c_bus_idr, i3cbus->id);
423 mutex_unlock(&i3c_core_lock);
426 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
428 int ret, start, end, id = -1;
430 init_rwsem(&i3cbus->lock);
431 INIT_LIST_HEAD(&i3cbus->devs.i2c);
432 INIT_LIST_HEAD(&i3cbus->devs.i3c);
433 i3c_bus_init_addrslots(i3cbus);
434 i3cbus->mode = I3C_BUS_MODE_PURE;
437 id = of_alias_get_id(np, "i3c");
439 mutex_lock(&i3c_core_lock);
444 start = __i3c_first_dynamic_bus_num;
448 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
449 mutex_unlock(&i3c_core_lock);
459 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
465 mutex_lock(&i3c_core_lock);
466 idr_for_each_entry(&i3c_bus_idr, bus, id)
468 mutex_unlock(&i3c_core_lock);
470 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
472 int i3c_register_notifier(struct notifier_block *nb)
474 return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
476 EXPORT_SYMBOL_GPL(i3c_register_notifier);
478 int i3c_unregister_notifier(struct notifier_block *nb)
480 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
482 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
484 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
486 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
489 static const char * const i3c_bus_mode_strings[] = {
490 [I3C_BUS_MODE_PURE] = "pure",
491 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
492 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
493 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
496 static ssize_t mode_show(struct device *dev,
497 struct device_attribute *da,
500 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
503 i3c_bus_normaluse_lock(i3cbus);
504 if (i3cbus->mode < 0 ||
505 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
506 !i3c_bus_mode_strings[i3cbus->mode])
507 ret = sprintf(buf, "unknown\n");
509 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
510 i3c_bus_normaluse_unlock(i3cbus);
514 static DEVICE_ATTR_RO(mode);
516 static ssize_t current_master_show(struct device *dev,
517 struct device_attribute *da,
520 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
523 i3c_bus_normaluse_lock(i3cbus);
524 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
525 i3cbus->cur_master->info.pid);
526 i3c_bus_normaluse_unlock(i3cbus);
530 static DEVICE_ATTR_RO(current_master);
532 static ssize_t i3c_scl_frequency_show(struct device *dev,
533 struct device_attribute *da,
536 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
539 i3c_bus_normaluse_lock(i3cbus);
540 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
541 i3c_bus_normaluse_unlock(i3cbus);
545 static DEVICE_ATTR_RO(i3c_scl_frequency);
547 static ssize_t i2c_scl_frequency_show(struct device *dev,
548 struct device_attribute *da,
551 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
554 i3c_bus_normaluse_lock(i3cbus);
555 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
556 i3c_bus_normaluse_unlock(i3cbus);
560 static DEVICE_ATTR_RO(i2c_scl_frequency);
562 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
566 if (!master || !master->ops)
569 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
572 i3c_bus_normaluse_lock(&master->bus);
575 ret = master->ops->enable_hotjoin(master);
577 ret = master->ops->disable_hotjoin(master);
579 master->hotjoin = enable;
581 i3c_bus_normaluse_unlock(&master->bus);
586 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
587 const char *buf, size_t count)
589 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
593 if (!i3cbus->cur_master)
596 if (kstrtobool(buf, &res))
599 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
607 * i3c_master_enable_hotjoin - Enable hotjoin
608 * @master: I3C master object
610 * Return: a 0 in case of success, an negative error code otherwise.
612 int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
614 return i3c_set_hotjoin(master, true);
616 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
619 * i3c_master_disable_hotjoin - Disable hotjoin
620 * @master: I3C master object
622 * Return: a 0 in case of success, an negative error code otherwise.
624 int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
626 return i3c_set_hotjoin(master, false);
628 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
630 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
632 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
635 i3c_bus_normaluse_lock(i3cbus);
636 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
637 i3c_bus_normaluse_unlock(i3cbus);
642 static DEVICE_ATTR_RW(hotjoin);
644 static struct attribute *i3c_masterdev_attrs[] = {
646 &dev_attr_current_master.attr,
647 &dev_attr_i3c_scl_frequency.attr,
648 &dev_attr_i2c_scl_frequency.attr,
652 &dev_attr_dynamic_address.attr,
653 &dev_attr_hdrcap.attr,
654 &dev_attr_hotjoin.attr,
657 ATTRIBUTE_GROUPS(i3c_masterdev);
659 static void i3c_masterdev_release(struct device *dev)
661 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
662 struct i3c_bus *bus = dev_to_i3cbus(dev);
665 destroy_workqueue(master->wq);
667 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
668 i3c_bus_cleanup(bus);
670 of_node_put(dev->of_node);
673 static const struct device_type i3c_masterdev_type = {
674 .groups = i3c_masterdev_groups,
677 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
678 unsigned long max_i2c_scl_rate)
680 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
684 switch (i3cbus->mode) {
685 case I3C_BUS_MODE_PURE:
686 if (!i3cbus->scl_rate.i3c)
687 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
689 case I3C_BUS_MODE_MIXED_FAST:
690 case I3C_BUS_MODE_MIXED_LIMITED:
691 if (!i3cbus->scl_rate.i3c)
692 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
693 if (!i3cbus->scl_rate.i2c)
694 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
696 case I3C_BUS_MODE_MIXED_SLOW:
697 if (!i3cbus->scl_rate.i2c)
698 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
699 if (!i3cbus->scl_rate.i3c ||
700 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
701 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
707 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
708 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
711 * I3C/I2C frequency may have been overridden, check that user-provided
712 * values are not exceeding max possible frequency.
714 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
715 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
721 static struct i3c_master_controller *
722 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
724 return container_of(adap, struct i3c_master_controller, i2c);
727 static struct i2c_adapter *
728 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
733 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
738 static struct i2c_dev_desc *
739 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
742 struct i2c_dev_desc *dev;
744 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
746 return ERR_PTR(-ENOMEM);
748 dev->common.master = master;
755 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
759 dest->payload.len = payloadlen;
761 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
763 dest->payload.data = NULL;
765 return dest->payload.data;
768 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
770 kfree(dest->payload.data);
773 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
774 struct i3c_ccc_cmd_dest *dests,
777 cmd->rnw = rnw ? 1 : 0;
780 cmd->ndests = ndests;
781 cmd->err = I3C_ERROR_UNKNOWN;
784 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
785 struct i3c_ccc_cmd *cmd)
792 if (WARN_ON(master->init_done &&
793 !rwsem_is_locked(&master->bus.lock)))
796 if (!master->ops->send_ccc_cmd)
799 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
802 if (master->ops->supports_ccc_cmd &&
803 !master->ops->supports_ccc_cmd(master, cmd))
806 ret = master->ops->send_ccc_cmd(master, cmd);
808 if (cmd->err != I3C_ERROR_UNKNOWN)
817 static struct i2c_dev_desc *
818 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
821 struct i2c_dev_desc *dev;
823 i3c_bus_for_each_i2cdev(&master->bus, dev) {
824 if (dev->addr == addr)
832 * i3c_master_get_free_addr() - get a free address on the bus
833 * @master: I3C master object
834 * @start_addr: where to start searching
836 * This function must be called with the bus lock held in write mode.
838 * Return: the first free address starting at @start_addr (included) or -ENOMEM
839 * if there's no more address available.
841 int i3c_master_get_free_addr(struct i3c_master_controller *master,
844 return i3c_bus_get_free_addr(&master->bus, start_addr);
846 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
848 static void i3c_device_release(struct device *dev)
850 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
852 WARN_ON(i3cdev->desc);
854 of_node_put(i3cdev->dev.of_node);
858 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
863 static struct i3c_dev_desc *
864 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
865 const struct i3c_device_info *info)
867 struct i3c_dev_desc *dev;
869 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
871 return ERR_PTR(-ENOMEM);
873 dev->common.master = master;
875 mutex_init(&dev->ibi_lock);
880 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
883 enum i3c_addr_slot_status addrstat;
884 struct i3c_ccc_cmd_dest dest;
885 struct i3c_ccc_cmd cmd;
891 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
892 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
895 i3c_ccc_cmd_dest_init(&dest, addr, 0);
896 i3c_ccc_cmd_init(&cmd, false,
897 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
899 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
900 i3c_ccc_cmd_dest_cleanup(&dest);
906 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
908 * @master: master used to send frames on the bus
910 * Send a ENTDAA CCC command to start a DAA procedure.
912 * Note that this function only sends the ENTDAA CCC command, all the logic
913 * behind dynamic address assignment has to be handled in the I3C master
916 * This function must be called with the bus lock held in write mode.
918 * Return: 0 in case of success, a positive I3C error code if the error is
919 * one of the official Mx error codes, and a negative error code otherwise.
921 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
923 struct i3c_ccc_cmd_dest dest;
924 struct i3c_ccc_cmd cmd;
927 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
928 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
929 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
930 i3c_ccc_cmd_dest_cleanup(&dest);
934 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
936 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
937 u8 addr, bool enable, u8 evts)
939 struct i3c_ccc_events *events;
940 struct i3c_ccc_cmd_dest dest;
941 struct i3c_ccc_cmd cmd;
944 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
948 events->events = evts;
949 i3c_ccc_cmd_init(&cmd, false,
951 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
952 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
954 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
955 i3c_ccc_cmd_dest_cleanup(&dest);
961 * i3c_master_disec_locked() - send a DISEC CCC command
962 * @master: master used to send frames on the bus
963 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
964 * @evts: events to disable
966 * Send a DISEC CCC command to disable some or all events coming from a
967 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
969 * This function must be called with the bus lock held in write mode.
971 * Return: 0 in case of success, a positive I3C error code if the error is
972 * one of the official Mx error codes, and a negative error code otherwise.
974 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
977 return i3c_master_enec_disec_locked(master, addr, false, evts);
979 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
982 * i3c_master_enec_locked() - send an ENEC CCC command
983 * @master: master used to send frames on the bus
984 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
985 * @evts: events to disable
987 * Sends an ENEC CCC command to enable some or all events coming from a
988 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
990 * This function must be called with the bus lock held in write mode.
992 * Return: 0 in case of success, a positive I3C error code if the error is
993 * one of the official Mx error codes, and a negative error code otherwise.
995 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
998 return i3c_master_enec_disec_locked(master, addr, true, evts);
1000 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1003 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1004 * @master: master used to send frames on the bus
1006 * Send a DEFSLVS CCC command containing all the devices known to the @master.
1007 * This is useful when you have secondary masters on the bus to propagate
1008 * device information.
1010 * This should be called after all I3C devices have been discovered (in other
1011 * words, after the DAA procedure has finished) and instantiated in
1012 * &i3c_master_controller_ops->bus_init().
1013 * It should also be called if a master ACKed an Hot-Join request and assigned
1014 * a dynamic address to the device joining the bus.
1016 * This function must be called with the bus lock held in write mode.
1018 * Return: 0 in case of success, a positive I3C error code if the error is
1019 * one of the official Mx error codes, and a negative error code otherwise.
1021 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1023 struct i3c_ccc_defslvs *defslvs;
1024 struct i3c_ccc_dev_desc *desc;
1025 struct i3c_ccc_cmd_dest dest;
1026 struct i3c_dev_desc *i3cdev;
1027 struct i2c_dev_desc *i2cdev;
1028 struct i3c_ccc_cmd cmd;
1029 struct i3c_bus *bus;
1036 bus = i3c_master_get_bus(master);
1037 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1040 if (i3cdev == master->this)
1043 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1048 /* No other master on the bus, skip DEFSLVS. */
1052 i3c_bus_for_each_i2cdev(bus, i2cdev)
1055 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1056 struct_size(defslvs, slaves,
1061 defslvs->count = ndevs;
1062 defslvs->master.bcr = master->this->info.bcr;
1063 defslvs->master.dcr = master->this->info.dcr;
1064 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1065 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1067 desc = defslvs->slaves;
1068 i3c_bus_for_each_i2cdev(bus, i2cdev) {
1069 desc->lvr = i2cdev->lvr;
1070 desc->static_addr = i2cdev->addr << 1;
1074 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1075 /* Skip the I3C dev representing this master. */
1076 if (i3cdev == master->this)
1079 desc->bcr = i3cdev->info.bcr;
1080 desc->dcr = i3cdev->info.dcr;
1081 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1082 desc->static_addr = i3cdev->info.static_addr << 1;
1086 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1087 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1088 i3c_ccc_cmd_dest_cleanup(&dest);
1092 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1094 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1095 u8 oldaddr, u8 newaddr, bool setdasa)
1097 struct i3c_ccc_cmd_dest dest;
1098 struct i3c_ccc_setda *setda;
1099 struct i3c_ccc_cmd cmd;
1102 if (!oldaddr || !newaddr)
1105 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1109 setda->addr = newaddr << 1;
1110 i3c_ccc_cmd_init(&cmd, false,
1111 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1113 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1114 i3c_ccc_cmd_dest_cleanup(&dest);
1119 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1120 u8 static_addr, u8 dyn_addr)
1122 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1125 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1126 u8 oldaddr, u8 newaddr)
1128 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1131 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1132 struct i3c_device_info *info)
1134 struct i3c_ccc_cmd_dest dest;
1135 struct i3c_ccc_mrl *mrl;
1136 struct i3c_ccc_cmd cmd;
1139 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1144 * When the device does not have IBI payload GETMRL only returns 2
1147 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1148 dest.payload.len -= 1;
1150 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1151 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1155 switch (dest.payload.len) {
1157 info->max_ibi_len = mrl->ibi_len;
1160 info->max_read_len = be16_to_cpu(mrl->read_len);
1168 i3c_ccc_cmd_dest_cleanup(&dest);
1173 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1174 struct i3c_device_info *info)
1176 struct i3c_ccc_cmd_dest dest;
1177 struct i3c_ccc_mwl *mwl;
1178 struct i3c_ccc_cmd cmd;
1181 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1185 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1186 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1190 if (dest.payload.len != sizeof(*mwl)) {
1195 info->max_write_len = be16_to_cpu(mwl->len);
1198 i3c_ccc_cmd_dest_cleanup(&dest);
1203 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1204 struct i3c_device_info *info)
1206 struct i3c_ccc_getmxds *getmaxds;
1207 struct i3c_ccc_cmd_dest dest;
1208 struct i3c_ccc_cmd cmd;
1211 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1216 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1217 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1220 * Retry when the device does not support max read turnaround
1221 * while expecting shorter length from this CCC command.
1223 dest.payload.len -= 3;
1224 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1229 if (dest.payload.len != 2 && dest.payload.len != 5) {
1234 info->max_read_ds = getmaxds->maxrd;
1235 info->max_write_ds = getmaxds->maxwr;
1236 if (dest.payload.len == 5)
1237 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1238 ((u32)getmaxds->maxrdturn[1] << 8) |
1239 ((u32)getmaxds->maxrdturn[2] << 16);
1242 i3c_ccc_cmd_dest_cleanup(&dest);
1247 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1248 struct i3c_device_info *info)
1250 struct i3c_ccc_gethdrcap *gethdrcap;
1251 struct i3c_ccc_cmd_dest dest;
1252 struct i3c_ccc_cmd cmd;
1255 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1256 sizeof(*gethdrcap));
1260 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1261 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1265 if (dest.payload.len != 1) {
1270 info->hdr_cap = gethdrcap->modes;
1273 i3c_ccc_cmd_dest_cleanup(&dest);
1278 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1279 struct i3c_device_info *info)
1281 struct i3c_ccc_getpid *getpid;
1282 struct i3c_ccc_cmd_dest dest;
1283 struct i3c_ccc_cmd cmd;
1286 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1290 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1291 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1296 for (i = 0; i < sizeof(getpid->pid); i++) {
1297 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1299 info->pid |= (u64)getpid->pid[i] << sft;
1303 i3c_ccc_cmd_dest_cleanup(&dest);
1308 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1309 struct i3c_device_info *info)
1311 struct i3c_ccc_getbcr *getbcr;
1312 struct i3c_ccc_cmd_dest dest;
1313 struct i3c_ccc_cmd cmd;
1316 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1320 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1321 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1325 info->bcr = getbcr->bcr;
1328 i3c_ccc_cmd_dest_cleanup(&dest);
1333 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1334 struct i3c_device_info *info)
1336 struct i3c_ccc_getdcr *getdcr;
1337 struct i3c_ccc_cmd_dest dest;
1338 struct i3c_ccc_cmd cmd;
1341 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1345 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1346 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1350 info->dcr = getdcr->dcr;
1353 i3c_ccc_cmd_dest_cleanup(&dest);
1358 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1360 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1361 enum i3c_addr_slot_status slot_status;
1364 if (!dev->info.dyn_addr)
1367 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1368 dev->info.dyn_addr);
1369 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1370 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1373 ret = i3c_master_getpid_locked(master, &dev->info);
1377 ret = i3c_master_getbcr_locked(master, &dev->info);
1381 ret = i3c_master_getdcr_locked(master, &dev->info);
1385 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1386 ret = i3c_master_getmxds_locked(master, &dev->info);
1391 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1392 dev->info.max_ibi_len = 1;
1394 i3c_master_getmrl_locked(master, &dev->info);
1395 i3c_master_getmwl_locked(master, &dev->info);
1397 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1398 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1406 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1408 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1410 if (dev->info.static_addr)
1411 i3c_bus_set_addr_slot_status(&master->bus,
1412 dev->info.static_addr,
1413 I3C_ADDR_SLOT_FREE);
1415 if (dev->info.dyn_addr)
1416 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1417 I3C_ADDR_SLOT_FREE);
1419 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1420 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1421 I3C_ADDR_SLOT_FREE);
1424 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1426 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1427 enum i3c_addr_slot_status status;
1429 if (!dev->info.static_addr && !dev->info.dyn_addr)
1432 if (dev->info.static_addr) {
1433 status = i3c_bus_get_addr_slot_status(&master->bus,
1434 dev->info.static_addr);
1435 /* Since static address and assigned dynamic address can be
1436 * equal, allow this case to pass.
1438 if (status != I3C_ADDR_SLOT_FREE &&
1439 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1442 i3c_bus_set_addr_slot_status(&master->bus,
1443 dev->info.static_addr,
1444 I3C_ADDR_SLOT_I3C_DEV);
1448 * ->init_dyn_addr should have been reserved before that, so, if we're
1449 * trying to apply a pre-reserved dynamic address, we should not try
1450 * to reserve the address slot a second time.
1452 if (dev->info.dyn_addr &&
1454 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1455 status = i3c_bus_get_addr_slot_status(&master->bus,
1456 dev->info.dyn_addr);
1457 if (status != I3C_ADDR_SLOT_FREE)
1458 goto err_release_static_addr;
1460 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1461 I3C_ADDR_SLOT_I3C_DEV);
1466 err_release_static_addr:
1467 if (dev->info.static_addr)
1468 i3c_bus_set_addr_slot_status(&master->bus,
1469 dev->info.static_addr,
1470 I3C_ADDR_SLOT_FREE);
1475 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1476 struct i3c_dev_desc *dev)
1481 * We don't attach devices to the controller until they are
1482 * addressable on the bus.
1484 if (!dev->info.static_addr && !dev->info.dyn_addr)
1487 ret = i3c_master_get_i3c_addrs(dev);
1491 /* Do not attach the master device itself. */
1492 if (master->this != dev && master->ops->attach_i3c_dev) {
1493 ret = master->ops->attach_i3c_dev(dev);
1495 i3c_master_put_i3c_addrs(dev);
1500 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1505 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1508 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1509 enum i3c_addr_slot_status status;
1512 if (dev->info.dyn_addr != old_dyn_addr &&
1514 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1515 status = i3c_bus_get_addr_slot_status(&master->bus,
1516 dev->info.dyn_addr);
1517 if (status != I3C_ADDR_SLOT_FREE)
1519 i3c_bus_set_addr_slot_status(&master->bus,
1521 I3C_ADDR_SLOT_I3C_DEV);
1523 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1524 I3C_ADDR_SLOT_FREE);
1527 if (master->ops->reattach_i3c_dev) {
1528 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1530 i3c_master_put_i3c_addrs(dev);
1538 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1540 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1542 /* Do not detach the master device itself. */
1543 if (master->this != dev && master->ops->detach_i3c_dev)
1544 master->ops->detach_i3c_dev(dev);
1546 i3c_master_put_i3c_addrs(dev);
1547 list_del(&dev->common.node);
1550 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1551 struct i2c_dev_desc *dev)
1555 if (master->ops->attach_i2c_dev) {
1556 ret = master->ops->attach_i2c_dev(dev);
1561 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1566 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1568 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1570 list_del(&dev->common.node);
1572 if (master->ops->detach_i2c_dev)
1573 master->ops->detach_i2c_dev(dev);
1576 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1577 struct i3c_dev_boardinfo *boardinfo)
1579 struct i3c_device_info info = {
1580 .static_addr = boardinfo->static_addr,
1581 .pid = boardinfo->pid,
1583 struct i3c_dev_desc *i3cdev;
1586 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1590 i3cdev->boardinfo = boardinfo;
1592 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1596 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1597 i3cdev->boardinfo->init_dyn_addr);
1599 goto err_detach_dev;
1601 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1602 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1606 ret = i3c_master_retrieve_dev_info(i3cdev);
1613 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1615 i3c_master_detach_i3c_dev(i3cdev);
1617 i3c_master_free_i3c_dev(i3cdev);
1623 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1625 struct i3c_dev_desc *desc;
1628 if (!master->init_done)
1631 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1632 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1635 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1639 desc->dev->bus = &master->bus;
1640 desc->dev->desc = desc;
1641 desc->dev->dev.parent = &master->dev;
1642 desc->dev->dev.type = &i3c_device_type;
1643 desc->dev->dev.bus = &i3c_bus_type;
1644 desc->dev->dev.release = i3c_device_release;
1645 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1648 if (desc->boardinfo)
1649 desc->dev->dev.of_node = desc->boardinfo->of_node;
1651 ret = device_register(&desc->dev->dev);
1653 dev_err(&master->dev,
1654 "Failed to add I3C device (err = %d)\n", ret);
1655 put_device(&desc->dev->dev);
1661 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1662 * @master: master doing the DAA
1664 * This function is instantiating an I3C device object and adding it to the
1665 * I3C device list. All device information are automatically retrieved using
1666 * standard CCC commands.
1668 * The I3C device object is returned in case the master wants to attach
1669 * private data to it using i3c_dev_set_master_data().
1671 * This function must be called with the bus lock held in write mode.
1673 * Return: a 0 in case of success, an negative error code otherwise.
1675 int i3c_master_do_daa(struct i3c_master_controller *master)
1679 i3c_bus_maintenance_lock(&master->bus);
1680 ret = master->ops->do_daa(master);
1681 i3c_bus_maintenance_unlock(&master->bus);
1686 i3c_bus_normaluse_lock(&master->bus);
1687 i3c_master_register_new_i3c_devs(master);
1688 i3c_bus_normaluse_unlock(&master->bus);
1692 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1695 * i3c_master_set_info() - set master device information
1696 * @master: master used to send frames on the bus
1697 * @info: I3C device information
1699 * Set master device info. This should be called from
1700 * &i3c_master_controller_ops->bus_init().
1702 * Not all &i3c_device_info fields are meaningful for a master device.
1703 * Here is a list of fields that should be properly filled:
1705 * - &i3c_device_info->dyn_addr
1706 * - &i3c_device_info->bcr
1707 * - &i3c_device_info->dcr
1708 * - &i3c_device_info->pid
1709 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1710 * &i3c_device_info->bcr
1712 * This function must be called with the bus lock held in maintenance mode.
1714 * Return: 0 if @info contains valid information (not every piece of
1715 * information can be checked, but we can at least make sure @info->dyn_addr
1716 * and @info->bcr are correct), -EINVAL otherwise.
1718 int i3c_master_set_info(struct i3c_master_controller *master,
1719 const struct i3c_device_info *info)
1721 struct i3c_dev_desc *i3cdev;
1724 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1727 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1734 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1736 return PTR_ERR(i3cdev);
1738 master->this = i3cdev;
1739 master->bus.cur_master = master->this;
1741 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1748 i3c_master_free_i3c_dev(i3cdev);
1752 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1754 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1756 struct i3c_dev_desc *i3cdev, *i3ctmp;
1757 struct i2c_dev_desc *i2cdev, *i2ctmp;
1759 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1761 i3c_master_detach_i3c_dev(i3cdev);
1763 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1764 i3c_bus_set_addr_slot_status(&master->bus,
1765 i3cdev->boardinfo->init_dyn_addr,
1766 I3C_ADDR_SLOT_FREE);
1768 i3c_master_free_i3c_dev(i3cdev);
1771 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1773 i3c_master_detach_i2c_dev(i2cdev);
1774 i3c_bus_set_addr_slot_status(&master->bus,
1776 I3C_ADDR_SLOT_FREE);
1777 i3c_master_free_i2c_dev(i2cdev);
1782 * i3c_master_bus_init() - initialize an I3C bus
1783 * @master: main master initializing the bus
1785 * This function is following all initialisation steps described in the I3C
1788 * 1. Attach I2C devs to the master so that the master can fill its internal
1789 * device table appropriately
1791 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1792 * the master controller. That's usually where the bus mode is selected
1793 * (pure bus or mixed fast/slow bus)
1795 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1796 * particularly important when the bus was previously configured by someone
1797 * else (for example the bootloader)
1799 * 4. Disable all slave events.
1801 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1802 * also have static_addr, try to pre-assign dynamic addresses requested by
1803 * the FW with SETDASA and attach corresponding statically defined I3C
1804 * devices to the master.
1806 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1807 * remaining I3C devices
1809 * Once this is done, all I3C and I2C devices should be usable.
1811 * Return: a 0 in case of success, an negative error code otherwise.
1813 static int i3c_master_bus_init(struct i3c_master_controller *master)
1815 enum i3c_addr_slot_status status;
1816 struct i2c_dev_boardinfo *i2cboardinfo;
1817 struct i3c_dev_boardinfo *i3cboardinfo;
1818 struct i2c_dev_desc *i2cdev;
1822 * First attach all devices with static definitions provided by the
1825 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1826 status = i3c_bus_get_addr_slot_status(&master->bus,
1827 i2cboardinfo->base.addr);
1828 if (status != I3C_ADDR_SLOT_FREE) {
1830 goto err_detach_devs;
1833 i3c_bus_set_addr_slot_status(&master->bus,
1834 i2cboardinfo->base.addr,
1835 I3C_ADDR_SLOT_I2C_DEV);
1837 i2cdev = i3c_master_alloc_i2c_dev(master,
1838 i2cboardinfo->base.addr,
1840 if (IS_ERR(i2cdev)) {
1841 ret = PTR_ERR(i2cdev);
1842 goto err_detach_devs;
1845 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1847 i3c_master_free_i2c_dev(i2cdev);
1848 goto err_detach_devs;
1853 * Now execute the controller specific ->bus_init() routine, which
1854 * might configure its internal logic to match the bus limitations.
1856 ret = master->ops->bus_init(master);
1858 goto err_detach_devs;
1861 * The master device should have been instantiated in ->bus_init(),
1862 * complain if this was not the case.
1864 if (!master->this) {
1865 dev_err(&master->dev,
1866 "master_set_info() was not called in ->bus_init()\n");
1868 goto err_bus_cleanup;
1872 * Reset all dynamic address that may have been assigned before
1873 * (assigned by the bootloader for example).
1875 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1876 if (ret && ret != I3C_ERROR_M2)
1877 goto err_bus_cleanup;
1879 /* Disable all slave events before starting DAA. */
1880 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1881 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1883 if (ret && ret != I3C_ERROR_M2)
1884 goto err_bus_cleanup;
1887 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1888 * address and retrieve device information if needed.
1889 * In case pre-assign dynamic address fails, setting dynamic address to
1890 * the requested init_dyn_addr is retried after DAA is done in
1891 * i3c_master_add_i3c_dev_locked().
1893 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1896 * We don't reserve a dynamic address for devices that
1897 * don't explicitly request one.
1899 if (!i3cboardinfo->init_dyn_addr)
1902 ret = i3c_bus_get_addr_slot_status(&master->bus,
1903 i3cboardinfo->init_dyn_addr);
1904 if (ret != I3C_ADDR_SLOT_FREE) {
1909 i3c_bus_set_addr_slot_status(&master->bus,
1910 i3cboardinfo->init_dyn_addr,
1911 I3C_ADDR_SLOT_I3C_DEV);
1914 * Only try to create/attach devices that have a static
1915 * address. Other devices will be created/attached when
1916 * DAA happens, and the requested dynamic address will
1917 * be set using SETNEWDA once those devices become
1921 if (i3cboardinfo->static_addr)
1922 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1925 ret = i3c_master_do_daa(master);
1932 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1935 if (master->ops->bus_cleanup)
1936 master->ops->bus_cleanup(master);
1939 i3c_master_detach_free_devs(master);
1944 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1946 if (master->ops->bus_cleanup)
1947 master->ops->bus_cleanup(master);
1949 i3c_master_detach_free_devs(master);
1952 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1954 struct i3c_master_controller *master = i3cdev->common.master;
1955 struct i3c_dev_boardinfo *i3cboardinfo;
1957 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1958 if (i3cdev->info.pid != i3cboardinfo->pid)
1961 i3cdev->boardinfo = i3cboardinfo;
1962 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1967 static struct i3c_dev_desc *
1968 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1970 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1971 struct i3c_dev_desc *i3cdev;
1973 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1974 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1982 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1983 * @master: master used to send frames on the bus
1984 * @addr: I3C slave dynamic address assigned to the device
1986 * This function is instantiating an I3C device object and adding it to the
1987 * I3C device list. All device information are automatically retrieved using
1988 * standard CCC commands.
1990 * The I3C device object is returned in case the master wants to attach
1991 * private data to it using i3c_dev_set_master_data().
1993 * This function must be called with the bus lock held in write mode.
1995 * Return: a 0 in case of success, an negative error code otherwise.
1997 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
2000 struct i3c_device_info info = { .dyn_addr = addr };
2001 struct i3c_dev_desc *newdev, *olddev;
2002 u8 old_dyn_addr = addr, expected_dyn_addr;
2003 struct i3c_ibi_setup ibireq = { };
2004 bool enable_ibi = false;
2010 newdev = i3c_master_alloc_i3c_dev(master, &info);
2012 return PTR_ERR(newdev);
2014 ret = i3c_master_attach_i3c_dev(master, newdev);
2018 ret = i3c_master_retrieve_dev_info(newdev);
2020 goto err_detach_dev;
2022 i3c_master_attach_boardinfo(newdev);
2024 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2026 newdev->dev = olddev->dev;
2028 newdev->dev->desc = newdev;
2031 * We need to restore the IBI state too, so let's save the
2032 * IBI information and try to restore them after olddev has
2033 * been detached+released and its IBI has been stopped and
2034 * the associated resources have been freed.
2036 mutex_lock(&olddev->ibi_lock);
2038 ibireq.handler = olddev->ibi->handler;
2039 ibireq.max_payload_len = olddev->ibi->max_payload_len;
2040 ibireq.num_slots = olddev->ibi->num_slots;
2042 if (olddev->ibi->enabled) {
2044 i3c_dev_disable_ibi_locked(olddev);
2047 i3c_dev_free_ibi_locked(olddev);
2049 mutex_unlock(&olddev->ibi_lock);
2051 old_dyn_addr = olddev->info.dyn_addr;
2053 i3c_master_detach_i3c_dev(olddev);
2054 i3c_master_free_i3c_dev(olddev);
2058 * Depending on our previous state, the expected dynamic address might
2060 * - if the device already had a dynamic address assigned, let's try to
2062 * - if the device did not have a dynamic address and the firmware
2063 * requested a specific address, pick this one
2064 * - in any other case, keep the address automatically assigned by the
2067 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2068 expected_dyn_addr = old_dyn_addr;
2069 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2070 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2072 expected_dyn_addr = newdev->info.dyn_addr;
2074 if (newdev->info.dyn_addr != expected_dyn_addr) {
2076 * Try to apply the expected dynamic address. If it fails, keep
2077 * the address assigned by the master.
2079 ret = i3c_master_setnewda_locked(master,
2080 newdev->info.dyn_addr,
2083 old_dyn_addr = newdev->info.dyn_addr;
2084 newdev->info.dyn_addr = expected_dyn_addr;
2085 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
2087 dev_err(&master->dev,
2088 "Failed to assign reserved/old address to device %d%llx",
2089 master->bus.id, newdev->info.pid);
2094 * Now is time to try to restore the IBI setup. If we're lucky,
2095 * everything works as before, otherwise, all we can do is complain.
2096 * FIXME: maybe we should add callback to inform the driver that it
2097 * should request the IBI again instead of trying to hide that from
2100 if (ibireq.handler) {
2101 mutex_lock(&newdev->ibi_lock);
2102 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2104 dev_err(&master->dev,
2105 "Failed to request IBI on device %d-%llx",
2106 master->bus.id, newdev->info.pid);
2107 } else if (enable_ibi) {
2108 ret = i3c_dev_enable_ibi_locked(newdev);
2110 dev_err(&master->dev,
2111 "Failed to re-enable IBI on device %d-%llx",
2112 master->bus.id, newdev->info.pid);
2114 mutex_unlock(&newdev->ibi_lock);
2120 if (newdev->dev && newdev->dev->desc)
2121 newdev->dev->desc = NULL;
2123 i3c_master_detach_i3c_dev(newdev);
2126 i3c_master_free_i3c_dev(newdev);
2130 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2132 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2135 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2136 struct device_node *node, u32 *reg)
2138 struct i2c_dev_boardinfo *boardinfo;
2139 struct device *dev = &master->dev;
2142 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2146 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2151 * The I3C Specification does not clearly say I2C devices with 10-bit
2152 * address are supported. These devices can't be passed properly through
2155 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2156 dev_err(dev, "I2C device with 10 bit address not supported.");
2160 /* LVR is encoded in reg[2]. */
2161 boardinfo->lvr = reg[2];
2163 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2170 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2171 struct device_node *node, u32 *reg)
2173 struct i3c_dev_boardinfo *boardinfo;
2174 struct device *dev = &master->dev;
2175 enum i3c_addr_slot_status addrstatus;
2176 u32 init_dyn_addr = 0;
2178 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2183 if (reg[0] > I3C_MAX_ADDR)
2186 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2188 if (addrstatus != I3C_ADDR_SLOT_FREE)
2192 boardinfo->static_addr = reg[0];
2194 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2195 if (init_dyn_addr > I3C_MAX_ADDR)
2198 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2200 if (addrstatus != I3C_ADDR_SLOT_FREE)
2204 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2206 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2207 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2210 boardinfo->init_dyn_addr = init_dyn_addr;
2211 boardinfo->of_node = of_node_get(node);
2212 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2217 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2218 struct device_node *node)
2223 if (!master || !node)
2226 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2231 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2232 * dealing with an I2C device.
2235 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2237 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2242 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2244 struct device *dev = &master->dev;
2245 struct device_node *i3cbus_np = dev->of_node;
2246 struct device_node *node;
2253 for_each_available_child_of_node(i3cbus_np, node) {
2254 ret = of_i3c_master_add_dev(master, node);
2262 * The user might want to limit I2C and I3C speed in case some devices
2263 * on the bus are not supporting typical rates, or if the bus topology
2264 * prevents it from using max possible rate.
2266 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2267 master->bus.scl_rate.i2c = val;
2269 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2270 master->bus.scl_rate.i3c = val;
2275 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2276 struct i2c_msg *xfers, int nxfers)
2278 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2279 struct i2c_dev_desc *dev;
2283 if (!xfers || !master || nxfers <= 0)
2286 if (!master->ops->i2c_xfers)
2289 /* Doing transfers to different devices is not supported. */
2290 addr = xfers[0].addr;
2291 for (i = 1; i < nxfers; i++) {
2292 if (addr != xfers[i].addr)
2296 i3c_bus_normaluse_lock(&master->bus);
2297 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2301 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2302 i3c_bus_normaluse_unlock(&master->bus);
2304 return ret ? ret : nxfers;
2307 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2309 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2312 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2314 /* Fall back to no spike filters and FM bus mode. */
2315 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2317 if (client->dev.of_node) {
2320 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2321 reg, ARRAY_SIZE(reg)))
2328 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2330 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2331 enum i3c_addr_slot_status status;
2332 struct i2c_dev_desc *i2cdev;
2335 /* Already added by board info? */
2336 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2339 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2340 if (status != I3C_ADDR_SLOT_FREE)
2343 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2344 I3C_ADDR_SLOT_I2C_DEV);
2346 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2347 i3c_master_i2c_get_lvr(client));
2348 if (IS_ERR(i2cdev)) {
2349 ret = PTR_ERR(i2cdev);
2350 goto out_clear_status;
2353 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2360 i3c_master_free_i2c_dev(i2cdev);
2362 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2363 I3C_ADDR_SLOT_FREE);
2368 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2370 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2371 struct i2c_dev_desc *dev;
2373 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2377 i3c_master_detach_i2c_dev(dev);
2378 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2379 I3C_ADDR_SLOT_FREE);
2380 i3c_master_free_i2c_dev(dev);
2385 static const struct i2c_algorithm i3c_master_i2c_algo = {
2386 .master_xfer = i3c_master_i2c_adapter_xfer,
2387 .functionality = i3c_master_i2c_funcs,
2390 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2393 struct i2c_adapter *adap;
2394 struct i2c_client *client;
2395 struct device *dev = data;
2396 struct i3c_master_controller *master;
2399 if (dev->type != &i2c_client_type)
2402 client = to_i2c_client(dev);
2403 adap = client->adapter;
2405 if (adap->algo != &i3c_master_i2c_algo)
2408 master = i2c_adapter_to_i3c_master(adap);
2410 i3c_bus_maintenance_lock(&master->bus);
2412 case BUS_NOTIFY_ADD_DEVICE:
2413 ret = i3c_master_i2c_attach(adap, client);
2415 case BUS_NOTIFY_DEL_DEVICE:
2416 ret = i3c_master_i2c_detach(adap, client);
2419 i3c_bus_maintenance_unlock(&master->bus);
2424 static struct notifier_block i2cdev_notifier = {
2425 .notifier_call = i3c_i2c_notifier_call,
2428 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2430 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2431 struct i2c_dev_desc *i2cdev;
2432 struct i2c_dev_boardinfo *i2cboardinfo;
2435 adap->dev.parent = master->dev.parent;
2436 adap->owner = master->dev.parent->driver->owner;
2437 adap->algo = &i3c_master_i2c_algo;
2438 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2440 /* FIXME: Should we allow i3c masters to override these values? */
2441 adap->timeout = 1000;
2444 ret = i2c_add_adapter(adap);
2449 * We silently ignore failures here. The bus should keep working
2450 * correctly even if one or more i2c devices are not registered.
2452 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2453 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2454 i2cboardinfo->base.addr);
2455 if (WARN_ON(!i2cdev))
2457 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2463 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2465 struct i2c_dev_desc *i2cdev;
2467 i2c_del_adapter(&master->i2c);
2469 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2473 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2475 struct i3c_dev_desc *i3cdev;
2477 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2481 i3cdev->dev->desc = NULL;
2482 if (device_is_registered(&i3cdev->dev->dev))
2483 device_unregister(&i3cdev->dev->dev);
2485 put_device(&i3cdev->dev->dev);
2491 * i3c_master_queue_ibi() - Queue an IBI
2492 * @dev: the device this IBI is coming from
2493 * @slot: the IBI slot used to store the payload
2495 * Queue an IBI to the controller workqueue. The IBI handler attached to
2496 * the dev will be called from a workqueue context.
2498 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2500 atomic_inc(&dev->ibi->pending_ibis);
2501 queue_work(dev->ibi->wq, &slot->work);
2503 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2505 static void i3c_master_handle_ibi(struct work_struct *work)
2507 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2509 struct i3c_dev_desc *dev = slot->dev;
2510 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2511 struct i3c_ibi_payload payload;
2513 payload.data = slot->data;
2514 payload.len = slot->len;
2517 dev->ibi->handler(dev->dev, &payload);
2519 master->ops->recycle_ibi_slot(dev, slot);
2520 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2521 complete(&dev->ibi->all_ibis_handled);
2524 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2525 struct i3c_ibi_slot *slot)
2528 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2531 struct i3c_generic_ibi_slot {
2532 struct list_head node;
2533 struct i3c_ibi_slot base;
2536 struct i3c_generic_ibi_pool {
2538 unsigned int num_slots;
2539 struct i3c_generic_ibi_slot *slots;
2541 struct list_head free_slots;
2542 struct list_head pending;
2546 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2547 * @pool: the IBI pool to free
2549 * Free all IBI slots allated by a generic IBI pool.
2551 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2553 struct i3c_generic_ibi_slot *slot;
2554 unsigned int nslots = 0;
2556 while (!list_empty(&pool->free_slots)) {
2557 slot = list_first_entry(&pool->free_slots,
2558 struct i3c_generic_ibi_slot, node);
2559 list_del(&slot->node);
2564 * If the number of freed slots is not equal to the number of allocated
2565 * slots we have a leak somewhere.
2567 WARN_ON(nslots != pool->num_slots);
2569 kfree(pool->payload_buf);
2573 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2576 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2577 * @dev: the device this pool will be used for
2578 * @req: IBI setup request describing what the device driver expects
2580 * Create a generic IBI pool based on the information provided in @req.
2582 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2584 struct i3c_generic_ibi_pool *
2585 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2586 const struct i3c_ibi_setup *req)
2588 struct i3c_generic_ibi_pool *pool;
2589 struct i3c_generic_ibi_slot *slot;
2593 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2595 return ERR_PTR(-ENOMEM);
2597 spin_lock_init(&pool->lock);
2598 INIT_LIST_HEAD(&pool->free_slots);
2599 INIT_LIST_HEAD(&pool->pending);
2601 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2607 if (req->max_payload_len) {
2608 pool->payload_buf = kcalloc(req->num_slots,
2609 req->max_payload_len, GFP_KERNEL);
2610 if (!pool->payload_buf) {
2616 for (i = 0; i < req->num_slots; i++) {
2617 slot = &pool->slots[i];
2618 i3c_master_init_ibi_slot(dev, &slot->base);
2620 if (req->max_payload_len)
2621 slot->base.data = pool->payload_buf +
2622 (i * req->max_payload_len);
2624 list_add_tail(&slot->node, &pool->free_slots);
2631 i3c_generic_ibi_free_pool(pool);
2632 return ERR_PTR(ret);
2634 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2637 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2638 * @pool: the pool to query an IBI slot on
2640 * Search for a free slot in a generic IBI pool.
2641 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2642 * when it's no longer needed.
2644 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2646 struct i3c_ibi_slot *
2647 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2649 struct i3c_generic_ibi_slot *slot;
2650 unsigned long flags;
2652 spin_lock_irqsave(&pool->lock, flags);
2653 slot = list_first_entry_or_null(&pool->free_slots,
2654 struct i3c_generic_ibi_slot, node);
2656 list_del(&slot->node);
2657 spin_unlock_irqrestore(&pool->lock, flags);
2659 return slot ? &slot->base : NULL;
2661 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2664 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2665 * @pool: the pool to return the IBI slot to
2666 * @s: IBI slot to recycle
2668 * Add an IBI slot back to its generic IBI pool. Should be called from the
2669 * master driver struct_master_controller_ops->recycle_ibi() method.
2671 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2672 struct i3c_ibi_slot *s)
2674 struct i3c_generic_ibi_slot *slot;
2675 unsigned long flags;
2680 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2681 spin_lock_irqsave(&pool->lock, flags);
2682 list_add_tail(&slot->node, &pool->free_slots);
2683 spin_unlock_irqrestore(&pool->lock, flags);
2685 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2687 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2689 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2690 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2693 if (ops->request_ibi &&
2694 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2695 !ops->recycle_ibi_slot))
2702 * i3c_master_register() - register an I3C master
2703 * @master: master used to send frames on the bus
2704 * @parent: the parent device (the one that provides this I3C master
2706 * @ops: the master controller operations
2707 * @secondary: true if you are registering a secondary master. Will return
2708 * -ENOTSUPP if set to true since secondary masters are not yet
2711 * This function takes care of everything for you:
2713 * - creates and initializes the I3C bus
2714 * - populates the bus with static I2C devs if @parent->of_node is not
2716 * - registers all I3C devices added by the controller during bus
2718 * - registers the I2C adapter and all I2C devices
2720 * Return: 0 in case of success, a negative error code otherwise.
2722 int i3c_master_register(struct i3c_master_controller *master,
2723 struct device *parent,
2724 const struct i3c_master_controller_ops *ops,
2727 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2728 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2729 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2730 struct i2c_dev_boardinfo *i2cbi;
2733 /* We do not support secondary masters yet. */
2737 ret = i3c_master_check_ops(ops);
2741 master->dev.parent = parent;
2742 master->dev.of_node = of_node_get(parent->of_node);
2743 master->dev.bus = &i3c_bus_type;
2744 master->dev.type = &i3c_masterdev_type;
2745 master->dev.release = i3c_masterdev_release;
2747 master->secondary = secondary;
2748 INIT_LIST_HEAD(&master->boardinfo.i2c);
2749 INIT_LIST_HEAD(&master->boardinfo.i3c);
2751 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2755 device_initialize(&master->dev);
2756 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2758 master->dev.dma_mask = parent->dma_mask;
2759 master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2760 master->dev.dma_parms = parent->dma_parms;
2762 ret = of_populate_i3c_bus(master);
2766 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2767 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2768 case I3C_LVR_I2C_INDEX(0):
2769 if (mode < I3C_BUS_MODE_MIXED_FAST)
2770 mode = I3C_BUS_MODE_MIXED_FAST;
2772 case I3C_LVR_I2C_INDEX(1):
2773 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2774 mode = I3C_BUS_MODE_MIXED_LIMITED;
2776 case I3C_LVR_I2C_INDEX(2):
2777 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2778 mode = I3C_BUS_MODE_MIXED_SLOW;
2785 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2786 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2789 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2793 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2799 ret = i3c_master_bus_init(master);
2803 ret = device_add(&master->dev);
2805 goto err_cleanup_bus;
2808 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2809 * through the I2C subsystem.
2811 ret = i3c_master_i2c_adapter_init(master);
2815 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2817 pm_runtime_no_callbacks(&master->dev);
2818 pm_suspend_ignore_children(&master->dev, true);
2819 pm_runtime_enable(&master->dev);
2822 * We're done initializing the bus and the controller, we can now
2823 * register I3C devices discovered during the initial DAA.
2825 master->init_done = true;
2826 i3c_bus_normaluse_lock(&master->bus);
2827 i3c_master_register_new_i3c_devs(master);
2828 i3c_bus_normaluse_unlock(&master->bus);
2833 device_del(&master->dev);
2836 i3c_master_bus_cleanup(master);
2839 put_device(&master->dev);
2843 EXPORT_SYMBOL_GPL(i3c_master_register);
2846 * i3c_master_unregister() - unregister an I3C master
2847 * @master: master used to send frames on the bus
2849 * Basically undo everything done in i3c_master_register().
2851 void i3c_master_unregister(struct i3c_master_controller *master)
2853 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2855 i3c_master_i2c_adapter_cleanup(master);
2856 i3c_master_unregister_i3c_devs(master);
2857 i3c_master_bus_cleanup(master);
2858 pm_runtime_disable(&master->dev);
2859 device_unregister(&master->dev);
2861 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2863 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2865 struct i3c_master_controller *master;
2870 master = i3c_dev_get_master(dev);
2874 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2875 !dev->boardinfo->static_addr)
2878 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2879 dev->boardinfo->init_dyn_addr);
2882 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2883 struct i3c_priv_xfer *xfers,
2886 struct i3c_master_controller *master;
2891 master = i3c_dev_get_master(dev);
2892 if (!master || !xfers)
2895 if (!master->ops->priv_xfers)
2898 return master->ops->priv_xfers(dev, xfers, nxfers);
2901 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2903 struct i3c_master_controller *master;
2909 master = i3c_dev_get_master(dev);
2910 ret = master->ops->disable_ibi(dev);
2914 reinit_completion(&dev->ibi->all_ibis_handled);
2915 if (atomic_read(&dev->ibi->pending_ibis))
2916 wait_for_completion(&dev->ibi->all_ibis_handled);
2918 dev->ibi->enabled = false;
2923 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2925 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2931 ret = master->ops->enable_ibi(dev);
2933 dev->ibi->enabled = true;
2938 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2939 const struct i3c_ibi_setup *req)
2941 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2942 struct i3c_device_ibi_info *ibi;
2945 if (!master->ops->request_ibi)
2951 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2955 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
2961 atomic_set(&ibi->pending_ibis, 0);
2962 init_completion(&ibi->all_ibis_handled);
2963 ibi->handler = req->handler;
2964 ibi->max_payload_len = req->max_payload_len;
2965 ibi->num_slots = req->num_slots;
2968 ret = master->ops->request_ibi(dev, req);
2977 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2979 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2984 if (WARN_ON(dev->ibi->enabled))
2985 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2987 master->ops->free_ibi(dev);
2990 destroy_workqueue(dev->ibi->wq);
2991 dev->ibi->wq = NULL;
2998 static int __init i3c_init(void)
3002 res = of_alias_get_highest_id("i3c");
3004 mutex_lock(&i3c_core_lock);
3005 __i3c_first_dynamic_bus_num = res + 1;
3006 mutex_unlock(&i3c_core_lock);
3009 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
3013 res = bus_register(&i3c_bus_type);
3015 goto out_unreg_notifier;
3020 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3024 subsys_initcall(i3c_init);
3026 static void __exit i3c_exit(void)
3028 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3029 idr_destroy(&i3c_bus_idr);
3030 bus_unregister(&i3c_bus_type);
3032 module_exit(i3c_exit);
3035 MODULE_DESCRIPTION("I3C core");
3036 MODULE_LICENSE("GPL v2");