1 // SPDX-License-Identifier: GPL-2.0+
3 * drivers/net/phy/marvell.c
5 * Driver for Marvell PHYs
9 * Copyright (c) 2004 Freescale Semiconductor, Inc.
13 #include <linux/kernel.h>
14 #include <linux/string.h>
15 #include <linux/ctype.h>
16 #include <linux/errno.h>
17 #include <linux/unistd.h>
18 #include <linux/hwmon.h>
19 #include <linux/interrupt.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/skbuff.h>
25 #include <linux/spinlock.h>
27 #include <linux/module.h>
28 #include <linux/mii.h>
29 #include <linux/ethtool.h>
30 #include <linux/ethtool_netlink.h>
31 #include <linux/phy.h>
32 #include <linux/marvell_phy.h>
33 #include <linux/bitfield.h>
38 #include <linux/uaccess.h>
40 #define MII_MARVELL_PHY_PAGE 22
41 #define MII_MARVELL_COPPER_PAGE 0x00
42 #define MII_MARVELL_FIBER_PAGE 0x01
43 #define MII_MARVELL_MSCR_PAGE 0x02
44 #define MII_MARVELL_LED_PAGE 0x03
45 #define MII_MARVELL_VCT5_PAGE 0x05
46 #define MII_MARVELL_MISC_TEST_PAGE 0x06
47 #define MII_MARVELL_VCT7_PAGE 0x07
48 #define MII_MARVELL_WOL_PAGE 0x11
50 #define MII_M1011_IEVENT 0x13
51 #define MII_M1011_IEVENT_CLEAR 0x0000
53 #define MII_M1011_IMASK 0x12
54 #define MII_M1011_IMASK_INIT 0x6400
55 #define MII_M1011_IMASK_CLEAR 0x0000
57 #define MII_M1011_PHY_SCR 0x10
58 #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
59 #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
60 #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
61 #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
62 #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
63 #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
65 #define MII_M1011_PHY_SSR 0x11
66 #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
68 #define MII_M1111_PHY_LED_CONTROL 0x18
69 #define MII_M1111_PHY_LED_DIRECT 0x4100
70 #define MII_M1111_PHY_LED_COMBINE 0x411c
71 #define MII_M1111_PHY_EXT_CR 0x14
72 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
73 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
74 #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
75 #define MII_M1111_RGMII_RX_DELAY BIT(7)
76 #define MII_M1111_RGMII_TX_DELAY BIT(1)
77 #define MII_M1111_PHY_EXT_SR 0x1b
79 #define MII_M1111_HWCFG_MODE_MASK 0xf
80 #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
81 #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
82 #define MII_M1111_HWCFG_MODE_RTBI 0x7
83 #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
84 #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
85 #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
86 #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
88 #define MII_88E1121_PHY_MSCR_REG 21
89 #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
90 #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
91 #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
93 #define MII_88E1121_MISC_TEST 0x1a
94 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
95 #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
96 #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
97 #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
98 #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
99 #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
101 #define MII_88E1510_TEMP_SENSOR 0x1b
102 #define MII_88E1510_TEMP_SENSOR_MASK 0xff
104 #define MII_88E1540_COPPER_CTRL3 0x1a
105 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
106 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
107 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
108 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
109 #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
110 #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
112 #define MII_88E6390_MISC_TEST 0x1b
113 #define MII_88E6390_MISC_TEST_SAMPLE_1S 0
114 #define MII_88E6390_MISC_TEST_SAMPLE_10MS BIT(14)
115 #define MII_88E6390_MISC_TEST_SAMPLE_DISABLE BIT(15)
116 #define MII_88E6390_MISC_TEST_SAMPLE_ENABLE 0
117 #define MII_88E6390_MISC_TEST_SAMPLE_MASK (0x3 << 14)
119 #define MII_88E6390_TEMP_SENSOR 0x1c
120 #define MII_88E6390_TEMP_SENSOR_MASK 0xff
121 #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
123 #define MII_88E1318S_PHY_MSCR1_REG 16
124 #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
126 /* Copper Specific Interrupt Enable Register */
127 #define MII_88E1318S_PHY_CSIER 0x12
128 /* WOL Event Interrupt Enable */
129 #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
131 /* LED Timer Control Register */
132 #define MII_88E1318S_PHY_LED_TCR 0x12
133 #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
134 #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
135 #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
137 /* Magic Packet MAC address registers */
138 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
139 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
140 #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
142 #define MII_88E1318S_PHY_WOL_CTRL 0x10
143 #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
144 #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
146 #define MII_PHY_LED_CTRL 16
147 #define MII_88E1121_PHY_LED_DEF 0x0030
148 #define MII_88E1510_PHY_LED_DEF 0x1177
149 #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
151 #define MII_M1011_PHY_STATUS 0x11
152 #define MII_M1011_PHY_STATUS_1000 0x8000
153 #define MII_M1011_PHY_STATUS_100 0x4000
154 #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
155 #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
156 #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
157 #define MII_M1011_PHY_STATUS_LINK 0x0400
159 #define MII_88E3016_PHY_SPEC_CTRL 0x10
160 #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
161 #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
163 #define MII_88E1510_GEN_CTRL_REG_1 0x14
164 #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
165 #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
166 #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
168 #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
169 #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
170 #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
171 #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
172 #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
173 #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
174 #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
176 #define MII_VCT5_CTRL 0x17
177 #define MII_VCT5_CTRL_ENABLE BIT(15)
178 #define MII_VCT5_CTRL_COMPLETE BIT(14)
179 #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
180 #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
181 #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
182 #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
183 #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
184 #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
185 #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
186 #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
187 #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
188 #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
189 #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
190 #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
191 #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
192 #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
193 #define MII_VCT5_CTRL_SAMPLES_SHIFT 8
194 #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
195 #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
196 #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
197 #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
198 #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
200 #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
201 #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
202 #define MII_VCT5_TX_PULSE_CTRL 0x1c
203 #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
204 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
205 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
206 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
207 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
208 #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
209 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
210 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
211 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
212 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
213 #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
214 #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
215 #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
217 /* For TDR measurements less than 11 meters, a short pulse should be
220 #define TDR_SHORT_CABLE_LENGTH 11
222 #define MII_VCT7_PAIR_0_DISTANCE 0x10
223 #define MII_VCT7_PAIR_1_DISTANCE 0x11
224 #define MII_VCT7_PAIR_2_DISTANCE 0x12
225 #define MII_VCT7_PAIR_3_DISTANCE 0x13
227 #define MII_VCT7_RESULTS 0x14
228 #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
229 #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
230 #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
231 #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
232 #define MII_VCT7_RESULTS_PAIR3_SHIFT 12
233 #define MII_VCT7_RESULTS_PAIR2_SHIFT 8
234 #define MII_VCT7_RESULTS_PAIR1_SHIFT 4
235 #define MII_VCT7_RESULTS_PAIR0_SHIFT 0
236 #define MII_VCT7_RESULTS_INVALID 0
237 #define MII_VCT7_RESULTS_OK 1
238 #define MII_VCT7_RESULTS_OPEN 2
239 #define MII_VCT7_RESULTS_SAME_SHORT 3
240 #define MII_VCT7_RESULTS_CROSS_SHORT 4
241 #define MII_VCT7_RESULTS_BUSY 9
243 #define MII_VCT7_CTRL 0x15
244 #define MII_VCT7_CTRL_RUN_NOW BIT(15)
245 #define MII_VCT7_CTRL_RUN_ANEG BIT(14)
246 #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
247 #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
248 #define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
249 #define MII_VCT7_CTRL_METERS BIT(10)
250 #define MII_VCT7_CTRL_CENTIMETERS 0
252 #define LPA_PAUSE_FIBER 0x180
253 #define LPA_PAUSE_ASYM_FIBER 0x100
255 #define NB_FIBER_STATS 1
257 MODULE_DESCRIPTION("Marvell PHY driver");
258 MODULE_AUTHOR("Andy Fleming");
259 MODULE_LICENSE("GPL");
261 struct marvell_hw_stat {
268 static struct marvell_hw_stat marvell_hw_stats[] = {
269 { "phy_receive_errors_copper", 0, 21, 16},
270 { "phy_idle_errors", 0, 10, 8 },
271 { "phy_receive_errors_fiber", 1, 21, 16},
274 struct marvell_priv {
275 u64 stats[ARRAY_SIZE(marvell_hw_stats)];
277 struct device *hwmon_dev;
285 static int marvell_read_page(struct phy_device *phydev)
287 return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
290 static int marvell_write_page(struct phy_device *phydev, int page)
292 return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
295 static int marvell_set_page(struct phy_device *phydev, int page)
297 return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
300 static int marvell_ack_interrupt(struct phy_device *phydev)
304 /* Clear the interrupts by reading the reg */
305 err = phy_read(phydev, MII_M1011_IEVENT);
313 static int marvell_config_intr(struct phy_device *phydev)
317 if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
318 err = phy_write(phydev, MII_M1011_IMASK,
319 MII_M1011_IMASK_INIT);
321 err = phy_write(phydev, MII_M1011_IMASK,
322 MII_M1011_IMASK_CLEAR);
327 static int marvell_set_polarity(struct phy_device *phydev, int polarity)
333 /* get the current settings */
334 reg = phy_read(phydev, MII_M1011_PHY_SCR);
339 val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
342 val |= MII_M1011_PHY_SCR_MDI;
345 val |= MII_M1011_PHY_SCR_MDI_X;
347 case ETH_TP_MDI_AUTO:
348 case ETH_TP_MDI_INVALID:
350 val |= MII_M1011_PHY_SCR_AUTO_CROSS;
355 /* Set the new polarity value in the register */
356 err = phy_write(phydev, MII_M1011_PHY_SCR, val);
364 static int marvell_config_aneg(struct phy_device *phydev)
369 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
375 err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
376 MII_M1111_PHY_LED_DIRECT);
380 err = genphy_config_aneg(phydev);
384 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
385 /* A write to speed/duplex bits (that is performed by
386 * genphy_config_aneg() call above) must be followed by
387 * a software reset. Otherwise, the write has no effect.
389 err = genphy_soft_reset(phydev);
397 static int m88e1101_config_aneg(struct phy_device *phydev)
401 /* This Marvell PHY has an errata which requires
402 * that certain registers get written in order
403 * to restart autonegotiation
405 err = genphy_soft_reset(phydev);
409 err = phy_write(phydev, 0x1d, 0x1f);
413 err = phy_write(phydev, 0x1e, 0x200c);
417 err = phy_write(phydev, 0x1d, 0x5);
421 err = phy_write(phydev, 0x1e, 0);
425 err = phy_write(phydev, 0x1e, 0x100);
429 return marvell_config_aneg(phydev);
432 #if IS_ENABLED(CONFIG_OF_MDIO)
433 /* Set and/or override some configuration registers based on the
434 * marvell,reg-init property stored in the of_node for the phydev.
436 * marvell,reg-init = <reg-page reg mask value>,...;
438 * There may be one or more sets of <reg-page reg mask value>:
440 * reg-page: which register bank to use.
442 * mask: if non-zero, ANDed with existing register value.
443 * value: ORed with the masked value and written to the regiser.
446 static int marvell_of_reg_init(struct phy_device *phydev)
449 int len, i, saved_page, current_page, ret = 0;
451 if (!phydev->mdio.dev.of_node)
454 paddr = of_get_property(phydev->mdio.dev.of_node,
455 "marvell,reg-init", &len);
456 if (!paddr || len < (4 * sizeof(*paddr)))
459 saved_page = phy_save_page(phydev);
462 current_page = saved_page;
464 len /= sizeof(*paddr);
465 for (i = 0; i < len - 3; i += 4) {
466 u16 page = be32_to_cpup(paddr + i);
467 u16 reg = be32_to_cpup(paddr + i + 1);
468 u16 mask = be32_to_cpup(paddr + i + 2);
469 u16 val_bits = be32_to_cpup(paddr + i + 3);
472 if (page != current_page) {
474 ret = marvell_write_page(phydev, page);
481 val = __phy_read(phydev, reg);
490 ret = __phy_write(phydev, reg, val);
495 return phy_restore_page(phydev, saved_page, ret);
498 static int marvell_of_reg_init(struct phy_device *phydev)
502 #endif /* CONFIG_OF_MDIO */
504 static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
508 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
509 mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
510 MII_88E1121_PHY_MSCR_TX_DELAY;
511 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
512 mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
513 else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
514 mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
518 return phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
519 MII_88E1121_PHY_MSCR_REG,
520 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
523 static int m88e1121_config_aneg(struct phy_device *phydev)
528 if (phy_interface_is_rgmii(phydev)) {
529 err = m88e1121_config_aneg_rgmii_delays(phydev);
534 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
540 err = genphy_config_aneg(phydev);
544 if (phydev->autoneg != AUTONEG_ENABLE || changed) {
545 /* A software reset is used to ensure a "commit" of the
548 err = genphy_soft_reset(phydev);
556 static int m88e1318_config_aneg(struct phy_device *phydev)
560 err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
561 MII_88E1318S_PHY_MSCR1_REG,
562 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
566 return m88e1121_config_aneg(phydev);
570 * linkmode_adv_to_fiber_adv_t
571 * @advertise: the linkmode advertisement settings
573 * A small helper function that translates linkmode advertisement
574 * settings to phy autonegotiation advertisements for the MII_ADV
575 * register for fiber link.
577 static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
581 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
582 result |= ADVERTISE_1000XHALF;
583 if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
584 result |= ADVERTISE_1000XFULL;
586 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
587 linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
588 result |= ADVERTISE_1000XPSE_ASYM;
589 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
590 result |= ADVERTISE_1000XPAUSE;
596 * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
597 * @phydev: target phy_device struct
599 * Description: If auto-negotiation is enabled, we configure the
600 * advertising, and then restart auto-negotiation. If it is not
601 * enabled, then we write the BMCR. Adapted for fiber link in
602 * some Marvell's devices.
604 static int marvell_config_aneg_fiber(struct phy_device *phydev)
610 if (phydev->autoneg != AUTONEG_ENABLE)
611 return genphy_setup_forced(phydev);
613 /* Only allow advertising what this PHY supports */
614 linkmode_and(phydev->advertising, phydev->advertising,
617 adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
619 /* Setup fiber advertisement */
620 err = phy_modify_changed(phydev, MII_ADVERTISE,
621 ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
622 ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
629 return genphy_check_and_restart_aneg(phydev, changed);
632 static int m88e1510_config_aneg(struct phy_device *phydev)
636 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
640 /* Configure the copper link first */
641 err = m88e1318_config_aneg(phydev);
645 /* Do not touch the fiber page if we're in copper->sgmii mode */
646 if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
649 /* Then the fiber link */
650 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
654 err = marvell_config_aneg_fiber(phydev);
658 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
661 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
665 static void marvell_config_led(struct phy_device *phydev)
670 switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
671 /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
672 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
673 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
674 def_config = MII_88E1121_PHY_LED_DEF;
676 /* Default PHY LED config:
677 * LED[0] .. 1000Mbps Link
678 * LED[1] .. 100Mbps Link
679 * LED[2] .. Blink, Activity
681 case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
682 if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
683 def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
685 def_config = MII_88E1510_PHY_LED_DEF;
691 err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
694 phydev_warn(phydev, "Fail to config marvell phy LED.\n");
697 static int marvell_config_init(struct phy_device *phydev)
699 /* Set defalut LED */
700 marvell_config_led(phydev);
702 /* Set registers from marvell,reg-init DT property */
703 return marvell_of_reg_init(phydev);
706 static int m88e3016_config_init(struct phy_device *phydev)
710 /* Enable Scrambler and Auto-Crossover */
711 ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
712 MII_88E3016_DISABLE_SCRAMBLER,
713 MII_88E3016_AUTO_MDIX_CROSSOVER);
717 return marvell_config_init(phydev);
720 static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
722 int fibre_copper_auto)
724 if (fibre_copper_auto)
725 mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
727 return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
728 MII_M1111_HWCFG_MODE_MASK |
729 MII_M1111_HWCFG_FIBER_COPPER_AUTO |
730 MII_M1111_HWCFG_FIBER_COPPER_RES,
734 static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
738 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
739 delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
740 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
741 delay = MII_M1111_RGMII_RX_DELAY;
742 } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
743 delay = MII_M1111_RGMII_TX_DELAY;
748 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
749 MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
753 static int m88e1111_config_init_rgmii(struct phy_device *phydev)
758 err = m88e1111_config_init_rgmii_delays(phydev);
762 temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
766 temp &= ~(MII_M1111_HWCFG_MODE_MASK);
768 if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
769 temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
771 temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
773 return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
776 static int m88e1111_config_init_sgmii(struct phy_device *phydev)
780 err = m88e1111_config_init_hwcfg_mode(
782 MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
783 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
787 /* make sure copper is selected */
788 return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
791 static int m88e1111_config_init_rtbi(struct phy_device *phydev)
795 err = m88e1111_config_init_rgmii_delays(phydev);
799 err = m88e1111_config_init_hwcfg_mode(
801 MII_M1111_HWCFG_MODE_RTBI,
802 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
807 err = genphy_soft_reset(phydev);
811 return m88e1111_config_init_hwcfg_mode(
813 MII_M1111_HWCFG_MODE_RTBI,
814 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
817 static int m88e1111_config_init(struct phy_device *phydev)
821 if (phy_interface_is_rgmii(phydev)) {
822 err = m88e1111_config_init_rgmii(phydev);
827 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
828 err = m88e1111_config_init_sgmii(phydev);
833 if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
834 err = m88e1111_config_init_rtbi(phydev);
839 err = marvell_of_reg_init(phydev);
843 return genphy_soft_reset(phydev);
846 static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
848 int val, cnt, enable;
850 val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
854 enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
855 cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
857 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
862 static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
866 if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
870 return phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
871 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
873 val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
874 val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
876 return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
877 MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
878 MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
882 static int m88e1111_get_tunable(struct phy_device *phydev,
883 struct ethtool_tunable *tuna, void *data)
886 case ETHTOOL_PHY_DOWNSHIFT:
887 return m88e1111_get_downshift(phydev, data);
893 static int m88e1111_set_tunable(struct phy_device *phydev,
894 struct ethtool_tunable *tuna, const void *data)
897 case ETHTOOL_PHY_DOWNSHIFT:
898 return m88e1111_set_downshift(phydev, *(const u8 *)data);
904 static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
906 int val, cnt, enable;
908 val = phy_read(phydev, MII_M1011_PHY_SCR);
912 enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
913 cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
915 *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
920 static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
924 if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
928 return phy_clear_bits(phydev, MII_M1011_PHY_SCR,
929 MII_M1011_PHY_SCR_DOWNSHIFT_EN);
931 val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
932 val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
934 return phy_modify(phydev, MII_M1011_PHY_SCR,
935 MII_M1011_PHY_SCR_DOWNSHIFT_EN |
936 MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
940 static int m88e1011_get_tunable(struct phy_device *phydev,
941 struct ethtool_tunable *tuna, void *data)
944 case ETHTOOL_PHY_DOWNSHIFT:
945 return m88e1011_get_downshift(phydev, data);
951 static int m88e1011_set_tunable(struct phy_device *phydev,
952 struct ethtool_tunable *tuna, const void *data)
955 case ETHTOOL_PHY_DOWNSHIFT:
956 return m88e1011_set_downshift(phydev, *(const u8 *)data);
962 static int m88e1116r_config_init(struct phy_device *phydev)
966 err = genphy_soft_reset(phydev);
972 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
976 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
980 err = m88e1011_set_downshift(phydev, 8);
984 if (phy_interface_is_rgmii(phydev)) {
985 err = m88e1121_config_aneg_rgmii_delays(phydev);
990 err = genphy_soft_reset(phydev);
994 return marvell_config_init(phydev);
997 static int m88e1318_config_init(struct phy_device *phydev)
999 if (phy_interrupt_is_valid(phydev)) {
1000 int err = phy_modify_paged(
1001 phydev, MII_MARVELL_LED_PAGE,
1002 MII_88E1318S_PHY_LED_TCR,
1003 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1004 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1005 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1010 return marvell_config_init(phydev);
1013 static int m88e1510_config_init(struct phy_device *phydev)
1017 /* SGMII-to-Copper mode initialization */
1018 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1019 /* Select page 18 */
1020 err = marvell_set_page(phydev, 18);
1024 /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
1025 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
1026 MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
1027 MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
1031 /* PHY reset is necessary after changing MODE[2:0] */
1032 err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1, 0,
1033 MII_88E1510_GEN_CTRL_REG_1_RESET);
1037 /* Reset page selection */
1038 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1043 return m88e1318_config_init(phydev);
1046 static int m88e1118_config_aneg(struct phy_device *phydev)
1050 err = genphy_soft_reset(phydev);
1054 err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
1058 err = genphy_config_aneg(phydev);
1062 static int m88e1118_config_init(struct phy_device *phydev)
1066 /* Change address */
1067 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1071 /* Enable 1000 Mbit */
1072 err = phy_write(phydev, 0x15, 0x1070);
1076 /* Change address */
1077 err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
1081 /* Adjust LED Control */
1082 if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
1083 err = phy_write(phydev, 0x10, 0x1100);
1085 err = phy_write(phydev, 0x10, 0x021e);
1089 err = marvell_of_reg_init(phydev);
1094 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1098 return genphy_soft_reset(phydev);
1101 static int m88e1149_config_init(struct phy_device *phydev)
1105 /* Change address */
1106 err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
1110 /* Enable 1000 Mbit */
1111 err = phy_write(phydev, 0x15, 0x1048);
1115 err = marvell_of_reg_init(phydev);
1120 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1124 return genphy_soft_reset(phydev);
1127 static int m88e1145_config_init_rgmii(struct phy_device *phydev)
1131 err = m88e1111_config_init_rgmii_delays(phydev);
1135 if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
1136 err = phy_write(phydev, 0x1d, 0x0012);
1140 err = phy_modify(phydev, 0x1e, 0x0fc0,
1141 2 << 9 | /* 36 ohm */
1142 2 << 6); /* 39 ohm */
1146 err = phy_write(phydev, 0x1d, 0x3);
1150 err = phy_write(phydev, 0x1e, 0x8000);
1155 static int m88e1145_config_init_sgmii(struct phy_device *phydev)
1157 return m88e1111_config_init_hwcfg_mode(
1158 phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
1159 MII_M1111_HWCFG_FIBER_COPPER_AUTO);
1162 static int m88e1145_config_init(struct phy_device *phydev)
1166 /* Take care of errata E0 & E1 */
1167 err = phy_write(phydev, 0x1d, 0x001b);
1171 err = phy_write(phydev, 0x1e, 0x418f);
1175 err = phy_write(phydev, 0x1d, 0x0016);
1179 err = phy_write(phydev, 0x1e, 0xa2da);
1183 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
1184 err = m88e1145_config_init_rgmii(phydev);
1189 if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
1190 err = m88e1145_config_init_sgmii(phydev);
1195 err = marvell_of_reg_init(phydev);
1202 static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
1206 val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
1210 if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
1211 *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
1215 val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1218 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
1221 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
1224 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
1227 case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
1237 static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
1239 struct ethtool_eee eee;
1242 if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
1243 return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
1244 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1246 /* According to the Marvell data sheet EEE must be disabled for
1247 * Fast Link Down detection to work properly
1249 ret = phy_ethtool_get_eee(phydev, &eee);
1250 if (!ret && eee.eee_enabled) {
1251 phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
1256 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
1257 else if (*msecs <= 15)
1258 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
1259 else if (*msecs <= 30)
1260 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
1262 val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
1264 val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1266 ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
1267 MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
1271 return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
1272 MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
1275 static int m88e1540_get_tunable(struct phy_device *phydev,
1276 struct ethtool_tunable *tuna, void *data)
1279 case ETHTOOL_PHY_FAST_LINK_DOWN:
1280 return m88e1540_get_fld(phydev, data);
1281 case ETHTOOL_PHY_DOWNSHIFT:
1282 return m88e1011_get_downshift(phydev, data);
1288 static int m88e1540_set_tunable(struct phy_device *phydev,
1289 struct ethtool_tunable *tuna, const void *data)
1292 case ETHTOOL_PHY_FAST_LINK_DOWN:
1293 return m88e1540_set_fld(phydev, data);
1294 case ETHTOOL_PHY_DOWNSHIFT:
1295 return m88e1011_set_downshift(phydev, *(const u8 *)data);
1301 /* The VOD can be out of specification on link up. Poke an
1302 * undocumented register, in an undocumented page, with a magic value
1305 static int m88e6390_errata(struct phy_device *phydev)
1309 err = phy_write(phydev, MII_BMCR,
1310 BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
1314 usleep_range(300, 400);
1316 err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
1320 return genphy_soft_reset(phydev);
1323 static int m88e6390_config_aneg(struct phy_device *phydev)
1327 err = m88e6390_errata(phydev);
1331 return m88e1510_config_aneg(phydev);
1335 * fiber_lpa_mod_linkmode_lpa_t
1336 * @advertising: the linkmode advertisement settings
1337 * @lpa: value of the MII_LPA register for fiber link
1339 * A small helper function that translates MII_LPA bits to linkmode LP
1340 * advertisement settings. Other bits in advertising are left
1343 static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
1345 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
1346 advertising, lpa & LPA_1000XHALF);
1348 linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
1349 advertising, lpa & LPA_1000XFULL);
1352 static int marvell_read_status_page_an(struct phy_device *phydev,
1353 int fiber, int status)
1358 if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
1363 if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
1364 phydev->duplex = DUPLEX_FULL;
1366 phydev->duplex = DUPLEX_HALF;
1368 switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
1369 case MII_M1011_PHY_STATUS_1000:
1370 phydev->speed = SPEED_1000;
1373 case MII_M1011_PHY_STATUS_100:
1374 phydev->speed = SPEED_100;
1378 phydev->speed = SPEED_10;
1383 err = genphy_read_lpa(phydev);
1387 phy_resolve_aneg_pause(phydev);
1389 lpa = phy_read(phydev, MII_LPA);
1393 /* The fiber link is only 1000M capable */
1394 fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
1396 if (phydev->duplex == DUPLEX_FULL) {
1397 if (!(lpa & LPA_PAUSE_FIBER)) {
1399 phydev->asym_pause = 0;
1400 } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
1402 phydev->asym_pause = 1;
1405 phydev->asym_pause = 0;
1413 /* marvell_read_status_page
1416 * Check the link, then figure out the current state
1417 * by comparing what we advertise with what the link partner
1418 * advertises. Start by checking the gigabit possibilities,
1419 * then move on to 10/100.
1421 static int marvell_read_status_page(struct phy_device *phydev, int page)
1427 status = phy_read(phydev, MII_M1011_PHY_STATUS);
1431 /* Use the generic register for copper link status,
1432 * and the PHY status register for fiber link status.
1434 if (page == MII_MARVELL_FIBER_PAGE) {
1435 phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
1437 err = genphy_update_link(phydev);
1442 if (page == MII_MARVELL_FIBER_PAGE)
1447 linkmode_zero(phydev->lp_advertising);
1449 phydev->asym_pause = 0;
1450 phydev->speed = SPEED_UNKNOWN;
1451 phydev->duplex = DUPLEX_UNKNOWN;
1453 if (phydev->autoneg == AUTONEG_ENABLE)
1454 err = marvell_read_status_page_an(phydev, fiber, status);
1456 err = genphy_read_status_fixed(phydev);
1461 /* marvell_read_status
1463 * Some Marvell's phys have two modes: fiber and copper.
1464 * Both need status checked.
1466 * First, check the fiber link and status.
1467 * If the fiber link is down, check the copper link and status which
1468 * will be the default value if both link are down.
1470 static int marvell_read_status(struct phy_device *phydev)
1474 /* Check the fiber mode first */
1475 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1476 phydev->supported) &&
1477 phydev->interface != PHY_INTERFACE_MODE_SGMII) {
1478 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1482 err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
1486 /* If the fiber link is up, it is the selected and
1487 * used link. In this case, we need to stay in the
1488 * fiber page. Please to be careful about that, avoid
1489 * to restore Copper page in other functions which
1490 * could break the behaviour for some fiber phy like
1496 /* If fiber link is down, check and save copper mode state */
1497 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1502 return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
1505 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1511 * Some Marvell's phys have two modes: fiber and copper.
1512 * Both need to be suspended
1514 static int marvell_suspend(struct phy_device *phydev)
1518 /* Suspend the fiber mode first */
1519 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1520 phydev->supported)) {
1521 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1525 /* With the page set, use the generic suspend */
1526 err = genphy_suspend(phydev);
1530 /* Then, the copper link */
1531 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1536 /* With the page set, use the generic suspend */
1537 return genphy_suspend(phydev);
1540 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1546 * Some Marvell's phys have two modes: fiber and copper.
1547 * Both need to be resumed
1549 static int marvell_resume(struct phy_device *phydev)
1553 /* Resume the fiber mode first */
1554 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1555 phydev->supported)) {
1556 err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
1560 /* With the page set, use the generic resume */
1561 err = genphy_resume(phydev);
1565 /* Then, the copper link */
1566 err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1571 /* With the page set, use the generic resume */
1572 return genphy_resume(phydev);
1575 marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
1579 static int marvell_aneg_done(struct phy_device *phydev)
1581 int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
1583 return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
1586 static int m88e1121_did_interrupt(struct phy_device *phydev)
1590 imask = phy_read(phydev, MII_M1011_IEVENT);
1592 if (imask & MII_M1011_IMASK_INIT)
1598 static void m88e1318_get_wol(struct phy_device *phydev,
1599 struct ethtool_wolinfo *wol)
1601 int oldpage, ret = 0;
1603 wol->supported = WAKE_MAGIC;
1606 oldpage = phy_select_page(phydev, MII_MARVELL_WOL_PAGE);
1610 ret = __phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
1611 if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
1612 wol->wolopts |= WAKE_MAGIC;
1615 phy_restore_page(phydev, oldpage, ret);
1618 static int m88e1318_set_wol(struct phy_device *phydev,
1619 struct ethtool_wolinfo *wol)
1621 int err = 0, oldpage;
1623 oldpage = phy_save_page(phydev);
1627 if (wol->wolopts & WAKE_MAGIC) {
1628 /* Explicitly switch to page 0x00, just to be sure */
1629 err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
1633 /* If WOL event happened once, the LED[2] interrupt pin
1634 * will not be cleared unless we reading the interrupt status
1635 * register. If interrupts are in use, the normal interrupt
1636 * handling will clear the WOL event. Clear the WOL event
1637 * before enabling it if !phy_interrupt_is_valid()
1639 if (!phy_interrupt_is_valid(phydev))
1640 __phy_read(phydev, MII_M1011_IEVENT);
1642 /* Enable the WOL interrupt */
1643 err = __phy_modify(phydev, MII_88E1318S_PHY_CSIER, 0,
1644 MII_88E1318S_PHY_CSIER_WOL_EIE);
1648 err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
1652 /* Setup LED[2] as interrupt pin (active low) */
1653 err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
1654 MII_88E1318S_PHY_LED_TCR_FORCE_INT,
1655 MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
1656 MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
1660 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1664 /* Store the device address for the magic packet */
1665 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
1666 ((phydev->attached_dev->dev_addr[5] << 8) |
1667 phydev->attached_dev->dev_addr[4]));
1670 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
1671 ((phydev->attached_dev->dev_addr[3] << 8) |
1672 phydev->attached_dev->dev_addr[2]));
1675 err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
1676 ((phydev->attached_dev->dev_addr[1] << 8) |
1677 phydev->attached_dev->dev_addr[0]));
1681 /* Clear WOL status and enable magic packet matching */
1682 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
1683 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
1684 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
1688 err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
1692 /* Clear WOL status and disable magic packet matching */
1693 err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
1694 MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
1695 MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
1701 return phy_restore_page(phydev, oldpage, err);
1704 static int marvell_get_sset_count(struct phy_device *phydev)
1706 if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
1708 return ARRAY_SIZE(marvell_hw_stats);
1710 return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
1713 static void marvell_get_strings(struct phy_device *phydev, u8 *data)
1715 int count = marvell_get_sset_count(phydev);
1718 for (i = 0; i < count; i++) {
1719 strlcpy(data + i * ETH_GSTRING_LEN,
1720 marvell_hw_stats[i].string, ETH_GSTRING_LEN);
1724 static u64 marvell_get_stat(struct phy_device *phydev, int i)
1726 struct marvell_hw_stat stat = marvell_hw_stats[i];
1727 struct marvell_priv *priv = phydev->priv;
1731 val = phy_read_paged(phydev, stat.page, stat.reg);
1735 val = val & ((1 << stat.bits) - 1);
1736 priv->stats[i] += val;
1737 ret = priv->stats[i];
1743 static void marvell_get_stats(struct phy_device *phydev,
1744 struct ethtool_stats *stats, u64 *data)
1746 int count = marvell_get_sset_count(phydev);
1749 for (i = 0; i < count; i++)
1750 data[i] = marvell_get_stat(phydev, i);
1753 static int marvell_vct5_wait_complete(struct phy_device *phydev)
1758 for (i = 0; i < 32; i++) {
1759 val = __phy_read(phydev, MII_VCT5_CTRL);
1763 if (val & MII_VCT5_CTRL_COMPLETE)
1767 phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
1771 static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
1777 reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
1778 val = __phy_read(phydev, reg);
1783 amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
1784 MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
1786 if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
1787 amplitude = -amplitude;
1789 return 1000 * amplitude / 128;
1792 static u32 marvell_vct5_distance2cm(int distance)
1794 return distance * 805 / 10;
1797 static u32 marvell_vct5_cm2distance(int cm)
1799 return cm * 10 / 805;
1802 static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
1803 int distance, int pair)
1810 err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
1815 reg = MII_VCT5_CTRL_ENABLE |
1816 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1817 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1818 MII_VCT5_CTRL_SAMPLE_POINT |
1819 MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
1820 err = __phy_write(phydev, MII_VCT5_CTRL, reg);
1824 err = marvell_vct5_wait_complete(phydev);
1828 for (i = 0; i < 4; i++) {
1829 if (pair != PHY_PAIR_ALL && i != pair)
1832 mV = marvell_vct5_amplitude(phydev, i);
1833 ethnl_cable_test_amplitude(phydev, i, mV);
1839 static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
1841 struct marvell_priv *priv = phydev->priv;
1848 if (priv->first <= TDR_SHORT_CABLE_LENGTH)
1849 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
1851 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1853 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1854 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1855 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1857 err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1858 MII_VCT5_TX_PULSE_CTRL, reg);
1862 /* Reading the TDR data is very MDIO heavy. We need to optimize
1863 * access to keep the time to a minimum. So lock the bus once,
1864 * and don't release it until complete. We can then avoid having
1865 * to change the page for every access, greatly speeding things
1868 page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
1872 for (distance = priv->first;
1873 distance <= priv->last;
1874 distance += priv->step) {
1875 err = marvell_vct5_amplitude_distance(phydev, distance,
1880 if (distance > TDR_SHORT_CABLE_LENGTH &&
1881 width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
1882 width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
1883 reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
1884 MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
1885 MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
1886 err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
1893 return phy_restore_page(phydev, page, err);
1896 static int marvell_cable_test_start_common(struct phy_device *phydev)
1898 int bmcr, bmsr, ret;
1900 /* If auto-negotiation is enabled, but not complete, the cable
1901 * test never completes. So disable auto-neg.
1903 bmcr = phy_read(phydev, MII_BMCR);
1907 bmsr = phy_read(phydev, MII_BMSR);
1912 if (bmcr & BMCR_ANENABLE) {
1913 ret = phy_modify(phydev, MII_BMCR, BMCR_ANENABLE, 0);
1916 ret = genphy_soft_reset(phydev);
1921 /* If the link is up, allow it some time to go down */
1922 if (bmsr & BMSR_LSTATUS)
1928 static int marvell_vct7_cable_test_start(struct phy_device *phydev)
1930 struct marvell_priv *priv = phydev->priv;
1933 ret = marvell_cable_test_start_common(phydev);
1937 priv->cable_test_tdr = false;
1939 /* Reset the VCT5 API control to defaults, otherwise
1940 * VCT7 does not work correctly.
1942 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1944 MII_VCT5_CTRL_TX_SAME_CHANNEL |
1945 MII_VCT5_CTRL_SAMPLES_DEFAULT |
1946 MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
1947 MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
1951 ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
1952 MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
1956 return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
1958 MII_VCT7_CTRL_RUN_NOW |
1959 MII_VCT7_CTRL_CENTIMETERS);
1962 static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
1963 const struct phy_tdr_config *cfg)
1965 struct marvell_priv *priv = phydev->priv;
1968 priv->cable_test_tdr = true;
1969 priv->first = marvell_vct5_cm2distance(cfg->first);
1970 priv->last = marvell_vct5_cm2distance(cfg->last);
1971 priv->step = marvell_vct5_cm2distance(cfg->step);
1972 priv->pair = cfg->pair;
1974 if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
1977 if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
1981 ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
1986 ret = marvell_cable_test_start_common(phydev);
1990 ret = ethnl_cable_test_pulse(phydev, 1000);
1994 return ethnl_cable_test_step(phydev,
1995 marvell_vct5_distance2cm(priv->first),
1996 marvell_vct5_distance2cm(priv->last),
1997 marvell_vct5_distance2cm(priv->step));
2000 static int marvell_vct7_distance_to_length(int distance, bool meter)
2008 static bool marvell_vct7_distance_valid(int result)
2011 case MII_VCT7_RESULTS_OPEN:
2012 case MII_VCT7_RESULTS_SAME_SHORT:
2013 case MII_VCT7_RESULTS_CROSS_SHORT:
2019 static int marvell_vct7_report_length(struct phy_device *phydev,
2020 int pair, bool meter)
2025 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2026 MII_VCT7_PAIR_0_DISTANCE + pair);
2030 length = marvell_vct7_distance_to_length(ret, meter);
2032 ethnl_cable_test_fault_length(phydev, pair, length);
2037 static int marvell_vct7_cable_test_report_trans(int result)
2040 case MII_VCT7_RESULTS_OK:
2041 return ETHTOOL_A_CABLE_RESULT_CODE_OK;
2042 case MII_VCT7_RESULTS_OPEN:
2043 return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
2044 case MII_VCT7_RESULTS_SAME_SHORT:
2045 return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
2046 case MII_VCT7_RESULTS_CROSS_SHORT:
2047 return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
2049 return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
2053 static int marvell_vct7_cable_test_report(struct phy_device *phydev)
2055 int pair0, pair1, pair2, pair3;
2059 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2064 pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
2065 MII_VCT7_RESULTS_PAIR3_SHIFT;
2066 pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
2067 MII_VCT7_RESULTS_PAIR2_SHIFT;
2068 pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
2069 MII_VCT7_RESULTS_PAIR1_SHIFT;
2070 pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
2071 MII_VCT7_RESULTS_PAIR0_SHIFT;
2073 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
2074 marvell_vct7_cable_test_report_trans(pair0));
2075 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
2076 marvell_vct7_cable_test_report_trans(pair1));
2077 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
2078 marvell_vct7_cable_test_report_trans(pair2));
2079 ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
2080 marvell_vct7_cable_test_report_trans(pair3));
2082 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
2086 meter = ret & MII_VCT7_CTRL_METERS;
2088 if (marvell_vct7_distance_valid(pair0))
2089 marvell_vct7_report_length(phydev, 0, meter);
2090 if (marvell_vct7_distance_valid(pair1))
2091 marvell_vct7_report_length(phydev, 1, meter);
2092 if (marvell_vct7_distance_valid(pair2))
2093 marvell_vct7_report_length(phydev, 2, meter);
2094 if (marvell_vct7_distance_valid(pair3))
2095 marvell_vct7_report_length(phydev, 3, meter);
2100 static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
2103 struct marvell_priv *priv = phydev->priv;
2106 if (priv->cable_test_tdr) {
2107 ret = marvell_vct5_amplitude_graph(phydev);
2114 ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
2120 if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
2123 return marvell_vct7_cable_test_report(phydev);
2130 static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
2138 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2142 /* Enable temperature sensor */
2143 ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
2147 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2148 ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2152 /* Wait for temperature to stabilize */
2153 usleep_range(10000, 12000);
2155 val = __phy_read(phydev, MII_88E1121_MISC_TEST);
2161 /* Disable temperature sensor */
2162 ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
2163 ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
2167 *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
2170 return phy_restore_page(phydev, oldpage, ret);
2173 static int m88e1121_hwmon_read(struct device *dev,
2174 enum hwmon_sensor_types type,
2175 u32 attr, int channel, long *temp)
2177 struct phy_device *phydev = dev_get_drvdata(dev);
2181 case hwmon_temp_input:
2182 err = m88e1121_get_temp(phydev, temp);
2191 static umode_t m88e1121_hwmon_is_visible(const void *data,
2192 enum hwmon_sensor_types type,
2193 u32 attr, int channel)
2195 if (type != hwmon_temp)
2199 case hwmon_temp_input:
2206 static u32 m88e1121_hwmon_chip_config[] = {
2207 HWMON_C_REGISTER_TZ,
2211 static const struct hwmon_channel_info m88e1121_hwmon_chip = {
2213 .config = m88e1121_hwmon_chip_config,
2216 static u32 m88e1121_hwmon_temp_config[] = {
2221 static const struct hwmon_channel_info m88e1121_hwmon_temp = {
2223 .config = m88e1121_hwmon_temp_config,
2226 static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
2227 &m88e1121_hwmon_chip,
2228 &m88e1121_hwmon_temp,
2232 static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
2233 .is_visible = m88e1121_hwmon_is_visible,
2234 .read = m88e1121_hwmon_read,
2237 static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
2238 .ops = &m88e1121_hwmon_hwmon_ops,
2239 .info = m88e1121_hwmon_info,
2242 static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
2248 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2249 MII_88E1510_TEMP_SENSOR);
2253 *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
2258 static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
2264 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2265 MII_88E1121_MISC_TEST);
2269 *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
2270 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
2277 static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
2280 temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
2282 return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2283 MII_88E1121_MISC_TEST,
2284 MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
2285 temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
2288 static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
2294 ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
2295 MII_88E1121_MISC_TEST);
2299 *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
2304 static int m88e1510_hwmon_read(struct device *dev,
2305 enum hwmon_sensor_types type,
2306 u32 attr, int channel, long *temp)
2308 struct phy_device *phydev = dev_get_drvdata(dev);
2312 case hwmon_temp_input:
2313 err = m88e1510_get_temp(phydev, temp);
2315 case hwmon_temp_crit:
2316 err = m88e1510_get_temp_critical(phydev, temp);
2318 case hwmon_temp_max_alarm:
2319 err = m88e1510_get_temp_alarm(phydev, temp);
2328 static int m88e1510_hwmon_write(struct device *dev,
2329 enum hwmon_sensor_types type,
2330 u32 attr, int channel, long temp)
2332 struct phy_device *phydev = dev_get_drvdata(dev);
2336 case hwmon_temp_crit:
2337 err = m88e1510_set_temp_critical(phydev, temp);
2345 static umode_t m88e1510_hwmon_is_visible(const void *data,
2346 enum hwmon_sensor_types type,
2347 u32 attr, int channel)
2349 if (type != hwmon_temp)
2353 case hwmon_temp_input:
2354 case hwmon_temp_max_alarm:
2356 case hwmon_temp_crit:
2363 static u32 m88e1510_hwmon_temp_config[] = {
2364 HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
2368 static const struct hwmon_channel_info m88e1510_hwmon_temp = {
2370 .config = m88e1510_hwmon_temp_config,
2373 static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
2374 &m88e1121_hwmon_chip,
2375 &m88e1510_hwmon_temp,
2379 static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
2380 .is_visible = m88e1510_hwmon_is_visible,
2381 .read = m88e1510_hwmon_read,
2382 .write = m88e1510_hwmon_write,
2385 static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
2386 .ops = &m88e1510_hwmon_hwmon_ops,
2387 .info = m88e1510_hwmon_info,
2390 static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
2399 oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
2403 /* Enable temperature sensor */
2404 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2408 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2409 ret |= MII_88E6390_MISC_TEST_SAMPLE_ENABLE |
2410 MII_88E6390_MISC_TEST_SAMPLE_1S;
2412 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2416 /* Wait for temperature to stabilize */
2417 usleep_range(10000, 12000);
2419 /* Reading the temperature sense has an errata. You need to read
2420 * a number of times and take an average.
2422 for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
2423 ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
2426 sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
2429 sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
2430 *temp = (sum - 75) * 1000;
2432 /* Disable temperature sensor */
2433 ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
2437 ret = ret & ~MII_88E6390_MISC_TEST_SAMPLE_MASK;
2438 ret |= MII_88E6390_MISC_TEST_SAMPLE_DISABLE;
2440 ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
2443 phy_restore_page(phydev, oldpage, ret);
2448 static int m88e6390_hwmon_read(struct device *dev,
2449 enum hwmon_sensor_types type,
2450 u32 attr, int channel, long *temp)
2452 struct phy_device *phydev = dev_get_drvdata(dev);
2456 case hwmon_temp_input:
2457 err = m88e6390_get_temp(phydev, temp);
2466 static umode_t m88e6390_hwmon_is_visible(const void *data,
2467 enum hwmon_sensor_types type,
2468 u32 attr, int channel)
2470 if (type != hwmon_temp)
2474 case hwmon_temp_input:
2481 static u32 m88e6390_hwmon_temp_config[] = {
2486 static const struct hwmon_channel_info m88e6390_hwmon_temp = {
2488 .config = m88e6390_hwmon_temp_config,
2491 static const struct hwmon_channel_info *m88e6390_hwmon_info[] = {
2492 &m88e1121_hwmon_chip,
2493 &m88e6390_hwmon_temp,
2497 static const struct hwmon_ops m88e6390_hwmon_hwmon_ops = {
2498 .is_visible = m88e6390_hwmon_is_visible,
2499 .read = m88e6390_hwmon_read,
2502 static const struct hwmon_chip_info m88e6390_hwmon_chip_info = {
2503 .ops = &m88e6390_hwmon_hwmon_ops,
2504 .info = m88e6390_hwmon_info,
2507 static int marvell_hwmon_name(struct phy_device *phydev)
2509 struct marvell_priv *priv = phydev->priv;
2510 struct device *dev = &phydev->mdio.dev;
2511 const char *devname = dev_name(dev);
2512 size_t len = strlen(devname);
2515 priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
2516 if (!priv->hwmon_name)
2519 for (i = j = 0; i < len && devname[i]; i++) {
2520 if (isalnum(devname[i]))
2521 priv->hwmon_name[j++] = devname[i];
2527 static int marvell_hwmon_probe(struct phy_device *phydev,
2528 const struct hwmon_chip_info *chip)
2530 struct marvell_priv *priv = phydev->priv;
2531 struct device *dev = &phydev->mdio.dev;
2534 err = marvell_hwmon_name(phydev);
2538 priv->hwmon_dev = devm_hwmon_device_register_with_info(
2539 dev, priv->hwmon_name, phydev, chip, NULL);
2541 return PTR_ERR_OR_ZERO(priv->hwmon_dev);
2544 static int m88e1121_hwmon_probe(struct phy_device *phydev)
2546 return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
2549 static int m88e1510_hwmon_probe(struct phy_device *phydev)
2551 return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
2554 static int m88e6390_hwmon_probe(struct phy_device *phydev)
2556 return marvell_hwmon_probe(phydev, &m88e6390_hwmon_chip_info);
2559 static int m88e1121_hwmon_probe(struct phy_device *phydev)
2564 static int m88e1510_hwmon_probe(struct phy_device *phydev)
2569 static int m88e6390_hwmon_probe(struct phy_device *phydev)
2575 static int marvell_probe(struct phy_device *phydev)
2577 struct marvell_priv *priv;
2579 priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
2583 phydev->priv = priv;
2588 static int m88e1121_probe(struct phy_device *phydev)
2592 err = marvell_probe(phydev);
2596 return m88e1121_hwmon_probe(phydev);
2599 static int m88e1510_probe(struct phy_device *phydev)
2603 err = marvell_probe(phydev);
2607 return m88e1510_hwmon_probe(phydev);
2610 static int m88e6390_probe(struct phy_device *phydev)
2614 err = marvell_probe(phydev);
2618 return m88e6390_hwmon_probe(phydev);
2621 static struct phy_driver marvell_drivers[] = {
2623 .phy_id = MARVELL_PHY_ID_88E1101,
2624 .phy_id_mask = MARVELL_PHY_ID_MASK,
2625 .name = "Marvell 88E1101",
2626 /* PHY_GBIT_FEATURES */
2627 .probe = marvell_probe,
2628 .config_init = marvell_config_init,
2629 .config_aneg = m88e1101_config_aneg,
2630 .ack_interrupt = marvell_ack_interrupt,
2631 .config_intr = marvell_config_intr,
2632 .resume = genphy_resume,
2633 .suspend = genphy_suspend,
2634 .read_page = marvell_read_page,
2635 .write_page = marvell_write_page,
2636 .get_sset_count = marvell_get_sset_count,
2637 .get_strings = marvell_get_strings,
2638 .get_stats = marvell_get_stats,
2641 .phy_id = MARVELL_PHY_ID_88E1112,
2642 .phy_id_mask = MARVELL_PHY_ID_MASK,
2643 .name = "Marvell 88E1112",
2644 /* PHY_GBIT_FEATURES */
2645 .probe = marvell_probe,
2646 .config_init = m88e1111_config_init,
2647 .config_aneg = marvell_config_aneg,
2648 .ack_interrupt = marvell_ack_interrupt,
2649 .config_intr = marvell_config_intr,
2650 .resume = genphy_resume,
2651 .suspend = genphy_suspend,
2652 .read_page = marvell_read_page,
2653 .write_page = marvell_write_page,
2654 .get_sset_count = marvell_get_sset_count,
2655 .get_strings = marvell_get_strings,
2656 .get_stats = marvell_get_stats,
2657 .get_tunable = m88e1011_get_tunable,
2658 .set_tunable = m88e1011_set_tunable,
2661 .phy_id = MARVELL_PHY_ID_88E1111,
2662 .phy_id_mask = MARVELL_PHY_ID_MASK,
2663 .name = "Marvell 88E1111",
2664 /* PHY_GBIT_FEATURES */
2665 .probe = marvell_probe,
2666 .config_init = m88e1111_config_init,
2667 .config_aneg = marvell_config_aneg,
2668 .read_status = marvell_read_status,
2669 .ack_interrupt = marvell_ack_interrupt,
2670 .config_intr = marvell_config_intr,
2671 .resume = genphy_resume,
2672 .suspend = genphy_suspend,
2673 .read_page = marvell_read_page,
2674 .write_page = marvell_write_page,
2675 .get_sset_count = marvell_get_sset_count,
2676 .get_strings = marvell_get_strings,
2677 .get_stats = marvell_get_stats,
2678 .get_tunable = m88e1111_get_tunable,
2679 .set_tunable = m88e1111_set_tunable,
2682 .phy_id = MARVELL_PHY_ID_88E1118,
2683 .phy_id_mask = MARVELL_PHY_ID_MASK,
2684 .name = "Marvell 88E1118",
2685 /* PHY_GBIT_FEATURES */
2686 .probe = marvell_probe,
2687 .config_init = m88e1118_config_init,
2688 .config_aneg = m88e1118_config_aneg,
2689 .ack_interrupt = marvell_ack_interrupt,
2690 .config_intr = marvell_config_intr,
2691 .resume = genphy_resume,
2692 .suspend = genphy_suspend,
2693 .read_page = marvell_read_page,
2694 .write_page = marvell_write_page,
2695 .get_sset_count = marvell_get_sset_count,
2696 .get_strings = marvell_get_strings,
2697 .get_stats = marvell_get_stats,
2700 .phy_id = MARVELL_PHY_ID_88E1121R,
2701 .phy_id_mask = MARVELL_PHY_ID_MASK,
2702 .name = "Marvell 88E1121R",
2703 /* PHY_GBIT_FEATURES */
2704 .probe = m88e1121_probe,
2705 .config_init = marvell_config_init,
2706 .config_aneg = m88e1121_config_aneg,
2707 .read_status = marvell_read_status,
2708 .ack_interrupt = marvell_ack_interrupt,
2709 .config_intr = marvell_config_intr,
2710 .did_interrupt = m88e1121_did_interrupt,
2711 .resume = genphy_resume,
2712 .suspend = genphy_suspend,
2713 .read_page = marvell_read_page,
2714 .write_page = marvell_write_page,
2715 .get_sset_count = marvell_get_sset_count,
2716 .get_strings = marvell_get_strings,
2717 .get_stats = marvell_get_stats,
2718 .get_tunable = m88e1011_get_tunable,
2719 .set_tunable = m88e1011_set_tunable,
2722 .phy_id = MARVELL_PHY_ID_88E1318S,
2723 .phy_id_mask = MARVELL_PHY_ID_MASK,
2724 .name = "Marvell 88E1318S",
2725 /* PHY_GBIT_FEATURES */
2726 .probe = marvell_probe,
2727 .config_init = m88e1318_config_init,
2728 .config_aneg = m88e1318_config_aneg,
2729 .read_status = marvell_read_status,
2730 .ack_interrupt = marvell_ack_interrupt,
2731 .config_intr = marvell_config_intr,
2732 .did_interrupt = m88e1121_did_interrupt,
2733 .get_wol = m88e1318_get_wol,
2734 .set_wol = m88e1318_set_wol,
2735 .resume = genphy_resume,
2736 .suspend = genphy_suspend,
2737 .read_page = marvell_read_page,
2738 .write_page = marvell_write_page,
2739 .get_sset_count = marvell_get_sset_count,
2740 .get_strings = marvell_get_strings,
2741 .get_stats = marvell_get_stats,
2744 .phy_id = MARVELL_PHY_ID_88E1145,
2745 .phy_id_mask = MARVELL_PHY_ID_MASK,
2746 .name = "Marvell 88E1145",
2747 /* PHY_GBIT_FEATURES */
2748 .probe = marvell_probe,
2749 .config_init = m88e1145_config_init,
2750 .config_aneg = m88e1101_config_aneg,
2751 .read_status = genphy_read_status,
2752 .ack_interrupt = marvell_ack_interrupt,
2753 .config_intr = marvell_config_intr,
2754 .resume = genphy_resume,
2755 .suspend = genphy_suspend,
2756 .read_page = marvell_read_page,
2757 .write_page = marvell_write_page,
2758 .get_sset_count = marvell_get_sset_count,
2759 .get_strings = marvell_get_strings,
2760 .get_stats = marvell_get_stats,
2761 .get_tunable = m88e1111_get_tunable,
2762 .set_tunable = m88e1111_set_tunable,
2765 .phy_id = MARVELL_PHY_ID_88E1149R,
2766 .phy_id_mask = MARVELL_PHY_ID_MASK,
2767 .name = "Marvell 88E1149R",
2768 /* PHY_GBIT_FEATURES */
2769 .probe = marvell_probe,
2770 .config_init = m88e1149_config_init,
2771 .config_aneg = m88e1118_config_aneg,
2772 .ack_interrupt = marvell_ack_interrupt,
2773 .config_intr = marvell_config_intr,
2774 .resume = genphy_resume,
2775 .suspend = genphy_suspend,
2776 .read_page = marvell_read_page,
2777 .write_page = marvell_write_page,
2778 .get_sset_count = marvell_get_sset_count,
2779 .get_strings = marvell_get_strings,
2780 .get_stats = marvell_get_stats,
2783 .phy_id = MARVELL_PHY_ID_88E1240,
2784 .phy_id_mask = MARVELL_PHY_ID_MASK,
2785 .name = "Marvell 88E1240",
2786 /* PHY_GBIT_FEATURES */
2787 .probe = marvell_probe,
2788 .config_init = m88e1111_config_init,
2789 .config_aneg = marvell_config_aneg,
2790 .ack_interrupt = marvell_ack_interrupt,
2791 .config_intr = marvell_config_intr,
2792 .resume = genphy_resume,
2793 .suspend = genphy_suspend,
2794 .read_page = marvell_read_page,
2795 .write_page = marvell_write_page,
2796 .get_sset_count = marvell_get_sset_count,
2797 .get_strings = marvell_get_strings,
2798 .get_stats = marvell_get_stats,
2801 .phy_id = MARVELL_PHY_ID_88E1116R,
2802 .phy_id_mask = MARVELL_PHY_ID_MASK,
2803 .name = "Marvell 88E1116R",
2804 /* PHY_GBIT_FEATURES */
2805 .probe = marvell_probe,
2806 .config_init = m88e1116r_config_init,
2807 .ack_interrupt = marvell_ack_interrupt,
2808 .config_intr = marvell_config_intr,
2809 .resume = genphy_resume,
2810 .suspend = genphy_suspend,
2811 .read_page = marvell_read_page,
2812 .write_page = marvell_write_page,
2813 .get_sset_count = marvell_get_sset_count,
2814 .get_strings = marvell_get_strings,
2815 .get_stats = marvell_get_stats,
2816 .get_tunable = m88e1011_get_tunable,
2817 .set_tunable = m88e1011_set_tunable,
2820 .phy_id = MARVELL_PHY_ID_88E1510,
2821 .phy_id_mask = MARVELL_PHY_ID_MASK,
2822 .name = "Marvell 88E1510",
2823 .features = PHY_GBIT_FIBRE_FEATURES,
2824 .flags = PHY_POLL_CABLE_TEST,
2825 .probe = m88e1510_probe,
2826 .config_init = m88e1510_config_init,
2827 .config_aneg = m88e1510_config_aneg,
2828 .read_status = marvell_read_status,
2829 .ack_interrupt = marvell_ack_interrupt,
2830 .config_intr = marvell_config_intr,
2831 .did_interrupt = m88e1121_did_interrupt,
2832 .get_wol = m88e1318_get_wol,
2833 .set_wol = m88e1318_set_wol,
2834 .resume = marvell_resume,
2835 .suspend = marvell_suspend,
2836 .read_page = marvell_read_page,
2837 .write_page = marvell_write_page,
2838 .get_sset_count = marvell_get_sset_count,
2839 .get_strings = marvell_get_strings,
2840 .get_stats = marvell_get_stats,
2841 .set_loopback = genphy_loopback,
2842 .get_tunable = m88e1011_get_tunable,
2843 .set_tunable = m88e1011_set_tunable,
2844 .cable_test_start = marvell_vct7_cable_test_start,
2845 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2846 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2849 .phy_id = MARVELL_PHY_ID_88E1540,
2850 .phy_id_mask = MARVELL_PHY_ID_MASK,
2851 .name = "Marvell 88E1540",
2852 /* PHY_GBIT_FEATURES */
2853 .flags = PHY_POLL_CABLE_TEST,
2854 .probe = m88e1510_probe,
2855 .config_init = marvell_config_init,
2856 .config_aneg = m88e1510_config_aneg,
2857 .read_status = marvell_read_status,
2858 .ack_interrupt = marvell_ack_interrupt,
2859 .config_intr = marvell_config_intr,
2860 .did_interrupt = m88e1121_did_interrupt,
2861 .resume = genphy_resume,
2862 .suspend = genphy_suspend,
2863 .read_page = marvell_read_page,
2864 .write_page = marvell_write_page,
2865 .get_sset_count = marvell_get_sset_count,
2866 .get_strings = marvell_get_strings,
2867 .get_stats = marvell_get_stats,
2868 .get_tunable = m88e1540_get_tunable,
2869 .set_tunable = m88e1540_set_tunable,
2870 .cable_test_start = marvell_vct7_cable_test_start,
2871 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2872 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2875 .phy_id = MARVELL_PHY_ID_88E1545,
2876 .phy_id_mask = MARVELL_PHY_ID_MASK,
2877 .name = "Marvell 88E1545",
2878 .probe = m88e1510_probe,
2879 /* PHY_GBIT_FEATURES */
2880 .flags = PHY_POLL_CABLE_TEST,
2881 .config_init = marvell_config_init,
2882 .config_aneg = m88e1510_config_aneg,
2883 .read_status = marvell_read_status,
2884 .ack_interrupt = marvell_ack_interrupt,
2885 .config_intr = marvell_config_intr,
2886 .did_interrupt = m88e1121_did_interrupt,
2887 .resume = genphy_resume,
2888 .suspend = genphy_suspend,
2889 .read_page = marvell_read_page,
2890 .write_page = marvell_write_page,
2891 .get_sset_count = marvell_get_sset_count,
2892 .get_strings = marvell_get_strings,
2893 .get_stats = marvell_get_stats,
2894 .get_tunable = m88e1540_get_tunable,
2895 .set_tunable = m88e1540_set_tunable,
2896 .cable_test_start = marvell_vct7_cable_test_start,
2897 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2898 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2901 .phy_id = MARVELL_PHY_ID_88E3016,
2902 .phy_id_mask = MARVELL_PHY_ID_MASK,
2903 .name = "Marvell 88E3016",
2904 /* PHY_BASIC_FEATURES */
2905 .probe = marvell_probe,
2906 .config_init = m88e3016_config_init,
2907 .aneg_done = marvell_aneg_done,
2908 .read_status = marvell_read_status,
2909 .ack_interrupt = marvell_ack_interrupt,
2910 .config_intr = marvell_config_intr,
2911 .did_interrupt = m88e1121_did_interrupt,
2912 .resume = genphy_resume,
2913 .suspend = genphy_suspend,
2914 .read_page = marvell_read_page,
2915 .write_page = marvell_write_page,
2916 .get_sset_count = marvell_get_sset_count,
2917 .get_strings = marvell_get_strings,
2918 .get_stats = marvell_get_stats,
2921 .phy_id = MARVELL_PHY_ID_88E6390,
2922 .phy_id_mask = MARVELL_PHY_ID_MASK,
2923 .name = "Marvell 88E6390",
2924 /* PHY_GBIT_FEATURES */
2925 .flags = PHY_POLL_CABLE_TEST,
2926 .probe = m88e6390_probe,
2927 .config_init = marvell_config_init,
2928 .config_aneg = m88e6390_config_aneg,
2929 .read_status = marvell_read_status,
2930 .ack_interrupt = marvell_ack_interrupt,
2931 .config_intr = marvell_config_intr,
2932 .did_interrupt = m88e1121_did_interrupt,
2933 .resume = genphy_resume,
2934 .suspend = genphy_suspend,
2935 .read_page = marvell_read_page,
2936 .write_page = marvell_write_page,
2937 .get_sset_count = marvell_get_sset_count,
2938 .get_strings = marvell_get_strings,
2939 .get_stats = marvell_get_stats,
2940 .get_tunable = m88e1540_get_tunable,
2941 .set_tunable = m88e1540_set_tunable,
2942 .cable_test_start = marvell_vct7_cable_test_start,
2943 .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
2944 .cable_test_get_status = marvell_vct7_cable_test_get_status,
2947 .phy_id = MARVELL_PHY_ID_88E1340S,
2948 .phy_id_mask = MARVELL_PHY_ID_MASK,
2949 .name = "Marvell 88E1340S",
2950 .probe = m88e1510_probe,
2951 /* PHY_GBIT_FEATURES */
2952 .config_init = marvell_config_init,
2953 .config_aneg = m88e1510_config_aneg,
2954 .read_status = marvell_read_status,
2955 .ack_interrupt = marvell_ack_interrupt,
2956 .config_intr = marvell_config_intr,
2957 .did_interrupt = m88e1121_did_interrupt,
2958 .resume = genphy_resume,
2959 .suspend = genphy_suspend,
2960 .read_page = marvell_read_page,
2961 .write_page = marvell_write_page,
2962 .get_sset_count = marvell_get_sset_count,
2963 .get_strings = marvell_get_strings,
2964 .get_stats = marvell_get_stats,
2965 .get_tunable = m88e1540_get_tunable,
2966 .set_tunable = m88e1540_set_tunable,
2969 .phy_id = MARVELL_PHY_ID_88E1548P,
2970 .phy_id_mask = MARVELL_PHY_ID_MASK,
2971 .name = "Marvell 88E1548P",
2972 .probe = m88e1510_probe,
2973 .features = PHY_GBIT_FIBRE_FEATURES,
2974 .config_init = marvell_config_init,
2975 .config_aneg = m88e1510_config_aneg,
2976 .read_status = marvell_read_status,
2977 .ack_interrupt = marvell_ack_interrupt,
2978 .config_intr = marvell_config_intr,
2979 .did_interrupt = m88e1121_did_interrupt,
2980 .resume = genphy_resume,
2981 .suspend = genphy_suspend,
2982 .read_page = marvell_read_page,
2983 .write_page = marvell_write_page,
2984 .get_sset_count = marvell_get_sset_count,
2985 .get_strings = marvell_get_strings,
2986 .get_stats = marvell_get_stats,
2987 .get_tunable = m88e1540_get_tunable,
2988 .set_tunable = m88e1540_set_tunable,
2992 module_phy_driver(marvell_drivers);
2994 static struct mdio_device_id __maybe_unused marvell_tbl[] = {
2995 { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
2996 { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
2997 { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
2998 { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
2999 { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
3000 { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
3001 { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
3002 { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
3003 { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
3004 { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
3005 { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
3006 { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
3007 { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
3008 { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
3009 { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
3010 { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
3011 { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
3015 MODULE_DEVICE_TABLE(mdio, marvell_tbl);