drivers/net/ethernet/qlogic/qed/qed_ll2.c

   1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
   2 /* QLogic qed NIC Driver
   3  * Copyright (c) 2015-2017  QLogic Corporation
   4  * Copyright (c) 2019-2020 Marvell International Ltd.
   5  */
   6
   7 #include <linux/types.h>
   8 #include <asm/byteorder.h>
   9 #include <linux/dma-mapping.h>
  10 #include <linux/if_vlan.h>
  11 #include <linux/kernel.h>
  12 #include <linux/pci.h>
  13 #include <linux/slab.h>
  14 #include <linux/stddef.h>
  15 #include <linux/workqueue.h>
  16 #include <net/ipv6.h>
  17 #include <linux/bitops.h>
  18 #include <linux/delay.h>
  19 #include <linux/errno.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/io.h>
  22 #include <linux/list.h>
  23 #include <linux/mutex.h>
  24 #include <linux/spinlock.h>
  25 #include <linux/string.h>
  26 #include <linux/qed/qed_ll2_if.h>
  27 #include "qed.h"
  28 #include "qed_cxt.h"
  29 #include "qed_dev_api.h"
  30 #include "qed_hsi.h"
  31 #include "qed_hw.h"
  32 #include "qed_int.h"
  33 #include "qed_ll2.h"
  34 #include "qed_mcp.h"
  35 #include "qed_ooo.h"
  36 #include "qed_reg_addr.h"
  37 #include "qed_sp.h"
  38 #include "qed_rdma.h"
  39
  40 #define QED_LL2_RX_REGISTERED(ll2)      ((ll2)->rx_queue.b_cb_registered)
  41 #define QED_LL2_TX_REGISTERED(ll2)      ((ll2)->tx_queue.b_cb_registered)
  42
  43 #define QED_LL2_TX_SIZE (256)
  44 #define QED_LL2_RX_SIZE (4096)
  45
  46 struct qed_cb_ll2_info {
  47         int rx_cnt;
  48         u32 rx_size;
  49         u8 handle;
  50
  51         /* Lock protecting LL2 buffer lists in sleepless context */
  52         spinlock_t lock;
  53         struct list_head list;
  54
  55         const struct qed_ll2_cb_ops *cbs;
  56         void *cb_cookie;
  57 };
  58
  59 struct qed_ll2_buffer {
  60         struct list_head list;
  61         void *data;
  62         dma_addr_t phys_addr;
  63 };
  64
  65 static void qed_ll2b_complete_tx_packet(void *cxt,
  66                                         u8 connection_handle,
  67                                         void *cookie,
  68                                         dma_addr_t first_frag_addr,
  69                                         bool b_last_fragment,
  70                                         bool b_last_packet)
  71 {
  72         struct qed_hwfn *p_hwfn = cxt;
  73         struct qed_dev *cdev = p_hwfn->cdev;
  74         struct sk_buff *skb = cookie;
  75
  76         /* All we need to do is release the mapping */
  77         dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
  78                          skb_headlen(skb), DMA_TO_DEVICE);
  79
  80         if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
  81                 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
  82                                       b_last_fragment);
  83
  84         dev_kfree_skb_any(skb);
  85 }
  86
  87 static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
  88                                 u8 **data, dma_addr_t *phys_addr)
  89 {
  90         *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
  91         if (!(*data)) {
  92                 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
  93                 return -ENOMEM;
  94         }
  95
  96         *phys_addr = dma_map_single(&cdev->pdev->dev,
  97                                     ((*data) + NET_SKB_PAD),
  98                                     cdev->ll2->rx_size, DMA_FROM_DEVICE);
  99         if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
 100                 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
 101                 kfree((*data));
 102                 return -ENOMEM;
 103         }
 104
 105         return 0;
 106 }
 107
 108 static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
 109                                  struct qed_ll2_buffer *buffer)
 110 {
 111         spin_lock_bh(&cdev->ll2->lock);
 112
 113         dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
 114                          cdev->ll2->rx_size, DMA_FROM_DEVICE);
 115         kfree(buffer->data);
 116         list_del(&buffer->list);
 117
 118         cdev->ll2->rx_cnt--;
 119         if (!cdev->ll2->rx_cnt)
 120                 DP_INFO(cdev, "All LL2 entries were removed\n");
 121
 122         spin_unlock_bh(&cdev->ll2->lock);
 123
 124         return 0;
 125 }
 126
 127 static void qed_ll2_kill_buffers(struct qed_dev *cdev)
 128 {
 129         struct qed_ll2_buffer *buffer, *tmp_buffer;
 130
 131         list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
 132                 qed_ll2_dealloc_buffer(cdev, buffer);
 133 }
 134
 135 static void qed_ll2b_complete_rx_packet(void *cxt,
 136                                         struct qed_ll2_comp_rx_data *data)
 137 {
 138         struct qed_hwfn *p_hwfn = cxt;
 139         struct qed_ll2_buffer *buffer = data->cookie;
 140         struct qed_dev *cdev = p_hwfn->cdev;
 141         dma_addr_t new_phys_addr;
 142         struct sk_buff *skb;
 143         bool reuse = false;
 144         int rc = -EINVAL;
 145         u8 *new_data;
 146
 147         DP_VERBOSE(p_hwfn,
 148                    (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
 149                    "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
 150                    (u64)data->rx_buf_addr,
 151                    data->u.placement_offset,
 152                    data->length.packet_length,
 153                    data->parse_flags,
 154                    data->vlan, data->opaque_data_0, data->opaque_data_1);
 155
 156         if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
 157                 print_hex_dump(KERN_INFO, "",
 158                                DUMP_PREFIX_OFFSET, 16, 1,
 159                                buffer->data, data->length.packet_length, false);
 160         }
 161
 162         /* Determine if data is valid */
 163         if (data->length.packet_length < ETH_HLEN)
 164                 reuse = true;
 165
 166         /* Allocate a replacement for buffer; Reuse upon failure */
 167         if (!reuse)
 168                 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
 169                                           &new_phys_addr);
 170
 171         /* If need to reuse or there's no replacement buffer, repost this */
 172         if (rc)
 173                 goto out_post;
 174         dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
 175                          cdev->ll2->rx_size, DMA_FROM_DEVICE);
 176
 177         skb = build_skb(buffer->data, 0);
 178         if (!skb) {
 179                 DP_INFO(cdev, "Failed to build SKB\n");
 180                 kfree(buffer->data);
 181                 goto out_post1;
 182         }
 183
 184         data->u.placement_offset += NET_SKB_PAD;
 185         skb_reserve(skb, data->u.placement_offset);
 186         skb_put(skb, data->length.packet_length);
 187         skb_checksum_none_assert(skb);
 188
 189         /* Get parital ethernet information instead of eth_type_trans(),
 190          * Since we don't have an associated net_device.
 191          */
 192         skb_reset_mac_header(skb);
 193         skb->protocol = eth_hdr(skb)->h_proto;
 194
 195         /* Pass SKB onward */
 196         if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
 197                 if (data->vlan)
 198                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
 199                                                data->vlan);
 200                 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
 201                                       data->opaque_data_0,
 202                                       data->opaque_data_1);
 203         } else {
 204                 DP_VERBOSE(p_hwfn, (NETIF_MSG_RX_STATUS | NETIF_MSG_PKTDATA |
 205                                     QED_MSG_LL2 | QED_MSG_STORAGE),
 206                            "Dropping the packet\n");
 207                 kfree(buffer->data);
 208         }
 209
 210 out_post1:
 211         /* Update Buffer information and update FW producer */
 212         buffer->data = new_data;
 213         buffer->phys_addr = new_phys_addr;
 214
 215 out_post:
 216         rc = qed_ll2_post_rx_buffer(p_hwfn, cdev->ll2->handle,
 217                                     buffer->phys_addr, 0, buffer, 1);
 218         if (rc)
 219                 qed_ll2_dealloc_buffer(cdev, buffer);
 220 }
 221
 222 static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
 223                                                     u8 connection_handle,
 224                                                     bool b_lock,
 225                                                     bool b_only_active)
 226 {
 227         struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
 228
 229         if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
 230                 return NULL;
 231
 232         if (!p_hwfn->p_ll2_info)
 233                 return NULL;
 234
 235         p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
 236
 237         if (b_only_active) {
 238                 if (b_lock)
 239                         mutex_lock(&p_ll2_conn->mutex);
 240                 if (p_ll2_conn->b_active)
 241                         p_ret = p_ll2_conn;
 242                 if (b_lock)
 243                         mutex_unlock(&p_ll2_conn->mutex);
 244         } else {
 245                 p_ret = p_ll2_conn;
 246         }
 247
 248         return p_ret;
 249 }
 250
 251 static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
 252                                                   u8 connection_handle)
 253 {
 254         return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
 255 }
 256
 257 static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
 258                                                        u8 connection_handle)
 259 {
 260         return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
 261 }
 262
 263 static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
 264                                                            *p_hwfn,
 265                                                            u8 connection_handle)
 266 {
 267         return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
 268 }
 269
 270 static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
 271 {
 272         bool b_last_packet = false, b_last_frag = false;
 273         struct qed_ll2_tx_packet *p_pkt = NULL;
 274         struct qed_ll2_info *p_ll2_conn;
 275         struct qed_ll2_tx_queue *p_tx;
 276         unsigned long flags = 0;
 277         dma_addr_t tx_frag;
 278
 279         p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
 280         if (!p_ll2_conn)
 281                 return;
 282
 283         p_tx = &p_ll2_conn->tx_queue;
 284
 285         spin_lock_irqsave(&p_tx->lock, flags);
 286         while (!list_empty(&p_tx->active_descq)) {
 287                 p_pkt = list_first_entry(&p_tx->active_descq,
 288                                          struct qed_ll2_tx_packet, list_entry);
 289                 if (!p_pkt)
 290                         break;
 291
 292                 list_del(&p_pkt->list_entry);
 293                 b_last_packet = list_empty(&p_tx->active_descq);
 294                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
 295                 spin_unlock_irqrestore(&p_tx->lock, flags);
 296                 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
 297                         struct qed_ooo_buffer *p_buffer;
 298
 299                         p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 300                         qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
 301                                                 p_buffer);
 302                 } else {
 303                         p_tx->cur_completing_packet = *p_pkt;
 304                         p_tx->cur_completing_bd_idx = 1;
 305                         b_last_frag =
 306                                 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
 307                         tx_frag = p_pkt->bds_set[0].tx_frag;
 308                         p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
 309                                                       p_ll2_conn->my_id,
 310                                                       p_pkt->cookie,
 311                                                       tx_frag,
 312                                                       b_last_frag,
 313                                                       b_last_packet);
 314                 }
 315                 spin_lock_irqsave(&p_tx->lock, flags);
 316         }
 317         spin_unlock_irqrestore(&p_tx->lock, flags);
 318 }
 319
 320 static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
 321 {
 322         struct qed_ll2_info *p_ll2_conn = p_cookie;
 323         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
 324         u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
 325         struct qed_ll2_tx_packet *p_pkt;
 326         bool b_last_frag = false;
 327         unsigned long flags;
 328         int rc = -EINVAL;
 329
 330         spin_lock_irqsave(&p_tx->lock, flags);
 331         if (p_tx->b_completing_packet) {
 332                 rc = -EBUSY;
 333                 goto out;
 334         }
 335
 336         new_idx = le16_to_cpu(*p_tx->p_fw_cons);
 337         num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
 338         while (num_bds) {
 339                 if (list_empty(&p_tx->active_descq))
 340                         goto out;
 341
 342                 p_pkt = list_first_entry(&p_tx->active_descq,
 343                                          struct qed_ll2_tx_packet, list_entry);
 344                 if (!p_pkt)
 345                         goto out;
 346
 347                 p_tx->b_completing_packet = true;
 348                 p_tx->cur_completing_packet = *p_pkt;
 349                 num_bds_in_packet = p_pkt->bd_used;
 350                 list_del(&p_pkt->list_entry);
 351
 352                 if (num_bds < num_bds_in_packet) {
 353                         DP_NOTICE(p_hwfn,
 354                                   "Rest of BDs does not cover whole packet\n");
 355                         goto out;
 356                 }
 357
 358                 num_bds -= num_bds_in_packet;
 359                 p_tx->bds_idx += num_bds_in_packet;
 360                 while (num_bds_in_packet--)
 361                         qed_chain_consume(&p_tx->txq_chain);
 362
 363                 p_tx->cur_completing_bd_idx = 1;
 364                 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
 365                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
 366
 367                 spin_unlock_irqrestore(&p_tx->lock, flags);
 368
 369                 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
 370                                            p_ll2_conn->my_id,
 371                                            p_pkt->cookie,
 372                                            p_pkt->bds_set[0].tx_frag,
 373                                            b_last_frag, !num_bds);
 374
 375                 spin_lock_irqsave(&p_tx->lock, flags);
 376         }
 377
 378         p_tx->b_completing_packet = false;
 379         rc = 0;
 380 out:
 381         spin_unlock_irqrestore(&p_tx->lock, flags);
 382         return rc;
 383 }
 384
 385 static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
 386                                   union core_rx_cqe_union *p_cqe,
 387                                   struct qed_ll2_comp_rx_data *data)
 388 {
 389         data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
 390         data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
 391         data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
 392         data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
 393         data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
 394         data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
 395         data->qp_id = le16_to_cpu(p_cqe->rx_cqe_gsi.qp_id);
 396
 397         data->src_qp = le32_to_cpu(p_cqe->rx_cqe_gsi.src_qp);
 398 }
 399
 400 static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
 401                                   union core_rx_cqe_union *p_cqe,
 402                                   struct qed_ll2_comp_rx_data *data)
 403 {
 404         data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
 405         data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
 406         data->length.packet_length =
 407             le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
 408         data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
 409         data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
 410         data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
 411         data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
 412 }
 413
 414 static int
 415 qed_ll2_handle_slowpath(struct qed_hwfn *p_hwfn,
 416                         struct qed_ll2_info *p_ll2_conn,
 417                         union core_rx_cqe_union *p_cqe,
 418                         unsigned long *p_lock_flags)
 419 {
 420         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 421         struct core_rx_slow_path_cqe *sp_cqe;
 422
 423         sp_cqe = &p_cqe->rx_cqe_sp;
 424         if (sp_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH) {
 425                 DP_NOTICE(p_hwfn,
 426                           "LL2 - unexpected Rx CQE slowpath ramrod_cmd_id:%d\n",
 427                           sp_cqe->ramrod_cmd_id);
 428                 return -EINVAL;
 429         }
 430
 431         if (!p_ll2_conn->cbs.slowpath_cb) {
 432                 DP_NOTICE(p_hwfn,
 433                           "LL2 - received RX_QUEUE_FLUSH but no callback was provided\n");
 434                 return -EINVAL;
 435         }
 436
 437         spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
 438
 439         p_ll2_conn->cbs.slowpath_cb(p_ll2_conn->cbs.cookie,
 440                                     p_ll2_conn->my_id,
 441                                     le32_to_cpu(sp_cqe->opaque_data.data[0]),
 442                                     le32_to_cpu(sp_cqe->opaque_data.data[1]));
 443
 444         spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
 445
 446         return 0;
 447 }
 448
 449 static int
 450 qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
 451                               struct qed_ll2_info *p_ll2_conn,
 452                               union core_rx_cqe_union *p_cqe,
 453                               unsigned long *p_lock_flags, bool b_last_cqe)
 454 {
 455         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 456         struct qed_ll2_rx_packet *p_pkt = NULL;
 457         struct qed_ll2_comp_rx_data data;
 458
 459         if (!list_empty(&p_rx->active_descq))
 460                 p_pkt = list_first_entry(&p_rx->active_descq,
 461                                          struct qed_ll2_rx_packet, list_entry);
 462         if (!p_pkt) {
 463                 DP_NOTICE(p_hwfn,
 464                           "[%d] LL2 Rx completion but active_descq is empty\n",
 465                           p_ll2_conn->input.conn_type);
 466
 467                 return -EIO;
 468         }
 469         list_del(&p_pkt->list_entry);
 470
 471         if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
 472                 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
 473         else
 474                 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
 475         if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
 476                 DP_NOTICE(p_hwfn,
 477                           "Mismatch between active_descq and the LL2 Rx chain\n");
 478
 479         list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
 480
 481         data.connection_handle = p_ll2_conn->my_id;
 482         data.cookie = p_pkt->cookie;
 483         data.rx_buf_addr = p_pkt->rx_buf_addr;
 484         data.b_last_packet = b_last_cqe;
 485
 486         spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
 487         p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
 488
 489         spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
 490
 491         return 0;
 492 }
 493
 494 static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
 495 {
 496         struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
 497         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 498         union core_rx_cqe_union *cqe = NULL;
 499         u16 cq_new_idx = 0, cq_old_idx = 0;
 500         unsigned long flags = 0;
 501         int rc = 0;
 502
 503         spin_lock_irqsave(&p_rx->lock, flags);
 504         cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
 505         cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 506
 507         while (cq_new_idx != cq_old_idx) {
 508                 bool b_last_cqe = (cq_new_idx == cq_old_idx);
 509
 510                 cqe =
 511                     (union core_rx_cqe_union *)
 512                     qed_chain_consume(&p_rx->rcq_chain);
 513                 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 514
 515                 DP_VERBOSE(p_hwfn,
 516                            QED_MSG_LL2,
 517                            "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
 518                            cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
 519
 520                 switch (cqe->rx_cqe_sp.type) {
 521                 case CORE_RX_CQE_TYPE_SLOW_PATH:
 522                         rc = qed_ll2_handle_slowpath(p_hwfn, p_ll2_conn,
 523                                                      cqe, &flags);
 524                         break;
 525                 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
 526                 case CORE_RX_CQE_TYPE_REGULAR:
 527                         rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
 528                                                            cqe, &flags,
 529                                                            b_last_cqe);
 530                         break;
 531                 default:
 532                         rc = -EIO;
 533                 }
 534         }
 535
 536         spin_unlock_irqrestore(&p_rx->lock, flags);
 537         return rc;
 538 }
 539
 540 static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
 541 {
 542         struct qed_ll2_info *p_ll2_conn = NULL;
 543         struct qed_ll2_rx_packet *p_pkt = NULL;
 544         struct qed_ll2_rx_queue *p_rx;
 545         unsigned long flags = 0;
 546
 547         p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
 548         if (!p_ll2_conn)
 549                 return;
 550
 551         p_rx = &p_ll2_conn->rx_queue;
 552
 553         spin_lock_irqsave(&p_rx->lock, flags);
 554         while (!list_empty(&p_rx->active_descq)) {
 555                 p_pkt = list_first_entry(&p_rx->active_descq,
 556                                          struct qed_ll2_rx_packet, list_entry);
 557                 if (!p_pkt)
 558                         break;
 559                 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
 560                 spin_unlock_irqrestore(&p_rx->lock, flags);
 561
 562                 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
 563                         struct qed_ooo_buffer *p_buffer;
 564
 565                         p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 566                         qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
 567                                                 p_buffer);
 568                 } else {
 569                         dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
 570                         void *cookie = p_pkt->cookie;
 571                         bool b_last;
 572
 573                         b_last = list_empty(&p_rx->active_descq);
 574                         p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
 575                                                       p_ll2_conn->my_id,
 576                                                       cookie,
 577                                                       rx_buf_addr, b_last);
 578                 }
 579                 spin_lock_irqsave(&p_rx->lock, flags);
 580         }
 581         spin_unlock_irqrestore(&p_rx->lock, flags);
 582 }
 583
 584 static bool
 585 qed_ll2_lb_rxq_handler_slowpath(struct qed_hwfn *p_hwfn,
 586                                 struct core_rx_slow_path_cqe *p_cqe)
 587 {
 588         struct ooo_opaque *iscsi_ooo;
 589         u32 cid;
 590
 591         if (p_cqe->ramrod_cmd_id != CORE_RAMROD_RX_QUEUE_FLUSH)
 592                 return false;
 593
 594         iscsi_ooo = (struct ooo_opaque *)&p_cqe->opaque_data;
 595         if (iscsi_ooo->ooo_opcode != TCP_EVENT_DELETE_ISLES)
 596                 return false;
 597
 598         /* Need to make a flush */
 599         cid = le32_to_cpu(iscsi_ooo->cid);
 600         qed_ooo_release_connection_isles(p_hwfn, p_hwfn->p_ooo_info, cid);
 601
 602         return true;
 603 }
 604
 605 static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
 606                                   struct qed_ll2_info *p_ll2_conn)
 607 {
 608         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 609         u16 packet_length = 0, parse_flags = 0, vlan = 0;
 610         struct qed_ll2_rx_packet *p_pkt = NULL;
 611         u32 num_ooo_add_to_peninsula = 0, cid;
 612         union core_rx_cqe_union *cqe = NULL;
 613         u16 cq_new_idx = 0, cq_old_idx = 0;
 614         struct qed_ooo_buffer *p_buffer;
 615         struct ooo_opaque *iscsi_ooo;
 616         u8 placement_offset = 0;
 617         u8 cqe_type;
 618
 619         cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
 620         cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 621         if (cq_new_idx == cq_old_idx)
 622                 return 0;
 623
 624         while (cq_new_idx != cq_old_idx) {
 625                 struct core_rx_fast_path_cqe *p_cqe_fp;
 626
 627                 cqe = qed_chain_consume(&p_rx->rcq_chain);
 628                 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
 629                 cqe_type = cqe->rx_cqe_sp.type;
 630
 631                 if (cqe_type == CORE_RX_CQE_TYPE_SLOW_PATH)
 632                         if (qed_ll2_lb_rxq_handler_slowpath(p_hwfn,
 633                                                             &cqe->rx_cqe_sp))
 634                                 continue;
 635
 636                 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
 637                         DP_NOTICE(p_hwfn,
 638                                   "Got a non-regular LB LL2 completion [type 0x%02x]\n",
 639                                   cqe_type);
 640                         return -EINVAL;
 641                 }
 642                 p_cqe_fp = &cqe->rx_cqe_fp;
 643
 644                 placement_offset = p_cqe_fp->placement_offset;
 645                 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
 646                 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
 647                 vlan = le16_to_cpu(p_cqe_fp->vlan);
 648                 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
 649                 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
 650                                            iscsi_ooo);
 651                 cid = le32_to_cpu(iscsi_ooo->cid);
 652
 653                 /* Process delete isle first */
 654                 if (iscsi_ooo->drop_size)
 655                         qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
 656                                              iscsi_ooo->drop_isle,
 657                                              iscsi_ooo->drop_size);
 658
 659                 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
 660                         continue;
 661
 662                 /* Now process create/add/join isles */
 663                 if (list_empty(&p_rx->active_descq)) {
 664                         DP_NOTICE(p_hwfn,
 665                                   "LL2 OOO RX chain has no submitted buffers\n"
 666                                   );
 667                         return -EIO;
 668                 }
 669
 670                 p_pkt = list_first_entry(&p_rx->active_descq,
 671                                          struct qed_ll2_rx_packet, list_entry);
 672
 673                 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
 674                     (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
 675                     (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
 676                     (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
 677                     (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
 678                         if (!p_pkt) {
 679                                 DP_NOTICE(p_hwfn,
 680                                           "LL2 OOO RX packet is not valid\n");
 681                                 return -EIO;
 682                         }
 683                         list_del(&p_pkt->list_entry);
 684                         p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 685                         p_buffer->packet_length = packet_length;
 686                         p_buffer->parse_flags = parse_flags;
 687                         p_buffer->vlan = vlan;
 688                         p_buffer->placement_offset = placement_offset;
 689                         qed_chain_consume(&p_rx->rxq_chain);
 690                         list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
 691
 692                         switch (iscsi_ooo->ooo_opcode) {
 693                         case TCP_EVENT_ADD_NEW_ISLE:
 694                                 qed_ooo_add_new_isle(p_hwfn,
 695                                                      p_hwfn->p_ooo_info,
 696                                                      cid,
 697                                                      iscsi_ooo->ooo_isle,
 698                                                      p_buffer);
 699                                 break;
 700                         case TCP_EVENT_ADD_ISLE_RIGHT:
 701                                 qed_ooo_add_new_buffer(p_hwfn,
 702                                                        p_hwfn->p_ooo_info,
 703                                                        cid,
 704                                                        iscsi_ooo->ooo_isle,
 705                                                        p_buffer,
 706                                                        QED_OOO_RIGHT_BUF);
 707                                 break;
 708                         case TCP_EVENT_ADD_ISLE_LEFT:
 709                                 qed_ooo_add_new_buffer(p_hwfn,
 710                                                        p_hwfn->p_ooo_info,
 711                                                        cid,
 712                                                        iscsi_ooo->ooo_isle,
 713                                                        p_buffer,
 714                                                        QED_OOO_LEFT_BUF);
 715                                 break;
 716                         case TCP_EVENT_JOIN:
 717                                 qed_ooo_add_new_buffer(p_hwfn,
 718                                                        p_hwfn->p_ooo_info,
 719                                                        cid,
 720                                                        iscsi_ooo->ooo_isle +
 721                                                        1,
 722                                                        p_buffer,
 723                                                        QED_OOO_LEFT_BUF);
 724                                 qed_ooo_join_isles(p_hwfn,
 725                                                    p_hwfn->p_ooo_info,
 726                                                    cid, iscsi_ooo->ooo_isle);
 727                                 break;
 728                         case TCP_EVENT_ADD_PEN:
 729                                 num_ooo_add_to_peninsula++;
 730                                 qed_ooo_put_ready_buffer(p_hwfn,
 731                                                          p_hwfn->p_ooo_info,
 732                                                          p_buffer, true);
 733                                 break;
 734                         }
 735                 } else {
 736                         DP_NOTICE(p_hwfn,
 737                                   "Unexpected event (%d) TX OOO completion\n",
 738                                   iscsi_ooo->ooo_opcode);
 739                 }
 740         }
 741
 742         return 0;
 743 }
 744
 745 static void
 746 qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
 747                           struct qed_ll2_info *p_ll2_conn)
 748 {
 749         struct qed_ll2_tx_pkt_info tx_pkt;
 750         struct qed_ooo_buffer *p_buffer;
 751         u16 l4_hdr_offset_w;
 752         dma_addr_t first_frag;
 753         u8 bd_flags;
 754         int rc;
 755
 756         /* Submit Tx buffers here */
 757         while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
 758                                                     p_hwfn->p_ooo_info))) {
 759                 l4_hdr_offset_w = 0;
 760                 bd_flags = 0;
 761
 762                 first_frag = p_buffer->rx_buffer_phys_addr +
 763                              p_buffer->placement_offset;
 764                 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
 765                 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
 766
 767                 memset(&tx_pkt, 0, sizeof(tx_pkt));
 768                 tx_pkt.num_of_bds = 1;
 769                 tx_pkt.vlan = p_buffer->vlan;
 770                 tx_pkt.bd_flags = bd_flags;
 771                 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
 772                 switch (p_ll2_conn->tx_dest) {
 773                 case CORE_TX_DEST_NW:
 774                         tx_pkt.tx_dest = QED_LL2_TX_DEST_NW;
 775                         break;
 776                 case CORE_TX_DEST_LB:
 777                         tx_pkt.tx_dest = QED_LL2_TX_DEST_LB;
 778                         break;
 779                 case CORE_TX_DEST_DROP:
 780                 default:
 781                         tx_pkt.tx_dest = QED_LL2_TX_DEST_DROP;
 782                         break;
 783                 }
 784                 tx_pkt.first_frag = first_frag;
 785                 tx_pkt.first_frag_len = p_buffer->packet_length;
 786                 tx_pkt.cookie = p_buffer;
 787
 788                 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
 789                                                &tx_pkt, true);
 790                 if (rc) {
 791                         qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
 792                                                  p_buffer, false);
 793                         break;
 794                 }
 795         }
 796 }
 797
 798 static void
 799 qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
 800                           struct qed_ll2_info *p_ll2_conn)
 801 {
 802         struct qed_ooo_buffer *p_buffer;
 803         int rc;
 804
 805         while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
 806                                                    p_hwfn->p_ooo_info))) {
 807                 rc = qed_ll2_post_rx_buffer(p_hwfn,
 808                                             p_ll2_conn->my_id,
 809                                             p_buffer->rx_buffer_phys_addr,
 810                                             0, p_buffer, true);
 811                 if (rc) {
 812                         qed_ooo_put_free_buffer(p_hwfn,
 813                                                 p_hwfn->p_ooo_info, p_buffer);
 814                         break;
 815                 }
 816         }
 817 }
 818
 819 static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
 820 {
 821         struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
 822         int rc;
 823
 824         if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
 825                 return 0;
 826
 827         rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
 828         if (rc)
 829                 return rc;
 830
 831         qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
 832         qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
 833
 834         return 0;
 835 }
 836
 837 static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
 838 {
 839         struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
 840         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
 841         struct qed_ll2_tx_packet *p_pkt = NULL;
 842         struct qed_ooo_buffer *p_buffer;
 843         bool b_dont_submit_rx = false;
 844         u16 new_idx = 0, num_bds = 0;
 845         int rc;
 846
 847         if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
 848                 return 0;
 849
 850         new_idx = le16_to_cpu(*p_tx->p_fw_cons);
 851         num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
 852
 853         if (!num_bds)
 854                 return 0;
 855
 856         while (num_bds) {
 857                 if (list_empty(&p_tx->active_descq))
 858                         return -EINVAL;
 859
 860                 p_pkt = list_first_entry(&p_tx->active_descq,
 861                                          struct qed_ll2_tx_packet, list_entry);
 862                 if (!p_pkt)
 863                         return -EINVAL;
 864
 865                 if (p_pkt->bd_used != 1) {
 866                         DP_NOTICE(p_hwfn,
 867                                   "Unexpectedly many BDs(%d) in TX OOO completion\n",
 868                                   p_pkt->bd_used);
 869                         return -EINVAL;
 870                 }
 871
 872                 list_del(&p_pkt->list_entry);
 873
 874                 num_bds--;
 875                 p_tx->bds_idx++;
 876                 qed_chain_consume(&p_tx->txq_chain);
 877
 878                 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
 879                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
 880
 881                 if (b_dont_submit_rx) {
 882                         qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
 883                                                 p_buffer);
 884                         continue;
 885                 }
 886
 887                 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
 888                                             p_buffer->rx_buffer_phys_addr, 0,
 889                                             p_buffer, true);
 890                 if (rc != 0) {
 891                         qed_ooo_put_free_buffer(p_hwfn,
 892                                                 p_hwfn->p_ooo_info, p_buffer);
 893                         b_dont_submit_rx = true;
 894                 }
 895         }
 896
 897         qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
 898
 899         return 0;
 900 }
 901
 902 static void qed_ll2_stop_ooo(struct qed_hwfn *p_hwfn)
 903 {
 904         u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
 905
 906         DP_VERBOSE(p_hwfn, (QED_MSG_STORAGE | QED_MSG_LL2),
 907                    "Stopping LL2 OOO queue [%02x]\n", *handle);
 908
 909         qed_ll2_terminate_connection(p_hwfn, *handle);
 910         qed_ll2_release_connection(p_hwfn, *handle);
 911         *handle = QED_LL2_UNUSED_HANDLE;
 912 }
 913
 914 static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
 915                                      struct qed_ll2_info *p_ll2_conn,
 916                                      u8 action_on_error)
 917 {
 918         enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
 919         struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
 920         struct core_rx_start_ramrod_data *p_ramrod = NULL;
 921         struct qed_spq_entry *p_ent = NULL;
 922         struct qed_sp_init_data init_data;
 923         u16 cqe_pbl_size;
 924         int rc = 0;
 925
 926         /* Get SPQ entry */
 927         memset(&init_data, 0, sizeof(init_data));
 928         init_data.cid = p_ll2_conn->cid;
 929         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
 930         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
 931
 932         rc = qed_sp_init_request(p_hwfn, &p_ent,
 933                                  CORE_RAMROD_RX_QUEUE_START,
 934                                  PROTOCOLID_CORE, &init_data);
 935         if (rc)
 936                 return rc;
 937
 938         p_ramrod = &p_ent->ramrod.core_rx_queue_start;
 939         memset(p_ramrod, 0, sizeof(*p_ramrod));
 940         p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
 941         p_ramrod->sb_index = p_rx->rx_sb_index;
 942         p_ramrod->complete_event_flg = 1;
 943
 944         p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
 945         DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
 946         cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
 947         p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
 948         DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
 949                        qed_chain_get_pbl_phys(&p_rx->rcq_chain));
 950
 951         p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
 952         p_ramrod->inner_vlan_stripping_en =
 953                 p_ll2_conn->input.rx_vlan_removal_en;
 954
 955         if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
 956             p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE)
 957                 p_ramrod->report_outer_vlan = 1;
 958         p_ramrod->queue_id = p_ll2_conn->queue_id;
 959         p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
 960
 961         if (test_bit(QED_MF_LL2_NON_UNICAST, &p_hwfn->cdev->mf_bits) &&
 962             p_ramrod->main_func_queue && conn_type != QED_LL2_TYPE_ROCE &&
 963             conn_type != QED_LL2_TYPE_IWARP) {
 964                 p_ramrod->mf_si_bcast_accept_all = 1;
 965                 p_ramrod->mf_si_mcast_accept_all = 1;
 966         } else {
 967                 p_ramrod->mf_si_bcast_accept_all = 0;
 968                 p_ramrod->mf_si_mcast_accept_all = 0;
 969         }
 970
 971         p_ramrod->action_on_error.error_type = action_on_error;
 972         p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
 973         p_ramrod->zero_prod_flg = 1;
 974
 975         return qed_spq_post(p_hwfn, p_ent, NULL);
 976 }
 977
 978 static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
 979                                      struct qed_ll2_info *p_ll2_conn)
 980 {
 981         enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
 982         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
 983         struct core_tx_start_ramrod_data *p_ramrod = NULL;
 984         struct qed_spq_entry *p_ent = NULL;
 985         struct qed_sp_init_data init_data;
 986         u16 pq_id = 0, pbl_size;
 987         int rc = -EINVAL;
 988
 989         if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
 990                 return 0;
 991
 992         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
 993                 p_ll2_conn->tx_stats_en = 0;
 994         else
 995                 p_ll2_conn->tx_stats_en = 1;
 996
 997         /* Get SPQ entry */
 998         memset(&init_data, 0, sizeof(init_data));
 999         init_data.cid = p_ll2_conn->cid;
1000         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1001         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1002
1003         rc = qed_sp_init_request(p_hwfn, &p_ent,
1004                                  CORE_RAMROD_TX_QUEUE_START,
1005                                  PROTOCOLID_CORE, &init_data);
1006         if (rc)
1007                 return rc;
1008
1009         p_ramrod = &p_ent->ramrod.core_tx_queue_start;
1010
1011         p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
1012         p_ramrod->sb_index = p_tx->tx_sb_index;
1013         p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
1014         p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
1015         p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
1016
1017         DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
1018                        qed_chain_get_pbl_phys(&p_tx->txq_chain));
1019         pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
1020         p_ramrod->pbl_size = cpu_to_le16(pbl_size);
1021
1022         switch (p_ll2_conn->input.tx_tc) {
1023         case PURE_LB_TC:
1024                 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
1025                 break;
1026         case PKT_LB_TC:
1027                 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
1028                 break;
1029         default:
1030                 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
1031                 break;
1032         }
1033
1034         p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
1035
1036         switch (conn_type) {
1037         case QED_LL2_TYPE_FCOE:
1038                 p_ramrod->conn_type = PROTOCOLID_FCOE;
1039                 break;
1040         case QED_LL2_TYPE_ISCSI:
1041                 p_ramrod->conn_type = PROTOCOLID_ISCSI;
1042                 break;
1043         case QED_LL2_TYPE_ROCE:
1044                 p_ramrod->conn_type = PROTOCOLID_ROCE;
1045                 break;
1046         case QED_LL2_TYPE_IWARP:
1047                 p_ramrod->conn_type = PROTOCOLID_IWARP;
1048                 break;
1049         case QED_LL2_TYPE_OOO:
1050                 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
1051                         p_ramrod->conn_type = PROTOCOLID_ISCSI;
1052                 else
1053                         p_ramrod->conn_type = PROTOCOLID_IWARP;
1054                 break;
1055         default:
1056                 p_ramrod->conn_type = PROTOCOLID_ETH;
1057                 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
1058         }
1059
1060         p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
1061
1062         rc = qed_spq_post(p_hwfn, p_ent, NULL);
1063         if (rc)
1064                 return rc;
1065
1066         rc = qed_db_recovery_add(p_hwfn->cdev, p_tx->doorbell_addr,
1067                                  &p_tx->db_msg, DB_REC_WIDTH_32B,
1068                                  DB_REC_KERNEL);
1069         return rc;
1070 }
1071
1072 static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1073                                     struct qed_ll2_info *p_ll2_conn)
1074 {
1075         struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1076         struct qed_spq_entry *p_ent = NULL;
1077         struct qed_sp_init_data init_data;
1078         int rc = -EINVAL;
1079
1080         /* Get SPQ entry */
1081         memset(&init_data, 0, sizeof(init_data));
1082         init_data.cid = p_ll2_conn->cid;
1083         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1084         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1085
1086         rc = qed_sp_init_request(p_hwfn, &p_ent,
1087                                  CORE_RAMROD_RX_QUEUE_STOP,
1088                                  PROTOCOLID_CORE, &init_data);
1089         if (rc)
1090                 return rc;
1091
1092         p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1093
1094         p_ramrod->complete_event_flg = 1;
1095         p_ramrod->queue_id = p_ll2_conn->queue_id;
1096
1097         return qed_spq_post(p_hwfn, p_ent, NULL);
1098 }
1099
1100 static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1101                                     struct qed_ll2_info *p_ll2_conn)
1102 {
1103         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1104         struct qed_spq_entry *p_ent = NULL;
1105         struct qed_sp_init_data init_data;
1106         int rc = -EINVAL;
1107         qed_db_recovery_del(p_hwfn->cdev, p_tx->doorbell_addr, &p_tx->db_msg);
1108
1109         /* Get SPQ entry */
1110         memset(&init_data, 0, sizeof(init_data));
1111         init_data.cid = p_ll2_conn->cid;
1112         init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1113         init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1114
1115         rc = qed_sp_init_request(p_hwfn, &p_ent,
1116                                  CORE_RAMROD_TX_QUEUE_STOP,
1117                                  PROTOCOLID_CORE, &init_data);
1118         if (rc)
1119                 return rc;
1120
1121         return qed_spq_post(p_hwfn, p_ent, NULL);
1122 }
1123
1124 static int
1125 qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
1126                               struct qed_ll2_info *p_ll2_info)
1127 {
1128         struct qed_chain_init_params params = {
1129                 .intended_use   = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1130                 .cnt_type       = QED_CHAIN_CNT_TYPE_U16,
1131                 .num_elems      = p_ll2_info->input.rx_num_desc,
1132         };
1133         struct qed_dev *cdev = p_hwfn->cdev;
1134         struct qed_ll2_rx_packet *p_descq;
1135         u32 capacity;
1136         int rc = 0;
1137
1138         if (!p_ll2_info->input.rx_num_desc)
1139                 goto out;
1140
1141         params.mode = QED_CHAIN_MODE_NEXT_PTR;
1142         params.elem_size = sizeof(struct core_rx_bd);
1143
1144         rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rxq_chain, &params);
1145         if (rc) {
1146                 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1147                 goto out;
1148         }
1149
1150         capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1151         p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1152                           GFP_KERNEL);
1153         if (!p_descq) {
1154                 rc = -ENOMEM;
1155                 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1156                 goto out;
1157         }
1158         p_ll2_info->rx_queue.descq_array = p_descq;
1159
1160         params.mode = QED_CHAIN_MODE_PBL;
1161         params.elem_size = sizeof(struct core_rx_fast_path_cqe);
1162
1163         rc = qed_chain_alloc(cdev, &p_ll2_info->rx_queue.rcq_chain, &params);
1164         if (rc) {
1165                 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1166                 goto out;
1167         }
1168
1169         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1170                    "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
1171                    p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
1172
1173 out:
1174         return rc;
1175 }
1176
1177 static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
1178                                          struct qed_ll2_info *p_ll2_info)
1179 {
1180         struct qed_chain_init_params params = {
1181                 .mode           = QED_CHAIN_MODE_PBL,
1182                 .intended_use   = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1183                 .cnt_type       = QED_CHAIN_CNT_TYPE_U16,
1184                 .num_elems      = p_ll2_info->input.tx_num_desc,
1185                 .elem_size      = sizeof(struct core_tx_bd),
1186         };
1187         struct qed_ll2_tx_packet *p_descq;
1188         u32 desc_size;
1189         u32 capacity;
1190         int rc = 0;
1191
1192         if (!p_ll2_info->input.tx_num_desc)
1193                 goto out;
1194
1195         rc = qed_chain_alloc(p_hwfn->cdev, &p_ll2_info->tx_queue.txq_chain,
1196                              &params);
1197         if (rc)
1198                 goto out;
1199
1200         capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
1201         /* First element is part of the packet, rest are flexibly added */
1202         desc_size = (sizeof(*p_descq) +
1203                      (p_ll2_info->input.tx_max_bds_per_packet - 1) *
1204                      sizeof(p_descq->bds_set));
1205
1206         p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
1207         if (!p_descq) {
1208                 rc = -ENOMEM;
1209                 goto out;
1210         }
1211         p_ll2_info->tx_queue.descq_mem = p_descq;
1212
1213         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1214                    "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
1215                    p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
1216
1217 out:
1218         if (rc)
1219                 DP_NOTICE(p_hwfn,
1220                           "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
1221                           p_ll2_info->input.tx_num_desc);
1222         return rc;
1223 }
1224
1225 static int
1226 qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1227                                struct qed_ll2_info *p_ll2_info, u16 mtu)
1228 {
1229         struct qed_ooo_buffer *p_buf = NULL;
1230         void *p_virt;
1231         u16 buf_idx;
1232         int rc = 0;
1233
1234         if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
1235                 return rc;
1236
1237         /* Correct number of requested OOO buffers if needed */
1238         if (!p_ll2_info->input.rx_num_ooo_buffers) {
1239                 u16 num_desc = p_ll2_info->input.rx_num_desc;
1240
1241                 if (!num_desc)
1242                         return -EINVAL;
1243                 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1244         }
1245
1246         for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1247              buf_idx++) {
1248                 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1249                 if (!p_buf) {
1250                         rc = -ENOMEM;
1251                         goto out;
1252                 }
1253
1254                 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1255                 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1256                                          ETH_CACHE_LINE_SIZE - 1) &
1257                                         ~(ETH_CACHE_LINE_SIZE - 1);
1258                 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1259                                             p_buf->rx_buffer_size,
1260                                             &p_buf->rx_buffer_phys_addr,
1261                                             GFP_KERNEL);
1262                 if (!p_virt) {
1263                         kfree(p_buf);
1264                         rc = -ENOMEM;
1265                         goto out;
1266                 }
1267
1268                 p_buf->rx_buffer_virt_addr = p_virt;
1269                 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1270         }
1271
1272         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1273                    "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1274                    p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1275
1276 out:
1277         return rc;
1278 }
1279
1280 static int
1281 qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1282 {
1283         if (!cbs || (!cbs->rx_comp_cb ||
1284                      !cbs->rx_release_cb ||
1285                      !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1286                 return -EINVAL;
1287
1288         p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1289         p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1290         p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1291         p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1292         p_ll2_info->cbs.slowpath_cb = cbs->slowpath_cb;
1293         p_ll2_info->cbs.cookie = cbs->cookie;
1294
1295         return 0;
1296 }
1297
1298 static void _qed_ll2_calc_allowed_conns(struct qed_hwfn *p_hwfn,
1299                                         struct qed_ll2_acquire_data *data,
1300                                         u8 *start_idx, u8 *last_idx)
1301 {
1302         /* LL2 queues handles will be split as follows:
1303          * First will be the legacy queues, and then the ctx based.
1304          */
1305         if (data->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1306                 *start_idx = QED_LL2_LEGACY_CONN_BASE_PF;
1307                 *last_idx = *start_idx +
1308                         QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF;
1309         } else {
1310                 /* QED_LL2_RX_TYPE_CTX */
1311                 *start_idx = QED_LL2_CTX_CONN_BASE_PF;
1312                 *last_idx = *start_idx +
1313                         QED_MAX_NUM_OF_CTX_LL2_CONNS_PF;
1314         }
1315 }
1316
1317 static enum core_error_handle
1318 qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1319 {
1320         switch (err) {
1321         case QED_LL2_DROP_PACKET:
1322                 return LL2_DROP_PACKET;
1323         case QED_LL2_DO_NOTHING:
1324                 return LL2_DO_NOTHING;
1325         case QED_LL2_ASSERT:
1326                 return LL2_ASSERT;
1327         default:
1328                 return LL2_DO_NOTHING;
1329         }
1330 }
1331
1332 int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
1333 {
1334         struct qed_hwfn *p_hwfn = cxt;
1335         qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1336         struct qed_ll2_info *p_ll2_info = NULL;
1337         u8 i, first_idx, last_idx, *p_tx_max;
1338         int rc;
1339
1340         if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
1341                 return -EINVAL;
1342
1343         _qed_ll2_calc_allowed_conns(p_hwfn, data, &first_idx, &last_idx);
1344
1345         /* Find a free connection to be used */
1346         for (i = first_idx; i < last_idx; i++) {
1347                 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1348                 if (p_hwfn->p_ll2_info[i].b_active) {
1349                         mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1350                         continue;
1351                 }
1352
1353                 p_hwfn->p_ll2_info[i].b_active = true;
1354                 p_ll2_info = &p_hwfn->p_ll2_info[i];
1355                 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1356                 break;
1357         }
1358         if (!p_ll2_info)
1359                 return -EBUSY;
1360
1361         memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
1362
1363         switch (data->input.tx_dest) {
1364         case QED_LL2_TX_DEST_NW:
1365                 p_ll2_info->tx_dest = CORE_TX_DEST_NW;
1366                 break;
1367         case QED_LL2_TX_DEST_LB:
1368                 p_ll2_info->tx_dest = CORE_TX_DEST_LB;
1369                 break;
1370         case QED_LL2_TX_DEST_DROP:
1371                 p_ll2_info->tx_dest = CORE_TX_DEST_DROP;
1372                 break;
1373         default:
1374                 return -EINVAL;
1375         }
1376
1377         if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1378             data->input.secondary_queue)
1379                 p_ll2_info->main_func_queue = false;
1380         else
1381                 p_ll2_info->main_func_queue = true;
1382
1383         /* Correct maximum number of Tx BDs */
1384         p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1385         if (*p_tx_max == 0)
1386                 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1387         else
1388                 *p_tx_max = min_t(u8, *p_tx_max,
1389                                   CORE_LL2_TX_MAX_BDS_PER_PACKET);
1390
1391         rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1392         if (rc) {
1393                 DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1394                 goto q_allocate_fail;
1395         }
1396
1397         rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
1398         if (rc)
1399                 goto q_allocate_fail;
1400
1401         rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
1402         if (rc)
1403                 goto q_allocate_fail;
1404
1405         rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
1406                                             data->input.mtu);
1407         if (rc)
1408                 goto q_allocate_fail;
1409
1410         /* Register callbacks for the Rx/Tx queues */
1411         if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1412                 comp_rx_cb = qed_ll2_lb_rxq_completion;
1413                 comp_tx_cb = qed_ll2_lb_txq_completion;
1414         } else {
1415                 comp_rx_cb = qed_ll2_rxq_completion;
1416                 comp_tx_cb = qed_ll2_txq_completion;
1417         }
1418
1419         if (data->input.rx_num_desc) {
1420                 qed_int_register_cb(p_hwfn, comp_rx_cb,
1421                                     &p_hwfn->p_ll2_info[i],
1422                                     &p_ll2_info->rx_queue.rx_sb_index,
1423                                     &p_ll2_info->rx_queue.p_fw_cons);
1424                 p_ll2_info->rx_queue.b_cb_registered = true;
1425         }
1426
1427         if (data->input.tx_num_desc) {
1428                 qed_int_register_cb(p_hwfn,
1429                                     comp_tx_cb,
1430                                     &p_hwfn->p_ll2_info[i],
1431                                     &p_ll2_info->tx_queue.tx_sb_index,
1432                                     &p_ll2_info->tx_queue.p_fw_cons);
1433                 p_ll2_info->tx_queue.b_cb_registered = true;
1434         }
1435
1436         *data->p_connection_handle = i;
1437         return rc;
1438
1439 q_allocate_fail:
1440         qed_ll2_release_connection(p_hwfn, i);
1441         return -ENOMEM;
1442 }
1443
1444 static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1445                                            struct qed_ll2_info *p_ll2_conn)
1446 {
1447         enum qed_ll2_error_handle error_input;
1448         enum core_error_handle error_mode;
1449         u8 action_on_error = 0;
1450         int rc;
1451
1452         if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1453                 return 0;
1454
1455         DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
1456         error_input = p_ll2_conn->input.ai_err_packet_too_big;
1457         error_mode = qed_ll2_get_error_choice(error_input);
1458         SET_FIELD(action_on_error,
1459                   CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1460         error_input = p_ll2_conn->input.ai_err_no_buf;
1461         error_mode = qed_ll2_get_error_choice(error_input);
1462         SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
1463
1464         rc = qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1465         if (rc)
1466                 return rc;
1467
1468         if (p_ll2_conn->rx_queue.ctx_based) {
1469                 rc = qed_db_recovery_add(p_hwfn->cdev,
1470                                          p_ll2_conn->rx_queue.set_prod_addr,
1471                                          &p_ll2_conn->rx_queue.db_data,
1472                                          DB_REC_WIDTH_64B, DB_REC_KERNEL);
1473         }
1474
1475         return rc;
1476 }
1477
1478 static void
1479 qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1480                                  struct qed_ll2_info *p_ll2_conn)
1481 {
1482         if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
1483                 return;
1484
1485         qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1486         qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1487 }
1488
1489 static inline u8 qed_ll2_handle_to_queue_id(struct qed_hwfn *p_hwfn,
1490                                             u8 handle,
1491                                             u8 ll2_queue_type)
1492 {
1493         u8 qid;
1494
1495         if (ll2_queue_type == QED_LL2_RX_TYPE_LEGACY)
1496                 return p_hwfn->hw_info.resc_start[QED_LL2_RAM_QUEUE] + handle;
1497
1498         /* QED_LL2_RX_TYPE_CTX
1499          * FW distinguishes between the legacy queues (ram based) and the
1500          * ctx based queues by the queue_id.
1501          * The first MAX_NUM_LL2_RX_RAM_QUEUES queues are legacy
1502          * and the queue ids above that are ctx base.
1503          */
1504         qid = p_hwfn->hw_info.resc_start[QED_LL2_CTX_QUEUE] +
1505               MAX_NUM_LL2_RX_RAM_QUEUES;
1506
1507         /* See comment on the acquire connection for how the ll2
1508          * queues handles are divided.
1509          */
1510         qid += (handle - QED_MAX_NUM_OF_LEGACY_LL2_CONNS_PF);
1511
1512         return qid;
1513 }
1514
1515 int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
1516 {
1517         struct e4_core_conn_context *p_cxt;
1518         struct qed_ll2_tx_packet *p_pkt;
1519         struct qed_ll2_info *p_ll2_conn;
1520         struct qed_hwfn *p_hwfn = cxt;
1521         struct qed_ll2_rx_queue *p_rx;
1522         struct qed_ll2_tx_queue *p_tx;
1523         struct qed_cxt_info cxt_info;
1524         struct qed_ptt *p_ptt;
1525         int rc = -EINVAL;
1526         u32 i, capacity;
1527         u32 desc_size;
1528         u8 qid;
1529
1530         p_ptt = qed_ptt_acquire(p_hwfn);
1531         if (!p_ptt)
1532                 return -EAGAIN;
1533
1534         p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
1535         if (!p_ll2_conn) {
1536                 rc = -EINVAL;
1537                 goto out;
1538         }
1539
1540         p_rx = &p_ll2_conn->rx_queue;
1541         p_tx = &p_ll2_conn->tx_queue;
1542
1543         qed_chain_reset(&p_rx->rxq_chain);
1544         qed_chain_reset(&p_rx->rcq_chain);
1545         INIT_LIST_HEAD(&p_rx->active_descq);
1546         INIT_LIST_HEAD(&p_rx->free_descq);
1547         INIT_LIST_HEAD(&p_rx->posting_descq);
1548         spin_lock_init(&p_rx->lock);
1549         capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1550         for (i = 0; i < capacity; i++)
1551                 list_add_tail(&p_rx->descq_array[i].list_entry,
1552                               &p_rx->free_descq);
1553         *p_rx->p_fw_cons = 0;
1554
1555         qed_chain_reset(&p_tx->txq_chain);
1556         INIT_LIST_HEAD(&p_tx->active_descq);
1557         INIT_LIST_HEAD(&p_tx->free_descq);
1558         INIT_LIST_HEAD(&p_tx->sending_descq);
1559         spin_lock_init(&p_tx->lock);
1560         capacity = qed_chain_get_capacity(&p_tx->txq_chain);
1561         /* First element is part of the packet, rest are flexibly added */
1562         desc_size = (sizeof(*p_pkt) +
1563                      (p_ll2_conn->input.tx_max_bds_per_packet - 1) *
1564                      sizeof(p_pkt->bds_set));
1565
1566         for (i = 0; i < capacity; i++) {
1567                 p_pkt = p_tx->descq_mem + desc_size * i;
1568                 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1569         }
1570         p_tx->cur_completing_bd_idx = 0;
1571         p_tx->bds_idx = 0;
1572         p_tx->b_completing_packet = false;
1573         p_tx->cur_send_packet = NULL;
1574         p_tx->cur_send_frag_num = 0;
1575         p_tx->cur_completing_frag_num = 0;
1576         *p_tx->p_fw_cons = 0;
1577
1578         rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1579         if (rc)
1580                 goto out;
1581         cxt_info.iid = p_ll2_conn->cid;
1582         rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
1583         if (rc) {
1584                 DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
1585                           p_ll2_conn->cid);
1586                 goto out;
1587         }
1588
1589         p_cxt = cxt_info.p_cxt;
1590
1591         memset(p_cxt, 0, sizeof(*p_cxt));
1592
1593         qid = qed_ll2_handle_to_queue_id(p_hwfn, connection_handle,
1594                                          p_ll2_conn->input.rx_conn_type);
1595         p_ll2_conn->queue_id = qid;
1596         p_ll2_conn->tx_stats_id = qid;
1597
1598         DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1599                    "Establishing ll2 queue. PF %d ctx_based=%d abs qid=%d\n",
1600                    p_hwfn->rel_pf_id, p_ll2_conn->input.rx_conn_type, qid);
1601
1602         if (p_ll2_conn->input.rx_conn_type == QED_LL2_RX_TYPE_LEGACY) {
1603                 p_rx->set_prod_addr = p_hwfn->regview +
1604                     GTT_BAR0_MAP_REG_TSDM_RAM + TSTORM_LL2_RX_PRODS_OFFSET(qid);
1605         } else {
1606                 /* QED_LL2_RX_TYPE_CTX - using doorbell */
1607                 p_rx->ctx_based = 1;
1608
1609                 p_rx->set_prod_addr = p_hwfn->doorbells +
1610                         p_hwfn->dpi_start_offset +
1611                         DB_ADDR_SHIFT(DQ_PWM_OFFSET_TCM_LL2_PROD_UPDATE);
1612
1613                 /* prepare db data */
1614                 p_rx->db_data.icid = cpu_to_le16((u16)p_ll2_conn->cid);
1615                 SET_FIELD(p_rx->db_data.params,
1616                           CORE_PWM_PROD_UPDATE_DATA_AGG_CMD, DB_AGG_CMD_SET);
1617                 SET_FIELD(p_rx->db_data.params,
1618                           CORE_PWM_PROD_UPDATE_DATA_RESERVED1, 0);
1619         }
1620
1621         p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1622                                             qed_db_addr(p_ll2_conn->cid,
1623                                                         DQ_DEMS_LEGACY);
1624         /* prepare db data */
1625         SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1626         SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1627         SET_FIELD(p_tx->db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1628                   DQ_XCM_CORE_TX_BD_PROD_CMD);
1629         p_tx->db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1630
1631         rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1632         if (rc)
1633                 goto out;
1634
1635         rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1636         if (rc)
1637                 goto out;
1638
1639         if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
1640                 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
1641
1642         qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1643
1644         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
1645                 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
1646                         qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1647                                                     QED_LLH_FILTER_ETHERTYPE,
1648                                                     ETH_P_FCOE, 0);
1649                 qed_llh_add_protocol_filter(p_hwfn->cdev, 0,
1650                                             QED_LLH_FILTER_ETHERTYPE,
1651                                             ETH_P_FIP, 0);
1652         }
1653
1654 out:
1655         qed_ptt_release(p_hwfn, p_ptt);
1656         return rc;
1657 }
1658
1659 static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1660                                              struct qed_ll2_rx_queue *p_rx,
1661                                              struct qed_ll2_rx_packet *p_curp)
1662 {
1663         struct qed_ll2_rx_packet *p_posting_packet = NULL;
1664         struct core_ll2_rx_prod rx_prod = { 0, 0 };
1665         bool b_notify_fw = false;
1666         u16 bd_prod, cq_prod;
1667
1668         /* This handles the flushing of already posted buffers */
1669         while (!list_empty(&p_rx->posting_descq)) {
1670                 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1671                                                     struct qed_ll2_rx_packet,
1672                                                     list_entry);
1673                 list_move_tail(&p_posting_packet->list_entry,
1674                                &p_rx->active_descq);
1675                 b_notify_fw = true;
1676         }
1677
1678         /* This handles the supplied packet [if there is one] */
1679         if (p_curp) {
1680                 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1681                 b_notify_fw = true;
1682         }
1683
1684         if (!b_notify_fw)
1685                 return;
1686
1687         bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1688         cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1689         if (p_rx->ctx_based) {
1690                 /* update producer by giving a doorbell */
1691                 p_rx->db_data.prod.bd_prod = cpu_to_le16(bd_prod);
1692                 p_rx->db_data.prod.cqe_prod = cpu_to_le16(cq_prod);
1693                 /* Make sure chain element is updated before ringing the
1694                  * doorbell
1695                  */
1696                 dma_wmb();
1697                 DIRECT_REG_WR64(p_rx->set_prod_addr,
1698                                 *((u64 *)&p_rx->db_data));
1699         } else {
1700                 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1701                 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1702
1703                 /* Make sure chain element is updated before ringing the
1704                  * doorbell
1705                  */
1706                 dma_wmb();
1707
1708                 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1709         }
1710 }
1711
1712 int qed_ll2_post_rx_buffer(void *cxt,
1713                            u8 connection_handle,
1714                            dma_addr_t addr,
1715                            u16 buf_len, void *cookie, u8 notify_fw)
1716 {
1717         struct qed_hwfn *p_hwfn = cxt;
1718         struct core_rx_bd_with_buff_len *p_curb = NULL;
1719         struct qed_ll2_rx_packet *p_curp = NULL;
1720         struct qed_ll2_info *p_ll2_conn;
1721         struct qed_ll2_rx_queue *p_rx;
1722         unsigned long flags;
1723         void *p_data;
1724         int rc = 0;
1725
1726         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1727         if (!p_ll2_conn)
1728                 return -EINVAL;
1729         p_rx = &p_ll2_conn->rx_queue;
1730
1731         spin_lock_irqsave(&p_rx->lock, flags);
1732         if (!list_empty(&p_rx->free_descq))
1733                 p_curp = list_first_entry(&p_rx->free_descq,
1734                                           struct qed_ll2_rx_packet, list_entry);
1735         if (p_curp) {
1736                 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1737                     qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1738                         p_data = qed_chain_produce(&p_rx->rxq_chain);
1739                         p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1740                         qed_chain_produce(&p_rx->rcq_chain);
1741                 }
1742         }
1743
1744         /* If we're lacking entires, let's try to flush buffers to FW */
1745         if (!p_curp || !p_curb) {
1746                 rc = -EBUSY;
1747                 p_curp = NULL;
1748                 goto out_notify;
1749         }
1750
1751         /* We have an Rx packet we can fill */
1752         DMA_REGPAIR_LE(p_curb->addr, addr);
1753         p_curb->buff_length = cpu_to_le16(buf_len);
1754         p_curp->rx_buf_addr = addr;
1755         p_curp->cookie = cookie;
1756         p_curp->rxq_bd = p_curb;
1757         p_curp->buf_length = buf_len;
1758         list_del(&p_curp->list_entry);
1759
1760         /* Check if we only want to enqueue this packet without informing FW */
1761         if (!notify_fw) {
1762                 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1763                 goto out;
1764         }
1765
1766 out_notify:
1767         qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1768 out:
1769         spin_unlock_irqrestore(&p_rx->lock, flags);
1770         return rc;
1771 }
1772
1773 static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1774                                           struct qed_ll2_tx_queue *p_tx,
1775                                           struct qed_ll2_tx_packet *p_curp,
1776                                           struct qed_ll2_tx_pkt_info *pkt,
1777                                           u8 notify_fw)
1778 {
1779         list_del(&p_curp->list_entry);
1780         p_curp->cookie = pkt->cookie;
1781         p_curp->bd_used = pkt->num_of_bds;
1782         p_curp->notify_fw = notify_fw;
1783         p_tx->cur_send_packet = p_curp;
1784         p_tx->cur_send_frag_num = 0;
1785
1786         p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1787         p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
1788         p_tx->cur_send_frag_num++;
1789 }
1790
1791 static void
1792 qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1793                                  struct qed_ll2_info *p_ll2,
1794                                  struct qed_ll2_tx_packet *p_curp,
1795                                  struct qed_ll2_tx_pkt_info *pkt)
1796 {
1797         struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1798         u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1799         struct core_tx_bd *start_bd = NULL;
1800         enum core_roce_flavor_type roce_flavor;
1801         enum core_tx_dest tx_dest;
1802         u16 bd_data = 0, frag_idx;
1803         u16 bitfield1;
1804
1805         roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1806                                                              : CORE_RROCE;
1807
1808         switch (pkt->tx_dest) {
1809         case QED_LL2_TX_DEST_NW:
1810                 tx_dest = CORE_TX_DEST_NW;
1811                 break;
1812         case QED_LL2_TX_DEST_LB:
1813                 tx_dest = CORE_TX_DEST_LB;
1814                 break;
1815         case QED_LL2_TX_DEST_DROP:
1816                 tx_dest = CORE_TX_DEST_DROP;
1817                 break;
1818         default:
1819                 tx_dest = CORE_TX_DEST_LB;
1820                 break;
1821         }
1822
1823         start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1824         if (QED_IS_IWARP_PERSONALITY(p_hwfn) &&
1825             p_ll2->input.conn_type == QED_LL2_TYPE_OOO) {
1826                 start_bd->nw_vlan_or_lb_echo =
1827                     cpu_to_le16(IWARP_LL2_IN_ORDER_TX_QUEUE);
1828         } else {
1829                 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
1830                 if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
1831                     p_ll2->input.conn_type == QED_LL2_TYPE_FCOE)
1832                         pkt->remove_stag = true;
1833         }
1834
1835         bitfield1 = le16_to_cpu(start_bd->bitfield1);
1836         SET_FIELD(bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W, pkt->l4_hdr_offset_w);
1837         SET_FIELD(bitfield1, CORE_TX_BD_TX_DST, tx_dest);
1838         start_bd->bitfield1 = cpu_to_le16(bitfield1);
1839
1840         bd_data |= pkt->bd_flags;
1841         SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
1842         SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
1843         SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
1844         SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1845         SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1846         SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
1847         SET_FIELD(bd_data, CORE_TX_BD_DATA_DISABLE_STAG_INSERTION,
1848                   !!(pkt->remove_stag));
1849
1850         start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
1851         DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1852         start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
1853
1854         DP_VERBOSE(p_hwfn,
1855                    (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1856                    "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1857                    p_ll2->queue_id,
1858                    p_ll2->cid,
1859                    p_ll2->input.conn_type,
1860                    prod_idx,
1861                    pkt->first_frag_len,
1862                    pkt->num_of_bds,
1863                    le32_to_cpu(start_bd->addr.hi),
1864                    le32_to_cpu(start_bd->addr.lo));
1865
1866         if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
1867                 return;
1868
1869         /* Need to provide the packet with additional BDs for frags */
1870         for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
1871              frag_idx < pkt->num_of_bds; frag_idx++) {
1872                 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1873
1874                 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
1875                 (*p_bd)->bd_data.as_bitfield = 0;
1876                 (*p_bd)->bitfield1 = 0;
1877                 p_curp->bds_set[frag_idx].tx_frag = 0;
1878                 p_curp->bds_set[frag_idx].frag_len = 0;
1879         }
1880 }
1881
1882 /* This should be called while the Txq spinlock is being held */
1883 static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1884                                      struct qed_ll2_info *p_ll2_conn)
1885 {
1886         bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1887         struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1888         struct qed_ll2_tx_packet *p_pkt = NULL;
1889         u16 bd_prod;
1890
1891         /* If there are missing BDs, don't do anything now */
1892         if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1893             p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1894                 return;
1895
1896         /* Push the current packet to the list and clean after it */
1897         list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1898                       &p_ll2_conn->tx_queue.sending_descq);
1899         p_ll2_conn->tx_queue.cur_send_packet = NULL;
1900         p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1901
1902         /* Notify FW of packet only if requested to */
1903         if (!b_notify)
1904                 return;
1905
1906         bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1907
1908         while (!list_empty(&p_tx->sending_descq)) {
1909                 p_pkt = list_first_entry(&p_tx->sending_descq,
1910                                          struct qed_ll2_tx_packet, list_entry);
1911                 if (!p_pkt)
1912                         break;
1913
1914                 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
1915         }
1916
1917         p_tx->db_msg.spq_prod = cpu_to_le16(bd_prod);
1918
1919         /* Make sure the BDs data is updated before ringing the doorbell */
1920         wmb();
1921
1922         DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&p_tx->db_msg));
1923
1924         DP_VERBOSE(p_hwfn,
1925                    (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1926                    "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1927                    p_ll2_conn->queue_id,
1928                    p_ll2_conn->cid,
1929                    p_ll2_conn->input.conn_type, p_tx->db_msg.spq_prod);
1930 }
1931
1932 int qed_ll2_prepare_tx_packet(void *cxt,
1933                               u8 connection_handle,
1934                               struct qed_ll2_tx_pkt_info *pkt,
1935                               bool notify_fw)
1936 {
1937         struct qed_hwfn *p_hwfn = cxt;
1938         struct qed_ll2_tx_packet *p_curp = NULL;
1939         struct qed_ll2_info *p_ll2_conn = NULL;
1940         struct qed_ll2_tx_queue *p_tx;
1941         struct qed_chain *p_tx_chain;
1942         unsigned long flags;
1943         int rc = 0;
1944
1945         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1946         if (!p_ll2_conn)
1947                 return -EINVAL;
1948         p_tx = &p_ll2_conn->tx_queue;
1949         p_tx_chain = &p_tx->txq_chain;
1950
1951         if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet)
1952                 return -EIO;
1953
1954         spin_lock_irqsave(&p_tx->lock, flags);
1955         if (p_tx->cur_send_packet) {
1956                 rc = -EEXIST;
1957                 goto out;
1958         }
1959
1960         /* Get entry, but only if we have tx elements for it */
1961         if (!list_empty(&p_tx->free_descq))
1962                 p_curp = list_first_entry(&p_tx->free_descq,
1963                                           struct qed_ll2_tx_packet, list_entry);
1964         if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
1965                 p_curp = NULL;
1966
1967         if (!p_curp) {
1968                 rc = -EBUSY;
1969                 goto out;
1970         }
1971
1972         /* Prepare packet and BD, and perhaps send a doorbell to FW */
1973         qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1974
1975         qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
1976
1977         qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1978
1979 out:
1980         spin_unlock_irqrestore(&p_tx->lock, flags);
1981         return rc;
1982 }
1983
1984 int qed_ll2_set_fragment_of_tx_packet(void *cxt,
1985                                       u8 connection_handle,
1986                                       dma_addr_t addr, u16 nbytes)
1987 {
1988         struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
1989         struct qed_hwfn *p_hwfn = cxt;
1990         struct qed_ll2_info *p_ll2_conn = NULL;
1991         u16 cur_send_frag_num = 0;
1992         struct core_tx_bd *p_bd;
1993         unsigned long flags;
1994
1995         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1996         if (!p_ll2_conn)
1997                 return -EINVAL;
1998
1999         if (!p_ll2_conn->tx_queue.cur_send_packet)
2000                 return -EINVAL;
2001
2002         p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
2003         cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
2004
2005         if (cur_send_frag_num >= p_cur_send_packet->bd_used)
2006                 return -EINVAL;
2007
2008         /* Fill the BD information, and possibly notify FW */
2009         p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
2010         DMA_REGPAIR_LE(p_bd->addr, addr);
2011         p_bd->nbytes = cpu_to_le16(nbytes);
2012         p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
2013         p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
2014
2015         p_ll2_conn->tx_queue.cur_send_frag_num++;
2016
2017         spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
2018         qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
2019         spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
2020
2021         return 0;
2022 }
2023
2024 int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
2025 {
2026         struct qed_hwfn *p_hwfn = cxt;
2027         struct qed_ll2_info *p_ll2_conn = NULL;
2028         int rc = -EINVAL;
2029         struct qed_ptt *p_ptt;
2030
2031         p_ptt = qed_ptt_acquire(p_hwfn);
2032         if (!p_ptt)
2033                 return -EAGAIN;
2034
2035         p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
2036         if (!p_ll2_conn) {
2037                 rc = -EINVAL;
2038                 goto out;
2039         }
2040
2041         /* Stop Tx & Rx of connection, if needed */
2042         if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
2043                 p_ll2_conn->tx_queue.b_cb_registered = false;
2044                 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2045                 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
2046                 if (rc)
2047                         goto out;
2048
2049                 qed_ll2_txq_flush(p_hwfn, connection_handle);
2050                 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
2051         }
2052
2053         if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
2054                 p_ll2_conn->rx_queue.b_cb_registered = false;
2055                 smp_wmb(); /* Make sure this is seen by ll2_lb_rxq_completion */
2056
2057                 if (p_ll2_conn->rx_queue.ctx_based)
2058                         qed_db_recovery_del(p_hwfn->cdev,
2059                                             p_ll2_conn->rx_queue.set_prod_addr,
2060                                             &p_ll2_conn->rx_queue.db_data);
2061
2062                 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
2063                 if (rc)
2064                         goto out;
2065
2066                 qed_ll2_rxq_flush(p_hwfn, connection_handle);
2067                 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
2068         }
2069
2070         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
2071                 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2072
2073         if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
2074                 if (!test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits))
2075                         qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2076                                                        QED_LLH_FILTER_ETHERTYPE,
2077                                                        ETH_P_FCOE, 0);
2078                 qed_llh_remove_protocol_filter(p_hwfn->cdev, 0,
2079                                                QED_LLH_FILTER_ETHERTYPE,
2080                                                ETH_P_FIP, 0);
2081         }
2082
2083 out:
2084         qed_ptt_release(p_hwfn, p_ptt);
2085         return rc;
2086 }
2087
2088 static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
2089                                            struct qed_ll2_info *p_ll2_conn)
2090 {
2091         struct qed_ooo_buffer *p_buffer;
2092
2093         if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
2094                 return;
2095
2096         qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
2097         while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
2098                                                    p_hwfn->p_ooo_info))) {
2099                 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
2100                                   p_buffer->rx_buffer_size,
2101                                   p_buffer->rx_buffer_virt_addr,
2102                                   p_buffer->rx_buffer_phys_addr);
2103                 kfree(p_buffer);
2104         }
2105 }
2106
2107 void qed_ll2_release_connection(void *cxt, u8 connection_handle)
2108 {
2109         struct qed_hwfn *p_hwfn = cxt;
2110         struct qed_ll2_info *p_ll2_conn = NULL;
2111
2112         p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
2113         if (!p_ll2_conn)
2114                 return;
2115
2116         kfree(p_ll2_conn->tx_queue.descq_mem);
2117         qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
2118
2119         kfree(p_ll2_conn->rx_queue.descq_array);
2120         qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
2121         qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
2122
2123         qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
2124
2125         qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
2126
2127         mutex_lock(&p_ll2_conn->mutex);
2128         p_ll2_conn->b_active = false;
2129         mutex_unlock(&p_ll2_conn->mutex);
2130 }
2131
2132 int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
2133 {
2134         struct qed_ll2_info *p_ll2_connections;
2135         u8 i;
2136
2137         /* Allocate LL2's set struct */
2138         p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
2139                                     sizeof(struct qed_ll2_info), GFP_KERNEL);
2140         if (!p_ll2_connections) {
2141                 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
2142                 return -ENOMEM;
2143         }
2144
2145         for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2146                 p_ll2_connections[i].my_id = i;
2147
2148         p_hwfn->p_ll2_info = p_ll2_connections;
2149         return 0;
2150 }
2151
2152 void qed_ll2_setup(struct qed_hwfn *p_hwfn)
2153 {
2154         int i;
2155
2156         for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
2157                 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
2158 }
2159
2160 void qed_ll2_free(struct qed_hwfn *p_hwfn)
2161 {
2162         if (!p_hwfn->p_ll2_info)
2163                 return;
2164
2165         kfree(p_hwfn->p_ll2_info);
2166         p_hwfn->p_ll2_info = NULL;
2167 }
2168
2169 static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
2170                                     struct qed_ptt *p_ptt,
2171                                     struct qed_ll2_stats *p_stats)
2172 {
2173         struct core_ll2_port_stats port_stats;
2174
2175         memset(&port_stats, 0, sizeof(port_stats));
2176         qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
2177                         BAR0_MAP_REG_TSDM_RAM +
2178                         TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
2179                         sizeof(port_stats));
2180
2181         p_stats->gsi_invalid_hdr += HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
2182         p_stats->gsi_invalid_pkt_length +=
2183             HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
2184         p_stats->gsi_unsupported_pkt_typ +=
2185             HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
2186         p_stats->gsi_crcchksm_error +=
2187             HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
2188 }
2189
2190 static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
2191                                 struct qed_ptt *p_ptt,
2192                                 struct qed_ll2_info *p_ll2_conn,
2193                                 struct qed_ll2_stats *p_stats)
2194 {
2195         struct core_ll2_tstorm_per_queue_stat tstats;
2196         u8 qid = p_ll2_conn->queue_id;
2197         u32 tstats_addr;
2198
2199         memset(&tstats, 0, sizeof(tstats));
2200         tstats_addr = BAR0_MAP_REG_TSDM_RAM +
2201                       CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
2202         qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
2203
2204         p_stats->packet_too_big_discard +=
2205                         HILO_64_REGPAIR(tstats.packet_too_big_discard);
2206         p_stats->no_buff_discard += HILO_64_REGPAIR(tstats.no_buff_discard);
2207 }
2208
2209 static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
2210                                 struct qed_ptt *p_ptt,
2211                                 struct qed_ll2_info *p_ll2_conn,
2212                                 struct qed_ll2_stats *p_stats)
2213 {
2214         struct core_ll2_ustorm_per_queue_stat ustats;
2215         u8 qid = p_ll2_conn->queue_id;
2216         u32 ustats_addr;
2217
2218         memset(&ustats, 0, sizeof(ustats));
2219         ustats_addr = BAR0_MAP_REG_USDM_RAM +
2220                       CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
2221         qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2222
2223         p_stats->rcv_ucast_bytes += HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2224         p_stats->rcv_mcast_bytes += HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2225         p_stats->rcv_bcast_bytes += HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2226         p_stats->rcv_ucast_pkts += HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2227         p_stats->rcv_mcast_pkts += HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2228         p_stats->rcv_bcast_pkts += HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2229 }
2230
2231 static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2232                                 struct qed_ptt *p_ptt,
2233                                 struct qed_ll2_info *p_ll2_conn,
2234                                 struct qed_ll2_stats *p_stats)
2235 {
2236         struct core_ll2_pstorm_per_queue_stat pstats;
2237         u8 stats_id = p_ll2_conn->tx_stats_id;
2238         u32 pstats_addr;
2239
2240         memset(&pstats, 0, sizeof(pstats));
2241         pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2242                       CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2243         qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2244
2245         p_stats->sent_ucast_bytes += HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2246         p_stats->sent_mcast_bytes += HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2247         p_stats->sent_bcast_bytes += HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2248         p_stats->sent_ucast_pkts += HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2249         p_stats->sent_mcast_pkts += HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2250         p_stats->sent_bcast_pkts += HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2251 }
2252
2253 static int __qed_ll2_get_stats(void *cxt, u8 connection_handle,
2254                                struct qed_ll2_stats *p_stats)
2255 {
2256         struct qed_hwfn *p_hwfn = cxt;
2257         struct qed_ll2_info *p_ll2_conn = NULL;
2258         struct qed_ptt *p_ptt;
2259
2260         if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2261             !p_hwfn->p_ll2_info)
2262                 return -EINVAL;
2263
2264         p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2265
2266         p_ptt = qed_ptt_acquire(p_hwfn);
2267         if (!p_ptt) {
2268                 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2269                 return -EINVAL;
2270         }
2271
2272         if (p_ll2_conn->input.gsi_enable)
2273                 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
2274
2275         _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2276
2277         _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2278
2279         if (p_ll2_conn->tx_stats_en)
2280                 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2281
2282         qed_ptt_release(p_hwfn, p_ptt);
2283
2284         return 0;
2285 }
2286
2287 int qed_ll2_get_stats(void *cxt,
2288                       u8 connection_handle, struct qed_ll2_stats *p_stats)
2289 {
2290         memset(p_stats, 0, sizeof(*p_stats));
2291         return __qed_ll2_get_stats(cxt, connection_handle, p_stats);
2292 }
2293
2294 static void qed_ll2b_release_rx_packet(void *cxt,
2295                                        u8 connection_handle,
2296                                        void *cookie,
2297                                        dma_addr_t rx_buf_addr,
2298                                        bool b_last_packet)
2299 {
2300         struct qed_hwfn *p_hwfn = cxt;
2301
2302         qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2303 }
2304
2305 static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2306                                     const struct qed_ll2_cb_ops *ops,
2307                                     void *cookie)
2308 {
2309         cdev->ll2->cbs = ops;
2310         cdev->ll2->cb_cookie = cookie;
2311 }
2312
2313 static struct qed_ll2_cbs ll2_cbs = {
2314         .rx_comp_cb = &qed_ll2b_complete_rx_packet,
2315         .rx_release_cb = &qed_ll2b_release_rx_packet,
2316         .tx_comp_cb = &qed_ll2b_complete_tx_packet,
2317         .tx_release_cb = &qed_ll2b_complete_tx_packet,
2318 };
2319
2320 static void qed_ll2_set_conn_data(struct qed_hwfn *p_hwfn,
2321                                   struct qed_ll2_acquire_data *data,
2322                                   struct qed_ll2_params *params,
2323                                   enum qed_ll2_conn_type conn_type,
2324                                   u8 *handle, bool lb)
2325 {
2326         memset(data, 0, sizeof(*data));
2327
2328         data->input.conn_type = conn_type;
2329         data->input.mtu = params->mtu;
2330         data->input.rx_num_desc = QED_LL2_RX_SIZE;
2331         data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2332         data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2333         data->input.tx_num_desc = QED_LL2_TX_SIZE;
2334         data->p_connection_handle = handle;
2335         data->cbs = &ll2_cbs;
2336         ll2_cbs.cookie = p_hwfn;
2337
2338         if (lb) {
2339                 data->input.tx_tc = PKT_LB_TC;
2340                 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2341         } else {
2342                 data->input.tx_tc = 0;
2343                 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2344         }
2345 }
2346
2347 static int qed_ll2_start_ooo(struct qed_hwfn *p_hwfn,
2348                              struct qed_ll2_params *params)
2349 {
2350         u8 *handle = &p_hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2351         struct qed_ll2_acquire_data data;
2352         int rc;
2353
2354         qed_ll2_set_conn_data(p_hwfn, &data, params,
2355                               QED_LL2_TYPE_OOO, handle, true);
2356
2357         rc = qed_ll2_acquire_connection(p_hwfn, &data);
2358         if (rc) {
2359                 DP_INFO(p_hwfn, "Failed to acquire LL2 OOO connection\n");
2360                 goto out;
2361         }
2362
2363         rc = qed_ll2_establish_connection(p_hwfn, *handle);
2364         if (rc) {
2365                 DP_INFO(p_hwfn, "Failed to establish LL2 OOO connection\n");
2366                 goto fail;
2367         }
2368
2369         return 0;
2370
2371 fail:
2372         qed_ll2_release_connection(p_hwfn, *handle);
2373 out:
2374         *handle = QED_LL2_UNUSED_HANDLE;
2375         return rc;
2376 }
2377
2378 static bool qed_ll2_is_storage_eng1(struct qed_dev *cdev)
2379 {
2380         return (QED_IS_FCOE_PERSONALITY(QED_LEADING_HWFN(cdev)) ||
2381                 QED_IS_ISCSI_PERSONALITY(QED_LEADING_HWFN(cdev))) &&
2382                 (QED_AFFIN_HWFN(cdev) != QED_LEADING_HWFN(cdev));
2383 }
2384
2385 static int __qed_ll2_stop(struct qed_hwfn *p_hwfn)
2386 {
2387         struct qed_dev *cdev = p_hwfn->cdev;
2388         int rc;
2389
2390         rc = qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2391         if (rc)
2392                 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2393
2394         qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2395
2396         return rc;
2397 }
2398
2399 static int qed_ll2_stop(struct qed_dev *cdev)
2400 {
2401         bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2402         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2403         int rc = 0, rc2 = 0;
2404
2405         if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2406                 return 0;
2407
2408         qed_llh_remove_mac_filter(cdev, 0, cdev->ll2_mac_address);
2409         eth_zero_addr(cdev->ll2_mac_address);
2410
2411         if (QED_IS_ISCSI_PERSONALITY(p_hwfn))
2412                 qed_ll2_stop_ooo(p_hwfn);
2413
2414         /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2415         if (b_is_storage_eng1) {
2416                 rc2 = __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2417                 if (rc2)
2418                         DP_NOTICE(QED_LEADING_HWFN(cdev),
2419                                   "Failed to stop LL2 on engine 0\n");
2420         }
2421
2422         rc = __qed_ll2_stop(p_hwfn);
2423         if (rc)
2424                 DP_NOTICE(p_hwfn, "Failed to stop LL2\n");
2425
2426         qed_ll2_kill_buffers(cdev);
2427
2428         cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2429
2430         return rc | rc2;
2431 }
2432
2433 static int __qed_ll2_start(struct qed_hwfn *p_hwfn,
2434                            struct qed_ll2_params *params)
2435 {
2436         struct qed_ll2_buffer *buffer, *tmp_buffer;
2437         struct qed_dev *cdev = p_hwfn->cdev;
2438         enum qed_ll2_conn_type conn_type;
2439         struct qed_ll2_acquire_data data;
2440         int rc, rx_cnt;
2441
2442         switch (p_hwfn->hw_info.personality) {
2443         case QED_PCI_FCOE:
2444                 conn_type = QED_LL2_TYPE_FCOE;
2445                 break;
2446         case QED_PCI_ISCSI:
2447                 conn_type = QED_LL2_TYPE_ISCSI;
2448                 break;
2449         case QED_PCI_ETH_ROCE:
2450                 conn_type = QED_LL2_TYPE_ROCE;
2451                 break;
2452         default:
2453
2454                 conn_type = QED_LL2_TYPE_TEST;
2455         }
2456
2457         qed_ll2_set_conn_data(p_hwfn, &data, params, conn_type,
2458                               &cdev->ll2->handle, false);
2459
2460         rc = qed_ll2_acquire_connection(p_hwfn, &data);
2461         if (rc) {
2462                 DP_INFO(p_hwfn, "Failed to acquire LL2 connection\n");
2463                 return rc;
2464         }
2465
2466         rc = qed_ll2_establish_connection(p_hwfn, cdev->ll2->handle);
2467         if (rc) {
2468                 DP_INFO(p_hwfn, "Failed to establish LL2 connection\n");
2469                 goto release_conn;
2470         }
2471
2472         /* Post all Rx buffers to FW */
2473         spin_lock_bh(&cdev->ll2->lock);
2474         rx_cnt = cdev->ll2->rx_cnt;
2475         list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
2476                 rc = qed_ll2_post_rx_buffer(p_hwfn,
2477                                             cdev->ll2->handle,
2478                                             buffer->phys_addr, 0, buffer, 1);
2479                 if (rc) {
2480                         DP_INFO(p_hwfn,
2481                                 "Failed to post an Rx buffer; Deleting it\n");
2482                         dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2483                                          cdev->ll2->rx_size, DMA_FROM_DEVICE);
2484                         kfree(buffer->data);
2485                         list_del(&buffer->list);
2486                         kfree(buffer);
2487                 } else {
2488                         rx_cnt++;
2489                 }
2490         }
2491         spin_unlock_bh(&cdev->ll2->lock);
2492
2493         if (rx_cnt == cdev->ll2->rx_cnt) {
2494                 DP_NOTICE(p_hwfn, "Failed passing even a single Rx buffer\n");
2495                 goto terminate_conn;
2496         }
2497         cdev->ll2->rx_cnt = rx_cnt;
2498
2499         return 0;
2500
2501 terminate_conn:
2502         qed_ll2_terminate_connection(p_hwfn, cdev->ll2->handle);
2503 release_conn:
2504         qed_ll2_release_connection(p_hwfn, cdev->ll2->handle);
2505         return rc;
2506 }
2507
2508 static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2509 {
2510         bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2511         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2512         struct qed_ll2_buffer *buffer;
2513         int rx_num_desc, i, rc;
2514
2515         if (!is_valid_ether_addr(params->ll2_mac_address)) {
2516                 DP_NOTICE(cdev, "Invalid Ethernet address\n");
2517                 return -EINVAL;
2518         }
2519
2520         WARN_ON(!cdev->ll2->cbs);
2521
2522         /* Initialize LL2 locks & lists */
2523         INIT_LIST_HEAD(&cdev->ll2->list);
2524         spin_lock_init(&cdev->ll2->lock);
2525
2526         cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2527                              L1_CACHE_BYTES + params->mtu;
2528
2529         /* Allocate memory for LL2.
2530          * In CMT mode, in case of a storage PF which is affintized to engine 1,
2531          * LL2 is started also on engine 0 and thus we need twofold buffers.
2532          */
2533         rx_num_desc = QED_LL2_RX_SIZE * (b_is_storage_eng1 ? 2 : 1);
2534         DP_INFO(cdev, "Allocating %d LL2 buffers of size %08x bytes\n",
2535                 rx_num_desc, cdev->ll2->rx_size);
2536         for (i = 0; i < rx_num_desc; i++) {
2537                 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2538                 if (!buffer) {
2539                         DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2540                         rc = -ENOMEM;
2541                         goto err0;
2542                 }
2543
2544                 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2545                                           &buffer->phys_addr);
2546                 if (rc) {
2547                         kfree(buffer);
2548                         goto err0;
2549                 }
2550
2551                 list_add_tail(&buffer->list, &cdev->ll2->list);
2552         }
2553
2554         rc = __qed_ll2_start(p_hwfn, params);
2555         if (rc) {
2556                 DP_NOTICE(cdev, "Failed to start LL2\n");
2557                 goto err0;
2558         }
2559
2560         /* In CMT mode, always need to start LL2 on engine 0 for a storage PF,
2561          * since broadcast/mutlicast packets are routed to engine 0.
2562          */
2563         if (b_is_storage_eng1) {
2564                 rc = __qed_ll2_start(QED_LEADING_HWFN(cdev), params);
2565                 if (rc) {
2566                         DP_NOTICE(QED_LEADING_HWFN(cdev),
2567                                   "Failed to start LL2 on engine 0\n");
2568                         goto err1;
2569                 }
2570         }
2571
2572         if (QED_IS_ISCSI_PERSONALITY(p_hwfn)) {
2573                 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2574                 rc = qed_ll2_start_ooo(p_hwfn, params);
2575                 if (rc) {
2576                         DP_NOTICE(cdev, "Failed to start OOO LL2\n");
2577                         goto err2;
2578                 }
2579         }
2580
2581         rc = qed_llh_add_mac_filter(cdev, 0, params->ll2_mac_address);
2582         if (rc) {
2583                 DP_NOTICE(cdev, "Failed to add an LLH filter\n");
2584                 goto err3;
2585         }
2586
2587         ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
2588
2589         return 0;
2590
2591 err3:
2592         if (QED_IS_ISCSI_PERSONALITY(p_hwfn))
2593                 qed_ll2_stop_ooo(p_hwfn);
2594 err2:
2595         if (b_is_storage_eng1)
2596                 __qed_ll2_stop(QED_LEADING_HWFN(cdev));
2597 err1:
2598         __qed_ll2_stop(p_hwfn);
2599 err0:
2600         qed_ll2_kill_buffers(cdev);
2601         cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2602         return rc;
2603 }
2604
2605 static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb,
2606                               unsigned long xmit_flags)
2607 {
2608         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2609         struct qed_ll2_tx_pkt_info pkt;
2610         const skb_frag_t *frag;
2611         u8 flags = 0, nr_frags;
2612         int rc = -EINVAL, i;
2613         dma_addr_t mapping;
2614         u16 vlan = 0;
2615
2616         if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2617                 DP_INFO(cdev, "Cannot transmit a checksummed packet\n");
2618                 return -EINVAL;
2619         }
2620
2621         /* Cache number of fragments from SKB since SKB may be freed by
2622          * the completion routine after calling qed_ll2_prepare_tx_packet()
2623          */
2624         nr_frags = skb_shinfo(skb)->nr_frags;
2625
2626         if (1 + nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2627                 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2628                        1 + nr_frags);
2629                 return -EINVAL;
2630         }
2631
2632         mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2633                                  skb->len, DMA_TO_DEVICE);
2634         if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2635                 DP_NOTICE(cdev, "SKB mapping failed\n");
2636                 return -EINVAL;
2637         }
2638
2639         /* Request HW to calculate IP csum */
2640         if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2641               ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
2642                 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
2643
2644         if (skb_vlan_tag_present(skb)) {
2645                 vlan = skb_vlan_tag_get(skb);
2646                 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
2647         }
2648
2649         memset(&pkt, 0, sizeof(pkt));
2650         pkt.num_of_bds = 1 + nr_frags;
2651         pkt.vlan = vlan;
2652         pkt.bd_flags = flags;
2653         pkt.tx_dest = QED_LL2_TX_DEST_NW;
2654         pkt.first_frag = mapping;
2655         pkt.first_frag_len = skb->len;
2656         pkt.cookie = skb;
2657         if (test_bit(QED_MF_UFP_SPECIFIC, &cdev->mf_bits) &&
2658             test_bit(QED_LL2_XMIT_FLAGS_FIP_DISCOVERY, &xmit_flags))
2659                 pkt.remove_stag = true;
2660
2661         /* qed_ll2_prepare_tx_packet() may actually send the packet if
2662          * there are no fragments in the skb and subsequently the completion
2663          * routine may run and free the SKB, so no dereferencing the SKB
2664          * beyond this point unless skb has any fragments.
2665          */
2666         rc = qed_ll2_prepare_tx_packet(p_hwfn, cdev->ll2->handle,
2667                                        &pkt, 1);
2668         if (rc)
2669                 goto err;
2670
2671         for (i = 0; i < nr_frags; i++) {
2672                 frag = &skb_shinfo(skb)->frags[i];
2673
2674                 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2675                                            skb_frag_size(frag), DMA_TO_DEVICE);
2676
2677                 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2678                         DP_NOTICE(cdev,
2679                                   "Unable to map frag - dropping packet\n");
2680                         rc = -ENOMEM;
2681                         goto err;
2682                 }
2683
2684                 rc = qed_ll2_set_fragment_of_tx_packet(p_hwfn,
2685                                                        cdev->ll2->handle,
2686                                                        mapping,
2687                                                        skb_frag_size(frag));
2688
2689                 /* if failed not much to do here, partial packet has been posted
2690                  * we can't free memory, will need to wait for completion
2691                  */
2692                 if (rc)
2693                         goto err2;
2694         }
2695
2696         return 0;
2697
2698 err:
2699         dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2700 err2:
2701         return rc;
2702 }
2703
2704 static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2705 {
2706         bool b_is_storage_eng1 = qed_ll2_is_storage_eng1(cdev);
2707         struct qed_hwfn *p_hwfn = QED_AFFIN_HWFN(cdev);
2708         int rc;
2709
2710         if (!cdev->ll2)
2711                 return -EINVAL;
2712
2713         rc = qed_ll2_get_stats(p_hwfn, cdev->ll2->handle, stats);
2714         if (rc) {
2715                 DP_NOTICE(p_hwfn, "Failed to get LL2 stats\n");
2716                 return rc;
2717         }
2718
2719         /* In CMT mode, LL2 is always started on engine 0 for a storage PF */
2720         if (b_is_storage_eng1) {
2721                 rc = __qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2722                                          cdev->ll2->handle, stats);
2723                 if (rc) {
2724                         DP_NOTICE(QED_LEADING_HWFN(cdev),
2725                                   "Failed to get LL2 stats on engine 0\n");
2726                         return rc;
2727                 }
2728         }
2729
2730         return 0;
2731 }
2732
2733 const struct qed_ll2_ops qed_ll2_ops_pass = {
2734         .start = &qed_ll2_start,
2735         .stop = &qed_ll2_stop,
2736         .start_xmit = &qed_ll2_start_xmit,
2737         .register_cb_ops = &qed_ll2_register_cb_ops,
2738         .get_stats = &qed_ll2_stats,
2739 };
2740
2741 int qed_ll2_alloc_if(struct qed_dev *cdev)
2742 {
2743         cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2744         return cdev->ll2 ? 0 : -ENOMEM;
2745 }
2746
2747 void qed_ll2_dealloc_if(struct qed_dev *cdev)
2748 {
2749         kfree(cdev->ll2);
2750         cdev->ll2 = NULL;
2751 }