2 * Copyright (C) 2015 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #include <linux/virtio.h>
27 #include <linux/virtio_config.h>
28 #include <linux/virtio_ring.h>
30 #include <drm/drm_file.h>
31 #include <drm/drm_managed.h>
33 #include "virtgpu_drv.h"
35 static void virtio_gpu_config_changed_work_func(struct work_struct *work)
37 struct virtio_gpu_device *vgdev =
38 container_of(work, struct virtio_gpu_device,
40 u32 events_read, events_clear = 0;
42 /* read the config space */
43 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
44 events_read, &events_read);
45 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
46 if (vgdev->num_scanouts) {
48 virtio_gpu_cmd_get_edids(vgdev);
49 virtio_gpu_cmd_get_display_info(vgdev);
50 virtio_gpu_notify(vgdev);
51 drm_helper_hpd_irq_event(vgdev->ddev);
53 events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
55 virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config,
56 events_clear, &events_clear);
59 static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
60 void (*work_func)(struct work_struct *work))
62 spin_lock_init(&vgvq->qlock);
63 init_waitqueue_head(&vgvq->ack_queue);
64 INIT_WORK(&vgvq->dequeue_work, work_func);
67 static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
71 bool invalid_capset_id = false;
72 struct drm_device *drm = vgdev->ddev;
74 vgdev->capsets = drmm_kcalloc(drm, num_capsets,
75 sizeof(struct virtio_gpu_drv_capset),
77 if (!vgdev->capsets) {
78 DRM_ERROR("failed to allocate cap sets\n");
81 for (i = 0; i < num_capsets; i++) {
82 virtio_gpu_cmd_get_capset_info(vgdev, i);
83 virtio_gpu_notify(vgdev);
84 ret = wait_event_timeout(vgdev->resp_wq,
85 vgdev->capsets[i].id > 0, 5 * HZ);
87 * Capability ids are defined in the virtio-gpu spec and are
88 * between 1 to 63, inclusive.
90 if (!vgdev->capsets[i].id ||
91 vgdev->capsets[i].id > MAX_CAPSET_ID)
92 invalid_capset_id = true;
95 DRM_ERROR("timed out waiting for cap set %d\n", i);
96 else if (invalid_capset_id)
97 DRM_ERROR("invalid capset id %u", vgdev->capsets[i].id);
99 if (ret == 0 || invalid_capset_id) {
100 spin_lock(&vgdev->display_info_lock);
101 drmm_kfree(drm, vgdev->capsets);
102 vgdev->capsets = NULL;
103 spin_unlock(&vgdev->display_info_lock);
107 vgdev->capset_id_mask |= 1 << vgdev->capsets[i].id;
108 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
109 i, vgdev->capsets[i].id,
110 vgdev->capsets[i].max_version,
111 vgdev->capsets[i].max_size);
114 vgdev->num_capsets = num_capsets;
117 int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev)
119 static vq_callback_t *callbacks[] = {
120 virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
122 static const char * const names[] = { "control", "cursor" };
124 struct virtio_gpu_device *vgdev;
125 /* this will expand later */
126 struct virtqueue *vqs[2];
127 u32 num_scanouts, num_capsets;
130 if (!virtio_has_feature(vdev, VIRTIO_F_VERSION_1))
133 vgdev = drmm_kzalloc(dev, sizeof(struct virtio_gpu_device), GFP_KERNEL);
138 dev->dev_private = vgdev;
141 spin_lock_init(&vgdev->display_info_lock);
142 spin_lock_init(&vgdev->resource_export_lock);
143 spin_lock_init(&vgdev->host_visible_lock);
144 ida_init(&vgdev->ctx_id_ida);
145 ida_init(&vgdev->resource_ida);
146 init_waitqueue_head(&vgdev->resp_wq);
147 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
148 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
150 vgdev->fence_drv.context = dma_fence_context_alloc(1);
151 spin_lock_init(&vgdev->fence_drv.lock);
152 INIT_LIST_HEAD(&vgdev->fence_drv.fences);
153 INIT_LIST_HEAD(&vgdev->cap_cache);
154 INIT_WORK(&vgdev->config_changed_work,
155 virtio_gpu_config_changed_work_func);
157 INIT_WORK(&vgdev->obj_free_work,
158 virtio_gpu_array_put_free_work);
159 INIT_LIST_HEAD(&vgdev->obj_free_list);
160 spin_lock_init(&vgdev->obj_free_lock);
162 #ifdef __LITTLE_ENDIAN
163 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
164 vgdev->has_virgl_3d = true;
166 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
167 vgdev->has_edid = true;
169 if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) {
170 vgdev->has_indirect = true;
172 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) {
173 vgdev->has_resource_assign_uuid = true;
175 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_BLOB)) {
176 vgdev->has_resource_blob = true;
178 if (virtio_get_shm_region(vgdev->vdev, &vgdev->host_visible_region,
179 VIRTIO_GPU_SHM_ID_HOST_VISIBLE)) {
180 if (!devm_request_mem_region(&vgdev->vdev->dev,
181 vgdev->host_visible_region.addr,
182 vgdev->host_visible_region.len,
183 dev_name(&vgdev->vdev->dev))) {
184 DRM_ERROR("Could not reserve host visible region\n");
189 DRM_INFO("Host memory window: 0x%lx +0x%lx\n",
190 (unsigned long)vgdev->host_visible_region.addr,
191 (unsigned long)vgdev->host_visible_region.len);
192 vgdev->has_host_visible = true;
193 drm_mm_init(&vgdev->host_visible_mm,
194 (unsigned long)vgdev->host_visible_region.addr,
195 (unsigned long)vgdev->host_visible_region.len);
197 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_CONTEXT_INIT)) {
198 vgdev->has_context_init = true;
201 DRM_INFO("features: %cvirgl %cedid %cresource_blob %chost_visible",
202 vgdev->has_virgl_3d ? '+' : '-',
203 vgdev->has_edid ? '+' : '-',
204 vgdev->has_resource_blob ? '+' : '-',
205 vgdev->has_host_visible ? '+' : '-');
207 DRM_INFO("features: %ccontext_init\n",
208 vgdev->has_context_init ? '+' : '-');
210 ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
212 DRM_ERROR("failed to find virt queues\n");
215 vgdev->ctrlq.vq = vqs[0];
216 vgdev->cursorq.vq = vqs[1];
217 ret = virtio_gpu_alloc_vbufs(vgdev);
219 DRM_ERROR("failed to alloc vbufs\n");
223 /* get display info */
224 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
225 num_scanouts, &num_scanouts);
226 vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
227 VIRTIO_GPU_MAX_SCANOUTS);
229 if (!IS_ENABLED(CONFIG_DRM_VIRTIO_GPU_KMS) || !vgdev->num_scanouts) {
230 DRM_INFO("KMS disabled\n");
231 vgdev->num_scanouts = 0;
232 vgdev->has_edid = false;
233 dev->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
235 DRM_INFO("number of scanouts: %d\n", num_scanouts);
238 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config,
239 num_capsets, &num_capsets);
240 DRM_INFO("number of cap sets: %d\n", num_capsets);
242 ret = virtio_gpu_modeset_init(vgdev);
244 DRM_ERROR("modeset init failed\n");
248 virtio_device_ready(vgdev->vdev);
251 virtio_gpu_get_capsets(vgdev, num_capsets);
252 if (vgdev->num_scanouts) {
254 virtio_gpu_cmd_get_edids(vgdev);
255 virtio_gpu_cmd_get_display_info(vgdev);
256 virtio_gpu_notify(vgdev);
257 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
263 virtio_gpu_free_vbufs(vgdev);
265 vgdev->vdev->config->del_vqs(vgdev->vdev);
267 dev->dev_private = NULL;
271 static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
273 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
275 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
276 kfree(cache_ent->caps_cache);
281 void virtio_gpu_deinit(struct drm_device *dev)
283 struct virtio_gpu_device *vgdev = dev->dev_private;
285 flush_work(&vgdev->obj_free_work);
286 flush_work(&vgdev->ctrlq.dequeue_work);
287 flush_work(&vgdev->cursorq.dequeue_work);
288 flush_work(&vgdev->config_changed_work);
289 virtio_reset_device(vgdev->vdev);
290 vgdev->vdev->config->del_vqs(vgdev->vdev);
293 void virtio_gpu_release(struct drm_device *dev)
295 struct virtio_gpu_device *vgdev = dev->dev_private;
300 virtio_gpu_modeset_fini(vgdev);
301 virtio_gpu_free_vbufs(vgdev);
302 virtio_gpu_cleanup_cap_cache(vgdev);
304 if (vgdev->has_host_visible)
305 drm_mm_takedown(&vgdev->host_visible_mm);
308 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
310 struct virtio_gpu_device *vgdev = dev->dev_private;
311 struct virtio_gpu_fpriv *vfpriv;
314 /* can't create contexts without 3d renderer */
315 if (!vgdev->has_virgl_3d)
318 /* allocate a virt GPU context for this opener */
319 vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
323 mutex_init(&vfpriv->context_lock);
325 handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
331 vfpriv->ctx_id = handle + 1;
332 file->driver_priv = vfpriv;
336 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
338 struct virtio_gpu_device *vgdev = dev->dev_private;
339 struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
341 if (!vgdev->has_virgl_3d)
344 if (vfpriv->context_created) {
345 virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id);
346 virtio_gpu_notify(vgdev);
349 ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1);
350 mutex_destroy(&vfpriv->context_lock);
352 file->driver_priv = NULL;