1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __ASM_MACH_CPUTYPE_H
3 #define __ASM_MACH_CPUTYPE_H
5 #if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
6 #include <asm/cputype.h>
10 * CPU Stepping CPU_ID CHIP_ID
12 * PXA168 S0 0x56158400 0x0000C910
13 * PXA168 A0 0x56158400 0x00A0A168
14 * PXA910 Y1 0x56158400 0x00F2C920
15 * PXA910 A0 0x56158400 0x00F2C910
16 * PXA910 A1 0x56158400 0x00A0C910
17 * PXA920 Y0 0x56158400 0x00F2C920
18 * PXA920 A0 0x56158400 0x00A0C920
19 * PXA920 A1 0x56158400 0x00A1C920
20 * MMP2 Z0 0x560f5811 0x00F00410
21 * MMP2 Z1 0x560f5811 0x00E00410
22 * MMP2 A0 0x560f5811 0x00A0A610
23 * MMP3 A0 0x562f5842 0x00A02128
24 * MMP3 B0 0x562f5842 0x00B02128
27 extern unsigned int mmp_chip_id;
29 #ifdef CONFIG_CPU_PXA168
30 static inline int cpu_is_pxa168(void)
32 return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
33 ((mmp_chip_id & 0xfff) == 0x168);
36 #define cpu_is_pxa168() (0)
39 /* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
40 #ifdef CONFIG_CPU_PXA910
41 static inline int cpu_is_pxa910(void)
43 return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
44 (((mmp_chip_id & 0xfff) == 0x910) ||
45 ((mmp_chip_id & 0xfff) == 0x920));
48 #define cpu_is_pxa910() (0)
51 #if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT)
52 static inline int cpu_is_mmp2(void)
54 return (((read_cpuid_id() >> 8) & 0xff) == 0x58) &&
55 (((mmp_chip_id & 0xfff) == 0x410) ||
56 ((mmp_chip_id & 0xfff) == 0x610));
59 #define cpu_is_mmp2() (0)
62 #ifdef CONFIG_MACH_MMP3_DT
63 static inline int cpu_is_mmp3(void)
65 return (((read_cpuid_id() >> 8) & 0xff) == 0x58) &&
66 ((mmp_chip_id & 0xffff) == 0x2128);
69 static inline int cpu_is_mmp3_a0(void)
71 return (cpu_is_mmp3() &&
72 ((mmp_chip_id & 0x00ff0000) == 0x00a00000));
75 static inline int cpu_is_mmp3_b0(void)
77 return (cpu_is_mmp3() &&
78 ((mmp_chip_id & 0x00ff0000) == 0x00b00000));
82 #define cpu_is_mmp3() (0)
83 #define cpu_is_mmp3_a0() (0)
84 #define cpu_is_mmp3_b0() (0)
87 #endif /* __ASM_MACH_CPUTYPE_H */